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81.
公开(公告)号:US08008583B2
公开(公告)日:2011-08-30
申请号:US12330147
申请日:2008-12-08
Applicant: Takashi Kariya , Toshiki Furutani , Takeshi Kawanishi
Inventor: Takashi Kariya , Toshiki Furutani , Takeshi Kawanishi
IPC: H05K1/16
CPC classification number: H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/15174 , H01L2924/15311 , H01L2924/3011 , H05K1/112 , H05K3/4602 , H05K3/4688 , H05K2201/0187 , H05K2201/10674 , H01L2224/05599
Abstract: This invention provides a multilayer printed wiring board which achieves fine pitches. A heat resistant substrate is incorporated in a multilayer printed wiring board and interlayer resin insulation layer and conductive layer are placed alternately on the heat resistant substrate. A built-up wiring board in which respective conductive layers are connected by via hole is formed. A via hole is formed on the surface of a mirror-processed Si substrate by using a heat resistant substrate composed of Si substrate so that finer wiring than a resin substrate having unevenness in its surface can be formed, whereby achieving fine pitches. Further, by forming the wiring on a mirror processed surface, dispersion of wiring decreases thereby decreasing dispersion of impedance.
Abstract translation: 本发明提供一种实现细小间距的多层印刷线路板。 在多层印刷线路板和层间树脂绝缘层中并入耐热基板,并将导电层交替放置在耐热基板上。 形成各导电层通过通孔连接的叠层布线板。 通过使用由Si衬底构成的耐热衬底,在镜面处理的Si衬底的表面上形成通孔,从而可以形成比其表面不均匀的树脂衬底更细的布线,从而实现细小的间距。 此外,通过在镜面处理表面上形成布线,布线的分散减小,从而减小阻抗的分散。
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82.
公开(公告)号:US07971354B2
公开(公告)日:2011-07-05
申请号:US12652255
申请日:2010-01-05
Applicant: Takashi Kariya , Toshiki Furutani
Inventor: Takashi Kariya , Toshiki Furutani
IPC: H05K3/02
CPC classification number: H01L24/16 , H01L21/4857 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2224/13099 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/30105 , H05K1/0271 , H05K1/0373 , H05K1/111 , H05K1/115 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K3/4602 , H05K2201/0133 , H05K2201/0367 , H05K2201/068 , H05K2201/09881 , H05K2201/10674 , Y10T29/49117 , Y10T29/49124 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49204 , H01L2924/00 , H01L2224/0401
Abstract: A multilayer printed wiring board manufacturing method including forming conductor posts, which are of substantially uniform thickness and with which the top surfaces are protected by a resist, on a conductor pattern disposed on an upper surface of a build-up layer formed on a core substrate, shaping the conductor posts to have a constriction by adjusting the time of immersion in an etching solution that etches the conductor posts, forming a low elastic modulus layer of substantially the same height as the conductor posts after removing the resist at the top surfaces, and forming mounting electrodes on upper surfaces of the conductor posts.
Abstract translation: 一种多层印刷线路板制造方法,包括形成基本上均匀的厚度并且顶表面被抗蚀剂保护的导体柱布置在形成在芯基板上的积聚层的上表面上的导体图案上 通过调节蚀刻导体柱的蚀刻溶液中的浸渍时间来形成导体柱以形成收缩,在去除顶表面上的抗蚀剂之后形成与导体柱基本上相同的高度的低弹性模量层,以及 在导体柱的上表面上形成安装电极。
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公开(公告)号:US07884286B2
公开(公告)日:2011-02-08
申请号:US12034586
申请日:2008-02-20
Applicant: Hajime Sakamoto , Tadashi Sugiyama , Dongdong Wang , Takashi Kariya
Inventor: Hajime Sakamoto , Tadashi Sugiyama , Dongdong Wang , Takashi Kariya
IPC: H05K1/16
CPC classification number: H01L24/29 , H01L21/4846 , H01L21/4857 , H01L23/13 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L23/544 , H01L24/19 , H01L24/24 , H01L24/32 , H01L24/83 , H01L25/03 , H01L25/18 , H01L2223/54426 , H01L2223/54473 , H01L2223/5448 , H01L2223/54486 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/16227 , H01L2224/20 , H01L2224/24227 , H01L2224/32225 , H01L2224/45144 , H01L2224/73267 , H01L2224/83192 , H01L2224/92 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01043 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01052 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/15311 , H01L2924/15312 , H01L2924/1532 , H01L2924/18162 , H01L2924/30107 , H05K1/185 , H05K3/4602 , H05K2201/09036 , H05K2201/09563 , H05K2201/096 , H05K2201/09918 , H05K2201/10674 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49133 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2224/83 , H01L2224/82 , H01L2924/3512 , H01L2924/00
Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.
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公开(公告)号:US07856710B2
公开(公告)日:2010-12-28
申请号:US11964355
申请日:2007-12-26
Applicant: Takashi Kariya , Akira Mochida
Inventor: Takashi Kariya , Akira Mochida
IPC: H01K3/10
CPC classification number: H01L21/6835 , H01L21/4857 , H01L2221/68345 , H01L2221/68363 , H01L2224/05001 , H01L2224/16 , H01L2224/16235 , H01L2924/0102 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H05K1/162 , H05K3/4602 , H05K2201/0175 , H05K2201/0355 , H05K2201/09309 , H05K2201/09509 , H05K2201/09518 , H05K2201/09718 , H05K2203/0353 , Y10T29/435 , Y10T29/49117 , Y10T29/49124 , Y10T29/49128 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165
Abstract: A method of manufacturing a printed wiring board including preparing a high-dielectric capacitor sheet including a ceramic high-dielectric layer sandwiched by upper and lower electrode sheets, attaching the high-dielectric capacitor sheet to a first insulating layer, forming through holes for the upper and lower electrode sheets such that the through holes penetrate through the ceramic high-dielectric layer and upper and lower electrode sheets, forming a second insulating layer which fills the through holes and covers an upper surface of the high-dielectric capacitor sheet, forming an upper electrode connecting first hole, an upper electrode connecting second hole and a lower electrode connecting hole, filling the upper holes with conductive material such that the upper electrode connecting first hole and the upper electrode connecting second hole are connected to form an upper electrode connection portion, and filling the lower electrode connecting hole with conductive material to form a lower electrode connecting portion.
Abstract translation: 一种印刷电路板的制造方法,其特征在于,包括:制作包含由上下电极片夹着的陶瓷高电介质层的高介电电容器片,将所述高介电电容片贴附在第一绝缘层上, 和下电极片,使得通孔穿过陶瓷高介电层和上下电极片,形成填充通孔并覆盖高介电电容器片的上表面的第二绝缘层,形成上电极片 电极连接第一孔,上电极连接第二孔和下电极连接孔,用导电材料填充上孔,使得连接第一孔和连接第二孔的上电极的上电极连接形成上电极连接部, 并用导电材料填充下电极连接孔 m为下部电极连接部。
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公开(公告)号:US07843302B2
公开(公告)日:2010-11-30
申请号:US11429157
申请日:2006-05-08
Applicant: Yasuhiko Mano , Takashi Kariya , Shinobu Kato
Inventor: Yasuhiko Mano , Takashi Kariya , Shinobu Kato
IPC: H01F5/00
CPC classification number: H05K3/4046 , H01F17/0006 , H01F17/06 , H01F41/046 , H01F2017/002 , H01F2017/065 , H01L23/645 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , H01L2924/15312 , H01L2924/1532 , H01L2924/3011 , H01L2924/3025 , H05K1/0233 , H05K1/115 , H05K1/185 , H05K3/42 , H05K3/4602 , H05K2201/086 , H05K2201/09581 , Y10T29/4902 , H01L2224/05599
Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.
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公开(公告)号:US20100288544A1
公开(公告)日:2010-11-18
申请号:US12842431
申请日:2010-07-23
Applicant: Takashi Kariya
Inventor: Takashi Kariya
CPC classification number: H01L23/49838 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H05K1/113 , H05K1/115 , H05K3/4602 , H05K3/4652 , H05K2201/0352 , H05K2201/09536 , H05K2201/096 , H05K2201/10674 , Y10T29/49139
Abstract: A multilayer printed wiring board including a core substrate, a built-up wiring layer having a first surface in contact with the substrate and a second surface, the second surface including a mounting area for mounting a semiconductor device, the built-up layer including circuits and insulating layers, first through-hole conductors formed in a first portion of the substrate which corresponds to the mounting area, second through-hole conductors formed in a second portion of the substrate which corresponds to an area of the second surface other than the mounting area, third through-hole conductors formed in a processor core area of the first portion of the substrate which corresponds to a processor core section of the device, and pads provided on the second surface. The first conductors have a pitch smaller than a pitch of the second conductors, and the third conductors have a pitch smaller than the pitch of the first conductors.
Abstract translation: 一种多层印刷电路板,包括芯基板,具有与基板接触的第一表面的积层布线层和第二表面,所述第二表面包括用于安装半导体器件的安装区域,所述堆叠层包括电路 和绝缘层,形成在所述基板的与所述安装区域对应的第一部分中的第一通孔导体,形成在所述基板的第二部分中的第二通孔导体,所述第二通孔导体对应于所述第二表面的除了所述安装 形成在基板的第一部分的处理器核心区域中的区域,第三通孔导体,其对应于设备的处理器核心部分,以及焊盘,设置在第二表面上。 第一导体的间距小于第二导体的间距,第三导体的间距小于第一导体的间距。
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公开(公告)号:US20100243299A1
公开(公告)日:2010-09-30
申请号:US12609447
申请日:2009-10-30
Applicant: Takashi Kariya , Kazuhiro Yoshikawa , Daiki Komatsu , Ramesh Bhandari
Inventor: Takashi Kariya , Kazuhiro Yoshikawa , Daiki Komatsu , Ramesh Bhandari
CPC classification number: H05K3/429 , H01L21/486 , H01L23/13 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/3011 , H05K1/0271 , H05K1/183 , H05K3/4602 , H05K3/4644 , H05K3/4694 , H05K2201/0187 , H05K2201/068 , Y10T29/49165 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
Abstract translation: 多层印刷布线板包括具有穿透部分的芯基材,容纳在芯基材的穿透部分内的低热膨胀基板,并且具有用于安装半导体元件的第一表面和在相对侧上的第二表面 所述第一通孔导体设置在所述低热膨胀基板内部并且设置用于在所述低热膨胀基板的第一表面和所述第二表面之间的电连接,填充在所述低热膨胀基板之间的间隙中的填料 低热膨胀基板和芯基材的内壁,以及形成在低热膨胀基板的第一表面和第二表面中的至少一个上的布线层,并且具有树脂绝缘层和导电 层。 布线层具有连接第一通孔导体和导电层的通孔导体。
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公开(公告)号:US07781681B2
公开(公告)日:2010-08-24
申请号:US12163286
申请日:2008-06-27
Applicant: Takashi Kariya
Inventor: Takashi Kariya
IPC: H05K1/16
CPC classification number: H01L23/49838 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H05K1/113 , H05K1/115 , H05K3/4602 , H05K3/4652 , H05K2201/0352 , H05K2201/09536 , H05K2201/096 , H05K2201/10674 , Y10T29/49139
Abstract: A multilayer printed wiring board includes a core substrate and a built-up wiring layer formed by alternately layering conductor circuits and insulating resin layers. The built-up wiring layer includes a first surface provided in contact with the core substrate and a second surface opposing the first surface and including a mounting area on which at least one semiconductor device is to be mounted. A first plurality of through-hole conductors is formed in a first portion of the core substrate which corresponds to the mounting area of the second surface, and a second plurality of through-hole conductors formed in a second portion of the core substrate which corresponds to another area of the second surface other than the mounting area. A pitch between the first plurality of through-hole conductors is smaller than a pitch between the second plurality of through-hole conductors. In one aspect, a ratio of pads to through holes directly below a processor core section of the semiconductor device is less that a number of pads to through holes in an area outside the processor core.
Abstract translation: 多层印刷电路板包括芯基板和通过交替层叠导体电路和绝缘树脂层而形成的积层布线层。 所述积层布线层包括与所述芯基板接触的第一表面和与所述第一表面相对的第二表面,并且包括将要安装至少一个半导体器件的安装区域。 第一多个通孔导体形成在芯基板的与第二表面的安装面积对应的第一部分中,第二多个通孔导体形成在芯基板的第二部分中,其对应于 第二表面的另一区域,而不是安装区域。 第一多个通孔导体之间的间距小于第二多个通孔导体之间的节距。 在一个方面,焊盘与半导体器件的处理器核心部分正下方的通孔的比例小于处理器核心外部区域中通孔的数量。
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公开(公告)号:US20100117779A1
公开(公告)日:2010-05-13
申请号:US12692907
申请日:2010-01-25
Applicant: Yasuhiko MANO , Takashi Kariya , Shinobu Kato
Inventor: Yasuhiko MANO , Takashi Kariya , Shinobu Kato
IPC: H01F5/00
CPC classification number: H05K3/4046 , H01F17/0006 , H01F17/06 , H01F41/046 , H01F2017/002 , H01F2017/065 , H01L23/645 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , H01L2924/15312 , H01L2924/1532 , H01L2924/3011 , H01L2924/3025 , H05K1/0233 , H05K1/115 , H05K1/185 , H05K3/42 , H05K3/4602 , H05K2201/086 , H05K2201/09581 , Y10T29/4902 , H01L2224/05599
Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.
Abstract translation: 嵌入印刷电路板的电感器包括沿着印刷电路板的厚度方向延伸的导体和与导体接触而不间隙的磁体。 例如,磁性体由具有圆柱形管状的铁氧体构成。 导体由在圆筒形管状铁氧体的内周面上电镀形成的铜膜构成。 电感器沿印刷电路板的厚度方向插入。
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公开(公告)号:US20090224863A1
公开(公告)日:2009-09-10
申请号:US12466911
申请日:2009-05-15
Applicant: Yasuhiko Mano , Takashi Kariya , Shinobu Kato
Inventor: Yasuhiko Mano , Takashi Kariya , Shinobu Kato
IPC: H01F5/00
CPC classification number: H05K3/4046 , H01F17/0006 , H01F17/06 , H01F41/046 , H01F2017/002 , H01F2017/065 , H01L23/645 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , H01L2924/15312 , H01L2924/1532 , H01L2924/3011 , H01L2924/3025 , H05K1/0233 , H05K1/115 , H05K1/185 , H05K3/42 , H05K3/4602 , H05K2201/086 , H05K2201/09581 , Y10T29/4902 , H01L2224/05599
Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.
Abstract translation: 嵌入印刷电路板的电感器包括沿着印刷电路板的厚度方向延伸的导体和与导体接触而不间隙的磁体。 例如,磁性体由具有圆柱形管状的铁氧体构成。 导体由在圆筒形管状铁氧体的内周面上电镀形成的铜膜构成。 电感器沿印刷电路板的厚度方向插入。
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