MULTILAYER PRINTED WIRING BOARD
    86.
    发明申请
    MULTILAYER PRINTED WIRING BOARD 有权
    多层印刷接线板

    公开(公告)号:US20100288544A1

    公开(公告)日:2010-11-18

    申请号:US12842431

    申请日:2010-07-23

    Applicant: Takashi Kariya

    Inventor: Takashi Kariya

    Abstract: A multilayer printed wiring board including a core substrate, a built-up wiring layer having a first surface in contact with the substrate and a second surface, the second surface including a mounting area for mounting a semiconductor device, the built-up layer including circuits and insulating layers, first through-hole conductors formed in a first portion of the substrate which corresponds to the mounting area, second through-hole conductors formed in a second portion of the substrate which corresponds to an area of the second surface other than the mounting area, third through-hole conductors formed in a processor core area of the first portion of the substrate which corresponds to a processor core section of the device, and pads provided on the second surface. The first conductors have a pitch smaller than a pitch of the second conductors, and the third conductors have a pitch smaller than the pitch of the first conductors.

    Abstract translation: 一种多层印刷电路板,包括芯基板,具有与基板接触的第一表面的积层布线层和第二表面,所述第二表面包括用于安装半导体器件的安装区域,所述堆叠层包括电路 和绝缘层,形成在所述基板的与所述安装区域对应的第一部分中的第一通孔导体,形成在所述基板的第二部分中的第二通孔导体,所述第二通孔导体对应于所述第二表面的除了所述安装 形成在基板的第一部分的处理器核心区域中的区域,第三通孔导体,其对应于设备的处理器核心部分,以及焊盘,设置在第二表面上。 第一导体的间距小于第二导体的间距,第三导体的间距小于第一导体的间距。

    Multilayer printed wiring board
    88.
    发明授权
    Multilayer printed wiring board 有权
    多层印刷线路板

    公开(公告)号:US07781681B2

    公开(公告)日:2010-08-24

    申请号:US12163286

    申请日:2008-06-27

    Applicant: Takashi Kariya

    Inventor: Takashi Kariya

    Abstract: A multilayer printed wiring board includes a core substrate and a built-up wiring layer formed by alternately layering conductor circuits and insulating resin layers. The built-up wiring layer includes a first surface provided in contact with the core substrate and a second surface opposing the first surface and including a mounting area on which at least one semiconductor device is to be mounted. A first plurality of through-hole conductors is formed in a first portion of the core substrate which corresponds to the mounting area of the second surface, and a second plurality of through-hole conductors formed in a second portion of the core substrate which corresponds to another area of the second surface other than the mounting area. A pitch between the first plurality of through-hole conductors is smaller than a pitch between the second plurality of through-hole conductors. In one aspect, a ratio of pads to through holes directly below a processor core section of the semiconductor device is less that a number of pads to through holes in an area outside the processor core.

    Abstract translation: 多层印刷电路板包括芯基板和通过交替层叠导体电路和绝缘树脂层而形成的积层布线层。 所述积层布线层包括与所述芯基板接触的第一表面和与所述第一表面相对的第二表面,并且包括将要安装至少一个半导体器件的安装区域。 第一多个通孔导体形成在芯基板的与第二表面的安装面积对应的第一部分中,第二多个通孔导体形成在芯基板的第二部分中,其对应于 第二表面的另一区域,而不是安装区域。 第一多个通孔导体之间的间距小于第二多个通孔导体之间的节距。 在一个方面,焊盘与半导体器件的处理器核心部分正下方的通孔的比例小于处理器核心外部区域中通孔的数量。

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