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233 条记录 (耗时 0.029 秒)

    Semiconductor device with improved robustness
    2.
    发明授权
    Semiconductor device with improved robustness 有权
    半导体器件具有改进的鲁棒性

    公开(公告)号：US08884360B2

    公开(公告)日：2014-11-11

    申请号：US13404161

    申请日：2012-02-24

    申请人： Ralf Siemieniec ,  Oliver Blank ,  Anton Mauder ,  Franz Hirler

    发明人： Ralf Siemieniec ,  Oliver Blank ,  Anton Mauder ,  Franz Hirler

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

    摘要： A semiconductor device includes a first contact in low Ohmic contact with a source region of the device and a first portion of a body region of the device formed in an active area of the device, and a second contact in low Ohmic contact with a second portion of the body region formed in a peripheral area of the device. The minimum width of the second contact at a first surface of the device is larger than the minimum width of the first contact at the first surface so that maximum current density during commutating the semiconductor device is reduced and thus the risk of device damage during hard commutating is also reduced.

    摘要翻译： 半导体器件包括与器件的源极区域的低欧姆接触的第一接触和形成在器件的有源区域中的器件的体区的第一部分，以及与第二部分的低欧姆接触的第二接触 形成在装置的周边区域中的身体区域。 器件第一表面处的第二触点的最小宽度大于第一表面处的第一接触的最小宽度，使得在半导体器件的整流期间的最大电流密度降低，并且因此在硬整流期间器件损坏的风险 也减少了。

    Semiconductor device with a dynamic gate-drain capacitance
    3.
    发明授权
    Semiconductor device with a dynamic gate-drain capacitance 有权
    具有动态栅极 - 漏极电容的半导体器件

    公开(公告)号：US08829584B2

    公开(公告)日：2014-09-09

    申请号：US13614479

    申请日：2012-09-13

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L27/07

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。

    Reverse Conducting IGBT
    7.
    发明申请
    Reverse Conducting IGBT 审中-公开
    反向导通IGBT

    公开(公告)号：US20130341673A1

    公开(公告)日：2013-12-26

    申请号：US13529166

    申请日：2012-06-21

    申请人： Frank Pfirsch ,  Dorothea Werber ,  Anton Mauder ,  Carsten Schaeffer

    发明人： Frank Pfirsch ,  Dorothea Werber ,  Anton Mauder ,  Carsten Schaeffer

    IPC分类号： H01L29/739

    CPC分类号： H03K17/127 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/404 ,  H01L29/407 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397 ,  H03K3/01 ,  H03K17/66

    摘要： A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, and a drift region of the second conductivity type arranged in a semiconductor body. The first and second emitter regions are arranged between the drift region and a first electrode and are each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source region and the body region. A floating parasitic region of the first conductivity type is disposed outside the cell region.

    摘要翻译： 半导体器件包括第一导电类型的第一发射极区域，与第一导电类型互补的第二导电类型的第二发射极区域和布置在半导体本体中的第二导电类型的漂移区域。 第一和第二发射极区域布置在漂移区域和第一电极之间并且各自连接到第一电极。 单元区域的器件单元包括邻接漂移区的第一导电类型的主体区域，与身体区域邻接的第二导电类型的源极区域和与身体区域相邻并且与身体区域电介质绝缘的栅电极， 栅极电介质。 第二电极电连接到源区域和身体区域。 第一导电类型的浮置寄生区域设置在单元区域的外部。