公开(公告)号：US20190028798A1

公开(公告)日：2019-01-24

申请号：US15682119

申请日：2017-08-21

申请人： Jong Gi LEE

发明人： Jong Gi LEE

IPC分类号： H04R1/12 ,  H04R1/10

摘要： Disclosed herein is an earphone protection device. The earphone protection device includes a pair of earphone covers and a pair of adjustment cables. An outer first space and an inner second space are formed inside each of the earphone covers. The first space provides a path adapted to guide earphones through accommodation, and also provides a coupling structure so that the earphone covers are assembled together M and closed after the earphones have been accommodated inside the earphone covers.

公开(公告)号：US20120313244A1

公开(公告)日：2012-12-13

申请号：US13594841

申请日：2012-08-26

申请人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

发明人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

IPC分类号： H01L23/498

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/12105 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00

摘要： In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

摘要翻译： 在一个实施例中，半导体封装可以包括：半导体芯片，其具有形成在其第一表面上的芯片焊盘，用于密封半导体芯片并暴露半导体芯片的第一表面的密封构件，覆盖第一 并且直接接触密封部件的上表面的一部分。 导电布线还接触垫。 半导体封装还可以包括覆盖导电布线并具有露出导电布线部分的开口的密封剂。

公开(公告)号：US08288210B2

公开(公告)日：2012-10-16

申请号：US13041422

申请日：2011-03-06

申请人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

发明人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

IPC分类号： H01L21/00

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/12105 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00

摘要： In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

摘要翻译： 在一个实施例中，半导体封装可以包括：半导体芯片，其具有形成在其第一表面上的芯片焊盘，用于密封半导体芯片并暴露半导体芯片的第一表面的密封构件，覆盖第一 并且直接接触密封部件的上表面的一部分。 导电布线还接触垫。 半导体封装还可以包括覆盖导电布线并具有露出导电布线部分的开口的密封剂。

公开(公告)号：US20100144137A1

公开(公告)日：2010-06-10

申请号：US12579483

申请日：2009-10-15

申请人： Kwang-yong LEE ,  Jong-gi Lee ,  Min-ill Kim ,  Min-seung Yoon ,  Ji-seok Hong

发明人： Kwang-yong LEE ,  Jong-gi Lee ,  Min-ill Kim ,  Min-seung Yoon ,  Ji-seok Hong

IPC分类号： H01L21/768

CPC分类号： H01L21/76898 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16057 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/24145 ,  H01L2224/81097 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00014

摘要： A method of interconnecting semiconductor devices by using capillary motion, thereby simplifying fabricating operations, reducing fabricating costs, and simultaneously filling of through-silicon-vias (TSVs) and interconnecting semiconductor devices. The method includes preparing a first semiconductor device in which first TSVs are formed, positioning solder balls respectively on the first TSVs, performing a back-lap operation on the first semiconductor device, positioning a second semiconductor device, in which second TSVs are formed, above the first semiconductor device on which the solder balls are positioned, and performing a reflow operation such that the solder balls fill the first and second TSVs due to capillary motion.

摘要翻译： 通过使用毛细管运动来互连半导体器件的方法，从而简化了制造操作，降低了制造成本，同时填充了通过硅通孔（TSV）和互连半导体器件。 该方法包括制备其中形成第一TSV的第一半导体器件，分别将焊球定位在第一TSV上，在第一半导体器件上执行回搭操作，将形成有第二TSV的第二半导体器件定位在其中，形成第二TSV 焊球位于其上的第一半导体器件，并且执行回流操作，使得焊球由于毛细管运动而填充第一和第二TSV。

公开(公告)号：US20090188704A1

公开(公告)日：2009-07-30

申请号：US12357693

申请日：2009-01-22

申请人： Kwang-Yong LEE ,  Jong-Gi Lee ,  Sun-Won Kang ,  Ji-Seok Hong

发明人： Kwang-Yong LEE ,  Jong-Gi Lee ,  Sun-Won Kang ,  Ji-Seok Hong

IPC分类号： H01R12/30

CPC分类号： H05K3/3494 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81222 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H05K1/0212 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2203/101 ,  H01L2924/00 ,  H01L2224/05599

摘要： A mounting substrate includes a substrate, a bonding pad and an induction heating pad. The bonding pad is formed on the substrate, and adhered to a solder ball to mount a semiconductor chip on the substrate. The induction heating pad is disposed adjacent to the bonding pad, the induction heating pad being induction heated by an applied alternating magnetic field to reflow the solder ball. The induction heating pad having a diameter greater than a skin depth in response to the frequency of the applied alternating magnetic field is selectively induction heated in response to a low frequency band of the alternating magnetic field. Accordingly, during a reflow process for a solder ball, the semiconductor chip may be mounted on the mounting substrate to complete a semiconductor package without damaging the mounting substrate, to thereby improve the reliability of the completed semiconductor package.

摘要翻译： 安装基板包括基板，接合焊盘和感应加热垫。 接合焊盘形成在基板上，并且粘附到焊球以将半导体芯片安装在基板上。 感应加热垫设置在接合焊盘附近，感应加热垫被施加的交变磁场感应加热以回流焊球。 响应于所施加的交变磁场的频率具有大于皮肤深度的直径的感应加热垫响应于交变磁场的低频带被选择性地感应加热。 因此，在焊球的回流处理中，可以将半导体芯片安装在安装基板上以完成半导体封装而不损坏安装基板，从而提高完成的半导体封装的可靠性。

公开(公告)号：US20080290513A1

公开(公告)日：2008-11-27

申请号：US12125391

申请日：2008-05-22

申请人： Hyung-Jik BYUN ,  Jong-Gi LEE ,  Jong-Ho LEE ,  Se-Young YANG

发明人： Hyung-Jik BYUN ,  Jong-Gi LEE ,  Jong-Ho LEE ,  Se-Young YANG

IPC分类号： H01L23/488

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Provided are a semiconductor package having molded balls on a bottom surface of a PCB and a method of manufacturing the semiconductor package. The semiconductor package includes: a semiconductor chip mounting member comprising circuit patterns on a first surface, an insulating layer defining openings exposing at least portions of the circuit patterns, and external contact terminals arranged on the portions of circuit patterns exposed by the openings; a semiconductor chip formed on a second surface of the semiconductor chip mounting member and electrically connected to the semiconductor chip mounting member; a first sealing portion coating the second surface of the semiconductor chip mounting member and the semiconductor chip; and a second sealing portion arranged on the insulating layer and the external contact terminals such that at least portions of the external contact terminals are exposed.

摘要翻译： 提供了一种在PCB的底表面上具有模制球的半导体封装以及半导体封装的制造方法。 所述半导体封装包括：半导体芯片安装构件，其包括在第一表面上的电路图案，绝缘层限定露出所述电路图案的至少一部分的开口以及布置在由所述开口暴露的所述电路图案部分上的外部接触端子; 半导体芯片，形成在所述半导体芯片安装构件的第二表面上并电连接到所述半导体芯片安装构件; 涂覆半导体芯片安装构件和半导体芯片的第二表面的第一密封部分; 以及布置在绝缘层和外部接触端子上的第二密封部分，使得外部接触端子的至少一部分露出。

公开(公告)号：US20080054462A1

公开(公告)日：2008-03-06

申请号：US11850576

申请日：2007-09-05

申请人： Young-Lyong KIM ,  Young-Shin CHOI ,  Jong-Gi LEE ,  Kun-Dae YEOM ,  Chul-Yong JANG ,  Hyun-Jong WOO

发明人： Young-Lyong KIM ,  Young-Shin CHOI ,  Jong-Gi LEE ,  Kun-Dae YEOM ,  Chul-Yong JANG ,  Hyun-Jong WOO

IPC分类号： H01L23/52 ,  H01R12/00 ,  H05K3/00

CPC分类号： H05K3/4084 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K3/38 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0382 ,  H05K2201/09481 ,  H05K2201/0969 ,  H05K2201/2072 ,  H05K2203/0195 ,  H05K2203/0733 ,  Y10T29/49155 ,  H01L2224/0401

摘要： Provided is a printed circuit board having a bump interconnection structure that improves reliability between interconnection layers. Also provided is a method of fabricating the printed circuit board and semiconductor package using the printed circuit board. According to one embodiment, the printed circuit board includes a plurality of bumps formed on a resin layer between a first interconnection layer and a second interconnection layer. The second interconnection layer includes insertion holes corresponding to upper portions of the bumps so that the upper portions of the bumps protrude from the second interconnection layer. The upper portion of at least one of the bumps includes a rivet portion having a diameter greater that the diameter of the corresponding insertion hole to reliably interconnect the first and second interconnection layers.

摘要翻译： 提供了具有提高互连层之间的可靠性的凸块互连结构的印刷电路板。 还提供了使用印刷电路板制造印刷电路板和半导体封装的方法。 根据一个实施例，印刷电路板包括形成在第一互连层和第二互连层之间的树脂层上的多个凸点。 第二互连层包括对应于凸起的上部的插入孔，使得凸起的上部从第二互连层突出。 至少一个凸块的上部包括具有大于相应插入孔的直径的直径的铆钉部分，以可靠地互连第一和第二互连层。

公开(公告)号：US20080006949A1

公开(公告)日：2008-01-10

申请号：US11765367

申请日：2007-06-19

申请人： Jong-Gi LEE ,  Tae-Joo HWANG

发明人： Jong-Gi LEE ,  Tae-Joo HWANG

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/16 ,  H01L21/563 ,  H01L23/3114 ,  H01L24/29 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/83191 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/3512 ,  H01L2924/00

摘要： Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip, and a plurality of conductive balls, e.g., solder balls formed on a joint surface of the semiconductor chip. A dummy board includes openings aligned with the solder balls and is bonded to the joint surface of the semiconductor chip. An adhesive material is interposed between the semiconductor chip and the dummy board to adhere the dummy board to the semiconductor chip. The adhesive material is applied on an adhesion surface of the dummy board adhered to a joint surface of the semiconductor chip. The dummy board is adhered to the joint surface of the semiconductor chip such that the solder balls are aligned with the openings. Cheap underfill materials can be selectively used, and a process time for reflow and curing of the adhesive material can be greatly reduced.

摘要翻译： 提供半导体封装及其制造方法。 半导体封装包括半导体芯片和多个导电球，例如形成在半导体芯片的接合表面上的焊球。 虚拟板包括与焊球对准的开口并且结合到半导体芯片的接合表面。 在半导体芯片和虚拟基板之间插入粘合材料，以将该虚拟板粘接到半导体芯片。 将粘合材料施加在粘附到半导体芯片的接合表面的伪板的粘合表面上。 将该虚拟板粘接到半导体芯片的接合面，使得焊球与开口对准。 可以选择性地使用廉价的底部填充材料，并且可以大大降低粘合剂材料的回流和固化的处理时间。

公开(公告)号：US5980870A

公开(公告)日：1999-11-09

申请号：US934544

申请日：1997-09-19

申请人： In Sub Baik ,  Jong Gi Lee ,  In Sik Cho ,  Youn Woo Park

发明人： In Sub Baik ,  Jong Gi Lee ,  In Sik Cho ,  Youn Woo Park

IPC分类号： A61K8/19 ,  A61K8/26 ,  A61K8/73 ,  A61K8/97 ,  A61Q11/00 ,  A61K9/16

CPC分类号： A61K8/0237 ,  A61K8/19 ,  A61K8/26 ,  A61K8/73 ,  A61K8/97 ,  A61Q11/00

摘要： A herb medicine extract-containing non-bleeding striped dentifrice composition, consisting essentially of a striped dentifrice component and a base dentifrice component, each component comprising the following ingredients at the substantially same amount: a. an abrasive that has a BET surface area of 10 m.sup.2 /g or less and an average particle diameter of 1 to 30 .mu.m upon measurement by Coulter Counter method, and shows oil absorption (linseed oil, ml/100 g) of 50 or less; b. a binder selected from the group consisting of xanthan gum, carrageenan, sodium carboxymethylcellulose, and the mixtures thereof; c. an alkyl sulfonate of anionic surfactants; and d. a humectant, and said striped dentifrice component containing herb medicine extracts at an amount of 0.001 to 10% by weight, on the basis of dry solid substance. It is non-bleeding by virtue of the substantially same formulation in the two components and the herb medicine extracts allow the dentifrice composition to suppress the formation of plaque.

摘要翻译： 一种草本药物提取物含有非出血性条状洁齿剂组合物，其基本上由条状洁牙剂组分和基础洁齿剂组分组成，每种组分包含基本相同量的以下成分：a。 通过Coulter Counter法测定的BET表面积为10m 2 / g以下，平均粒径为1〜30μm的研磨剂，油吸收（亚麻子油，ml / 100g）为50以下 ; b。 选自黄原胶，角叉菜胶，羧甲基纤维素钠及其混合物的粘合剂; C。 阴离子表面活性剂的烷基磺酸盐; 和d。 湿润剂，所述条状洁齿剂组分含有基于干固体物质的0.001至10重量％的草药提取物。 由于在两个成分中基本相同的制剂是不渗血的，草药提取物允许洁牙剂组合物抑制斑块的形成。

公开(公告)号：US20110318876A1

公开(公告)日：2011-12-29

申请号：US13041422

申请日：2011-03-06

申请人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

发明人： Jong-gi Lee ,  Sang-wook Park ,  Ji-seok Hong

IPC分类号： H01L21/60 ,  H01L21/56

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/12105 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00

摘要： In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

摘要翻译： 在一个实施例中，半导体封装可以包括：半导体芯片，其具有形成在其第一表面上的芯片焊盘，用于密封半导体芯片并暴露半导体芯片的第一表面的密封构件，覆盖第一 并且直接接触密封部件的上表面的一部分。 导电布线还接触垫。 半导体封装还可以包括覆盖导电布线并具有露出导电布线部分的开口的密封剂。