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1.发明申请Methods and Apparatus for Solder on Slot Connections in Package on Package Structures 有权焊接在封装结构上封装槽槽连接的方法和装置公开(公告)号：US20130241052A1
公开(公告)日：2013-09-19
申请号：US13420405
申请日：2012-03-14
申请人： Wei Sen Chang , Ching-Wen Hsiao , Chen-Shien Chen
发明人： Wei Sen Chang , Ching-Wen Hsiao , Chen-Shien Chen
IPC分类号： H01L23/498 , H01L21/50
CPC分类号： H01L24/19 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/02311 , H01L2224/02375 , H01L2224/0239 , H01L2224/024 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05012 , H01L2224/05013 , H01L2224/05553 , H01L2224/05569 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/12105 , H01L2224/13022 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81192 , H01L2224/81815 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00012 , H01L2224/03 , H01L2924/00 , H01L2224/05552
摘要： Solder on slot connections in package on package structures. An apparatus includes a substrate having a front side surface and a back side surface; a first passivation layer disposed over at least one of the front side and back side surfaces; at least one via opening formed in the first passivation layer; a conductor layer disposed over the first passivation layer, coupled to the at least one via and forming a conductive trace on the surface of the first passivation layer; a second passivation layer formed over the conductor layer; and at least one slot opening formed in the second passivation layer and exposing a portion of the conductive trace for receiving a solder connector. In additional embodiments the substrate may be a semiconductor wafer. Methods for forming the structures are disclosed.
摘要翻译： 焊接在封装结构上封装的插槽连接上。 一种设备包括：具有前侧表面和后侧表面的基板; 设置在前侧面和后侧表面中的至少一个上的第一钝化层; 形成在所述第一钝化层中的至少一个通孔; 布置在所述第一钝化层上方的导体层，耦合到所述至少一个通孔并在所述第一钝化层的表面上形成导电迹线; 形成在所述导体层上的第二钝化层; 以及形成在所述第二钝化层中并且暴露所述导电迹线的一部分以用于接收焊料连接器的至少一个狭槽开口。 在另外的实施例中，衬底可以是半导体晶片。 公开了形成结构的方法。
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公开(公告)号：US20120007231A1
公开(公告)日：2012-01-12
申请号：US12832205
申请日：2010-07-08
申请人： Wei Sen CHANG
发明人： Wei Sen CHANG
IPC分类号： H01L23/498 , H01L21/3205 , H01L21/768
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10126 , H01L2224/10145 , H01L2224/1132 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11823 , H01L2224/11825 , H01L2224/11849 , H01L2224/11906 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13566 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/01051 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： A nickel barrier layer is formed on an upper sidewall surface of a Cu pillar. A mask layer with an opening for defining the Cu pillar window has an upper portion and a lower portion. The upper portion of the mask layer is removed after the formation of the Cu pillar so as to expose the upper sidewall surface of the Cu pillar. The nickel barrier layer is then deposited on the exposed sidewall surface of the Cu pillar followed by removing and the lower portion of the mask layer.
摘要翻译： 在Cu支柱的上侧壁表面上形成镍阻挡层。 具有用于限定Cu柱窗的开口的掩模层具有上部和下部。 在形成Cu柱之后去除掩模层的上部以露出Cu柱的上侧壁表面。 然后将镍阻挡层沉积在Cu柱的暴露的侧壁表面上，然后除去掩模层的下部。
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3.发明授权公开(公告)号：US08653659B2
公开(公告)日：2014-02-18
申请号：US13543609
申请日：2012-07-06
申请人： Wei Sen Chang
发明人： Wei Sen Chang
IPC分类号： H01L23/48
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10126 , H01L2224/10145 , H01L2224/1132 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11823 , H01L2224/11825 , H01L2224/11849 , H01L2224/11906 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13566 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/01051 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： This description relates to an integrated circuit device including a semiconductor substrate, an under-bump-metallurgy (UBM) layer overlying the semiconductor substrate and a copper-containing pillar on the UBM layer. The copper-containing pillar includes a top surface, an upper sidewall surface adjacent to the top surface, and a lower sidewall surface adjacent to the UBM layer. The integrated circuit device further includes a barrier layer on the upper sidewall surface of the copper-containing pillar, wherein the barrier layer exposes the lower sidewall surface. The copper-containing pillar has a first height and the upper sidewall surface has a second height. The second height is greater than about 30 percent of the first height.
摘要翻译： 该描述涉及一种集成电路器件，其包括半导体衬底，覆盖半导体衬底的凸起下 - 冶金（UBM）层和UBM层上的含铜柱。 含铜柱包括顶表面，与顶表面相邻的上侧壁表面和与UBM层相邻的下侧壁表面。 集成电路器件还包括在含铜柱的上侧壁表面上的阻挡层，其中阻挡层暴露下侧壁表面。 含铜柱具有第一高度，上侧壁表面具有第二高度。 第二高度大于第一高度的约30％。
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4.发明申请公开(公告)号：US20120273945A1
公开(公告)日：2012-11-01
申请号：US13543609
申请日：2012-07-06
申请人： Wei Sen CHANG
发明人： Wei Sen CHANG
IPC分类号： H01L23/48
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10126 , H01L2224/10145 , H01L2224/1132 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11823 , H01L2224/11825 , H01L2224/11849 , H01L2224/11906 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13566 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/01051 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： This description relates to an integrated circuit device including a semiconductor substrate, an under-bump-metallurgy (UBM) layer overlying the semiconductor substrate and a copper-containing pillar on the UBM layer. The copper-containing pillar includes a top surface, an upper sidewall surface adjacent to the top surface, and a lower sidewall surface adjacent to the UBM layer. The integrated circuit device further includes a barrier layer on the upper sidewall surface of the copper-containing pillar, wherein the barrier layer exposes the lower sidewall surface. The copper-containing pillar has a first height and the upper sidewall surface has a second height. The second height is greater than about 30 percent of the first height.
摘要翻译： 该描述涉及一种集成电路器件，其包括半导体衬底，覆盖半导体衬底的凸起下 - 冶金（UBM）层和UBM层上的含铜柱。 含铜柱包括顶表面，与顶表面相邻的上侧壁表面和与UBM层相邻的下侧壁表面。 集成电路器件还包括在含铜柱的上侧壁表面上的阻挡层，其中阻挡层暴露下侧壁表面。 含铜柱具有第一高度，上侧壁表面具有第二高度。 第二高度大于第一高度的约30％。
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5.发明授权Methods and apparatus for solder on slot connections in package on package structures 有权封装结构上封装槽上连接焊料的方法和装置公开(公告)号：US08766441B2
公开(公告)日：2014-07-01
申请号：US13420405
申请日：2012-03-14
申请人： Wei Sen Chang , Ching-Wen Hsiao , Chen-Shien Chen
发明人： Wei Sen Chang , Ching-Wen Hsiao , Chen-Shien Chen
IPC分类号： H01L21/44 , H01L23/498
CPC分类号： H01L24/19 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/02311 , H01L2224/02375 , H01L2224/0239 , H01L2224/024 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05012 , H01L2224/05013 , H01L2224/05553 , H01L2224/05569 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/12105 , H01L2224/13022 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81192 , H01L2224/81815 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00012 , H01L2224/03 , H01L2924/00 , H01L2224/05552
摘要： Solder on slot connections in package on package structures. An apparatus includes a substrate having a front side surface and a back side surface; a first passivation layer disposed over at least one of the front side and back side surfaces; at least one via opening formed in the first passivation layer; a conductor layer disposed over the first passivation layer, coupled to the at least one via and forming a conductive trace on the surface of the first passivation layer; a second passivation layer formed over the conductor layer; and at least one slot opening formed in the second passivation layer and exposing a portion of the conductive trace for receiving a solder connector. In additional embodiments the substrate may be a semiconductor wafer. Methods for forming the structures are disclosed.
摘要翻译： 焊接在封装结构上的封装上的插槽连接上。 一种设备包括：具有前侧表面和后侧表面的基板; 设置在前侧面和后侧表面中的至少一个上的第一钝化层; 形成在所述第一钝化层中的至少一个通孔; 布置在所述第一钝化层上方的导体层，耦合到所述至少一个通孔并在所述第一钝化层的表面上形成导电迹线; 形成在所述导体层上的第二钝化层; 以及形成在所述第二钝化层中并且暴露所述导电迹线的一部分以用于接收焊料连接器的至少一个狭槽开口。 在另外的实施例中，衬底可以是半导体晶片。 公开了形成结构的方法。
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公开(公告)号：US20140070422A1
公开(公告)日：2014-03-13
申请号：US13608946
申请日：2012-09-10
申请人： Ching-Wen Hsiao , Chen-Shien Chen , Wei Sen Chang , Yen-Chang Hu
发明人： Ching-Wen Hsiao , Chen-Shien Chen , Wei Sen Chang , Yen-Chang Hu
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L25/0657 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L23/3142 , H01L23/481 , H01L23/50 , H01L23/5222 , H01L23/528 , H01L23/538 , H01L23/5389 , H01L23/64 , H01L24/19 , H01L24/24 , H01L2221/68327 , H01L2221/68359 , H01L2224/0231 , H01L2224/02372 , H01L2224/02373 , H01L2224/0401 , H01L2224/04105 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/11002 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/16225 , H01L2224/16227 , H01L2224/24195 , H01L2224/2518 , H01L2224/73267 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1434 , H01L2924/15311 , H01L2924/181 , H01L2924/19011 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/00
摘要： A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
摘要翻译： 提供半导体器件和制造方法。 特别地，提供了使用具有通孔和/或其中形成的集成无源器件的块的例如分立连接块的半导体器件。 诸如本文公开的那些实施例可以用于PoP应用中。 在一个实施例中，半导体器件包括模具和封装在模制化合物中的连接块。 可以在模具，连接块和模塑料的表面上形成互连层。 一个或多个管芯和/或封装可以附接到互连层。
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公开(公告)号：US09165887B2
公开(公告)日：2015-10-20
申请号：US13608946
申请日：2012-09-10
申请人： Ching-Wen Hsiao , Chen-Shien Chen , Wei Sen Chang , Yen-Chang Hu
发明人： Ching-Wen Hsiao , Chen-Shien Chen , Wei Sen Chang , Yen-Chang Hu
IPC分类号： H01L23/34 , H01L23/48 , H01L23/538 , H01L23/64 , H01L23/00 , H01L25/065 , H01L23/50
CPC分类号： H01L25/0657 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L23/3142 , H01L23/481 , H01L23/50 , H01L23/5222 , H01L23/528 , H01L23/538 , H01L23/5389 , H01L23/64 , H01L24/19 , H01L24/24 , H01L2221/68327 , H01L2221/68359 , H01L2224/0231 , H01L2224/02372 , H01L2224/02373 , H01L2224/0401 , H01L2224/04105 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/11002 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/16225 , H01L2224/16227 , H01L2224/24195 , H01L2224/2518 , H01L2224/73267 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1434 , H01L2924/15311 , H01L2924/181 , H01L2924/19011 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/00
摘要： A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
摘要翻译： 提供半导体器件和制造方法。 特别地，提供了使用具有通孔和/或其中形成的集成无源器件的块的例如分立连接块的半导体器件。 诸如本文公开的那些实施例可以用于PoP应用中。 在一个实施例中，半导体器件包括模具和封装在模制化合物中的连接块。 可以在模具，连接块和模塑料的表面上形成互连层。 一个或多个管芯和/或封装可以附接到互连层。
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公开(公告)号：US20140077394A1
公开(公告)日：2014-03-20
申请号：US13623474
申请日：2012-09-20
CPC分类号： H01L23/4334 , H01L21/568 , H01L23/49816 , H01L23/49827 , H01L23/5389 , H01L24/16 , H01L24/20 , H01L24/73 , H01L24/83 , H01L2224/12105 , H01L2224/19 , H01L2224/29139 , H01L2224/32245 , H01L2224/73267 , H01L2224/83005 , H01L2224/92244 , H01L2924/00 , H01L2924/181 , H01L2924/00014
摘要： Disclosed herein are a device having an embedded heat spreader and method for forming the same. A carrier substrate may comprise a carrier, an adhesive layer, a base film layer, and a seed layer. A patterned mask is formed with a heat spreader opening and via openings. Vias and a heat spreader may be formed in the pattern mask openings at the same time using a plating process and a die attached to the head spreader by a die attachment layer. A molding compound is applied over the die and heat spreader so that the heat spreader is disposed at the second side of the molded substrate. A first RDL may have a plurality of mounting pads and a plurality of conductive lines is formed on the molded substrate, the mounting pads may have a bond pitch greater than the bond pitch of the die contact pads.
摘要翻译： 本文公开了具有嵌入式散热器的装置及其形成方法。 载体基底可以包括载体，粘合剂层，基底膜层和种子层。 图案化掩模形成有散热器开口和通孔开口。 可以在图案掩模开口中同时使用电镀工艺形成通风口和散热器，并且通过管芯附着层附着到头部扩张器上的管芯。 将模塑料施加在模具和散热器上，使得散热器设置在模制基板的第二侧。 第一RDL可以具有多个安装焊盘，并且在模制的基板上形成多个导电线，安装焊盘可以具有大于管芯接触焊盘的焊接间距的焊接间距。
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公开(公告)号：US08232193B2
公开(公告)日：2012-07-31
申请号：US12832205
申请日：2010-07-08
申请人： Wei Sen Chang
发明人： Wei Sen Chang
IPC分类号： H01L21/768
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/10126 , H01L2224/10145 , H01L2224/1132 , H01L2224/1145 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11823 , H01L2224/11825 , H01L2224/11849 , H01L2224/11906 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13566 , H01L2224/13609 , H01L2224/13611 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/014 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/01051 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： A nickel barrier layer is formed on an upper sidewall surface of a Cu pillar. A mask layer with an opening for defining the Cu pillar window has an upper portion and a lower portion. The upper portion of the mask layer is removed after the formation of the Cu pillar so as to expose the upper sidewall surface of the Cu pillar. The nickel barrier layer is then deposited on the exposed sidewall surface of the Cu pillar followed by removing and the lower portion of the mask layer.
摘要翻译： 在Cu支柱的上侧壁表面上形成镍阻挡层。 具有用于限定Cu柱窗的开口的掩模层具有上部和下部。 在形成Cu柱之后去除掩模层的上部以露出Cu柱的上侧壁表面。 然后将镍阻挡层沉积在Cu柱的暴露的侧壁表面上，然后除去掩模层的下部。
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