公开(公告)号：US20060267184A1

公开(公告)日：2006-11-30

申请号：US11482668

申请日：2006-07-06

申请人： Larry Kinsman ,  Jerry Brooks

发明人： Larry Kinsman ,  Jerry Brooks

IPC分类号： H01L23/34

CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L33/486 ,  H01L33/642 ,  H01L2224/05599 ,  H01L2224/32188 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An inventive integrated circuit package includes a package body, such as a transfer molded plastic or preformed ceramic package body, having an integrated circuit die positioned therein. A lead frame, such as a peripheral lead, Leads-Over-Chip (LOC), or Leads-Under-Chip (LUC) lead frame, includes a plurality of leads with portions enclosed within the package body that electrically connect to the integrated circuit die. A heat sink is positioned at least partially within the package body so a surface of a first portion of the heat sink faces the lead frame in close proximity to a substantial part, such as at least eighty percent, of the area of the enclosed portion of the lead frame to thereby substantially reduce an inductance associated with each of the leads.

摘要翻译： 本发明的集成电路封装包括封装体，例如传输模制塑料或预成型陶瓷封装主体，其中集成有电路管芯。 引线框架，例如外围引线，芯片引线（LOC）或引线片下（LUC）引线框架，包括多个引线，其中封装在封装体内的部分电连接到集成电路 死。 散热器至少部分地定位在封装主体内，使得散热器的第一部分的表面面对引线框架，紧邻主要部件的大部分，例如至少百分之八十的区域的封闭部分的面积 引线框架，从而基本上减少与每个引线相关联的电感。

公开(公告)号：US20070000599A1

公开(公告)日：2007-01-04

申请号：US11514789

申请日：2006-09-01

申请人： Larry Kinsman ,  Timothy Allen ,  Jerry Brooks

发明人： Larry Kinsman ,  Timothy Allen ,  Jerry Brooks

IPC分类号： B32B37/00

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/49121 ,  Y10T29/49172 ,  Y10T156/1002 ,  Y10T156/1064 ,  H01L2924/00 ,  H01L2924/00012

摘要： A LOC die assembly and method is disclosed including a die dielectrically adhered to the underside of a lead frame. The lead frame has stress relief slots formed in the undersides of the lead elements proximate the adhesive to accommodate filler particles lodged between the leads and the active surface of the die during transfer molding of a plastic encapsulant. The increased space created by the slots and flexure in the leads about the slots reduces point stresses on the active surface of the die by the filler particles. The increased flexure in the leads about the slots further enhances the locking of the leads in position with respect to the die.

摘要翻译： 公开了一种LOC模头组件和方法，其包括介电粘附到引线框架的下侧的模具。 引线框架具有形成在接近粘合剂的引线元件的下侧中的应力消除槽，以容纳填充在颗粒之间的填料颗粒，并在塑料密封剂的传递模塑过程中模具的活性表面。 狭槽产生的增加的空间和引线周围的弯曲使得填料颗粒在模具的活性表面上的点应力减小。 引线围绕槽的增加的弯曲进一步增强了引线相对于管芯的位置锁定。

公开(公告)号：US20080224192A1

公开(公告)日：2008-09-18

申请号：US11685808

申请日：2007-03-14

申请人： Luke England ,  Larry Kinsman

发明人： Luke England ,  Larry Kinsman

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14634 ,  H01L21/6835 ,  H01L21/76898 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L27/14636 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/6835 ,  H01L2221/68377 ,  H01L2223/6622 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/221 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/82039 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16235 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

摘要： An imager device is disclosed which includes at least one photosensitive element positioned on a front surface of a substrate and a conductive structure extending at least partially through an opening defined in the substrate to conductively couple to an electrical contact or bond pad on the first surface. An insulating material of a conductive laminate film and/or a mold compound material is positioned within the opening between at least a portion of the conductive structure and the substrate. Also disclosed is a device that comprises a substrate and a plurality of openings in the substrate, wherein each of the openings is adapted to be positioned above an imager device when the substrate is positioned above and secured to an imager substrate. A method of forming an imager device is also disclosed.

摘要翻译： 公开了一种成像器件，其包括位于衬底的前表面上的至少一个感光元件和至少部分延伸通过限定在衬底中的开口的导电结构，以导电耦合到第一表面上的电接触焊盘或接合焊盘。 导电层压膜和/或模具复合材料的绝缘材料位于导电结构的至少一部分和基板之间的开口内。 还公开了一种装置，其包括衬底和衬底中的多个开口，其中当衬底位于成像器衬底上方并固定到成像器衬底上时，每个开口适于位于成像器装置上方。 还公开了一种形成成像器件的方法。

公开(公告)号：US20070013084A1

公开(公告)日：2007-01-18

申请号：US11523915

申请日：2006-09-20

申请人： Larry Kinsman

发明人： Larry Kinsman

IPC分类号： H01L23/48

CPC分类号： H01L24/73 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/1134 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207

摘要： An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active surface and a back surface, wherein the die is attached face down to the first surface of the carrier substrate with conductive bumps therebetween. In addition, a plurality of bond wires is attached through the at least one opening in the carrier substrate between the active surface of the die and the second surface of the carrier substrate. With this arrangement, both the conductive bumps and the bond wires share in the electrical interconnection between the die and the carrier substrate, thereby allowing more space for bond pads to interconnect with bond wires and/or allowing for smaller die sizes.

摘要翻译： 一种用于制造半导体组件的装置，具体地，将半导体管芯互连到载体衬底。 载体衬底包括第一表面和具有穿过其中的至少一个开口的第二表面。 模具包括活性表面和后表面，其中模具面向下地附着到载体基底的第一表面上，其间具有导电凸块。 此外，多个接合线通过载体基板中的至少一个开口附着在管芯的有效表面和载体衬底的第二表面之间。 利用这种布置，导电凸块和接合线都共同地在管芯和载体衬底之间的电互连中，从而允许用于接合焊盘的更多空间与接合线互连和/或允许更小的管芯尺寸。

公开(公告)号：US20060030072A1

公开(公告)日：2006-02-09

申请号：US11219214

申请日：2005-09-01

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L21/50

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A method for securing a semiconductor device to a carrier substrate includes inserting a semiconductor device with a plurality of stub contacts extending from a bottom edge thereof into a receptacle of an alignment device associated with the carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, the semiconductor device is biased so as to establish and maintain electrical communication between the semiconductor device and the carrier substrate.

公开(公告)号：US20060001155A1

公开(公告)日：2006-01-05

申请号：US11219135

申请日：2005-09-01

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L23/04

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A semiconductor device package including leads with substantially planar exposed portions extending from a bottom edge of the package. The exposed portions of the leads may comprise stub contacts extending perpendicularly from the bottom edge. The exposed portions of the leads may be substantially rigid or nondeformable. A complementary alignment device that may be used with the semiconductor device package may include a receptacle for receiving the semiconductor device package.

摘要翻译： 一种半导体器件封装，包括具有从封装的底部边缘延伸的基本平坦的暴露部分的引线。 引线的露出部分可以包括从底部边缘垂直延伸的短截线。 引线的暴露部分可以是基本上刚性的或不可变形的。 可以与半导体器件封装一起使用的互补对准装置可以包括用于接收半导体器件封装的插座。

公开(公告)号：US20050110135A1

公开(公告)日：2005-05-26

申请号：US11028361

申请日：2005-01-03

申请人： David Corisis ,  Walter Moden ,  Leonard Mess ,  Larry Kinsman

发明人： David Corisis ,  Walter Moden ,  Leonard Mess ,  Larry Kinsman

IPC分类号： H01L23/498 ,  H01L25/10 ,  H01L23/52

CPC分类号： H01L24/06 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/145 ,  H05K3/222 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the substantial matching of impedance for the circuits connected to the semiconductor devices.

摘要翻译： 可堆叠形成高密度组件的球栅阵列封装以及堆叠球栅阵列的方法。 球栅阵列封装包括柔性或刚性衬底。 球栅阵列封装还包括用于连接到半导体器件的电路的阻抗的基本匹配的布置。

公开(公告)号：US06777261B2

公开(公告)日：2004-08-17

申请号：US10304911

申请日：2002-11-26

申请人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

发明人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

IPC分类号： H01L2144

CPC分类号： H01L25/0657 ,  H01L23/3171 ,  H01L23/528 ,  H01L2224/05553 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/30107 ,  H01L2924/00

摘要： A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end. The present invention contemplates wire bonding and encapsulation of individual die as well as multiple die on a single wafer.

摘要翻译： 一种用于封装半导体器件的方法包括将多个引线引线连接到半导体器件上的对应的多个电连接焊盘，覆盖半导体器件的至少一部分以及每个引线的至少一部分具有封装 并且去除所述封装材料的一部分和所述导线引线中的每一个的一部分以形成封装的半导体器件，其中所述引线中的每一个仅在一端具有暴露部分。 本发明还包括具有集成电路器件的封装半导体器件，该集成电路器件具有多个电连接焊盘，耦合到多个电连接焊盘的多个引线引线以及覆盖该集成电路的至少一部分的封装材料的覆盖物 装置并且覆盖每个导线，其中每个导线具有暴露端。 本发明设想在单个晶片上引线接合和封装单个管芯以及多个管芯。

公开(公告)号：US20070029681A1

公开(公告)日：2007-02-08

申请号：US11495160

申请日：2006-07-27

申请人： Larry Kinsman

发明人： Larry Kinsman

IPC分类号： H01L23/52

CPC分类号： H01L24/85 ,  H01L23/13 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48471 ,  H01L2224/48477 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/78302 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2924/00

摘要： The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component mounted to a substrate. The substrate carries a plurality of bond pads at a location substantially coplanar with a terminal surface of the microelectronic component. This enables a smaller package to be produced by moving the bond pads laterally inwardly toward the periphery of the microelectronic component.

摘要翻译： 本公开提出了用于制造微电子部件组件的各种微电子部件组件设计和方法。 在一个具体实现中，微电子部件组件包括安装到基板的微电子部件。 衬底在与微电子部件的端子表面基本上共面的位置处承载多个接合焊盘。 这使得能够通过将接合焊盘横向向内移动到微电子部件的周边来产生较小的封装。

公开(公告)号：US07095115B2

公开(公告)日：2006-08-22

申请号：US10610556

申请日：2003-07-02

申请人： Larry Kinsman ,  Richard Wensel ,  Jeff Reeder

发明人： Larry Kinsman ,  Richard Wensel ,  Jeff Reeder

IPC分类号： H01L23/06 ,  H01L23/22 ,  H01L23/24 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： In one implementation, a circuit substrate includes a substrate having opposing sides. At least one of the sides is configured for transfer mold packaging and has conductive traces formed thereon. A soldermask is received on the one side, and has a plurality of openings formed therethrough to locations on the conductive traces. The soldermask includes a peripheral elongated trench therein positioned on the one side to align with at least a portion of an elongated mold void perimeter of a transfer mold to be used for transfer mold packaging of the one side. In one implementation, the invention includes a transfer mold semiconductor packaging process. In one implementation, the invention includes a semiconductor package. In one implementation, the invention includes a ball grid array.

摘要翻译： 在一个实施方式中，电路基板包括具有相对侧的基板。 至少一个侧面被配置用于转移模具包装并且在其上形成导电迹线。 焊接掩模在一侧被接收，并且具有穿过其形成的多个开口穿过导电迹线上的位置。 所述焊接掩模包括位于所述一侧上的外围细长沟槽，以与所述一侧的转移模具包装用于转移模具的细长模具空隙周边的至少一部分对准。 在一个实施方案中，本发明包括转移模具半导体封装工艺。 在一个实现中，本发明包括半导体封装。 在一个实施方式中，本发明包括球栅阵列。