公开(公告)号：US09640387B2

公开(公告)日：2017-05-02

申请号：US14838793

申请日：2015-08-28

Applicant: HITACHI KOKUSAI ELECTRIC INC.

Inventor： Ryuji Yamamoto ,  Tsukasa Kamakura ,  Yoshiro Hirose ,  Satoshi Shimamoto

IPC: H01L21/02 ,  C23C16/44

CPC classification number: H01L21/02334 ,  C23C16/4405 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02194 ,  H01L21/02208 ,  H01L21/02211 ,  H01L21/0228 ,  H01L21/67

Abstract: A technique includes loading a substrate into a process chamber, supporting the substrate by a mounting table having a heater therein in the process chamber, forming a film on the substrate by supplying a processing gas into the process chamber in a state where the mounting table having the substrate supported thereon is disposed in a first position and the heater is turned on, unloading the substrate on which the film is formed, and supplying a reactive gas into the process chamber in a state where the mounting table is disposed in a second position and the heater is turned on. The second position is closer to a ceiling portion in the process chamber than the first position.

公开(公告)号：US09607884B2

公开(公告)日：2017-03-28

申请号：US14975518

申请日：2015-12-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takayuki Gotou

IPC: H01L21/00 ,  H01L21/76 ,  H01L21/768 ,  H01L23/498 ,  H01L23/532 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/76802 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/31144 ,  H01L21/7681 ,  H01L21/76832 ,  H01L21/76877 ,  H01L23/49827 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Manufacturing stability of a semiconductor device is improved. A method of manufacturing a semiconductor device includes the steps of: forming an etching stopper film over a first interlayer insulating film; forming an inorganic insulating film over the etching stopper film; forming a resist film over the inorganic insulating film; selectively etching the etching stopper film and the inorganic insulating film by using the resist film as a mask to form a first opening in the etching stopper film and to form a second opening in the inorganic insulating film; removing the resist film by O2 plasma ashing; forming a second interlayer insulating film over the inorganic insulating film; and etching the second interlayer insulating film to form a wiring groove that is coupled to the second opening, and etching a portion located under the first opening of the first interlayer insulating film to form a via hole.

公开(公告)号：US09588425B2

公开(公告)日：2017-03-07

申请号：US15288722

申请日：2016-10-07

Applicant: KANEKA CORPORATION

Inventor： Masahito Ide ,  Hirofumi Inari ,  Aki Kitajima ,  Komei Tahara ,  Takao Manabe

IPC: G03F7/004 ,  G03F7/075 ,  H01L29/51 ,  H01L29/423 ,  C07F7/18 ,  G03F7/16 ,  G03F7/20 ,  G03F7/32 ,  G03F7/40 ,  H01L29/786 ,  H01L29/66 ,  H01L21/441 ,  H01L23/29 ,  H01L21/033 ,  G03F7/039 ,  H01L51/05 ,  H01L51/00 ,  G03F7/027 ,  H01L21/02 ,  C08G77/388 ,  C08K5/549

CPC classification number: G03F7/0755 ,  C07F7/1804 ,  C08G77/388 ,  C08K5/549 ,  G03F7/027 ,  G03F7/0392 ,  G03F7/0757 ,  G03F7/162 ,  G03F7/20 ,  G03F7/322 ,  G03F7/40 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/0332 ,  H01L21/441 ,  H01L23/293 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/66969 ,  H01L29/7869 ,  H01L51/0094 ,  H01L51/0508

Abstract: The present invention aims to provide positive photosensitive compositions that have excellent patterning properties and can exhibit excellent electrical insulation reliability when cured (as thin films). The positive photosensitive composition according to a first aspect of the present invention is characterized by including (A) a compound that contains an alkenyl group or a SiH group within a molecule and has a structure that decomposes in the presence of acid to generate an acidic group or a hydroxyl group; (B) a compound that contains a SiH group or an alkenyl group within a molecule; (C) a hydrosilylation catalyst; and (D) a photoacid generator.

Abstract translation: 本发明的目的在于提供具有优异的图案化特性的正型光敏组合物，并且在固化时（作为薄膜）可以表现出优异的电绝缘可靠性。 根据本发明第一方面的正型光敏组合物的特征在于包括（A）在分子内含有烯基或SiH基的化合物，并且具有在酸存在下分解以产生酸性基团的结构 或羟基; （B）分子内含有SiH基或烯基的化合物; （C）氢化硅烷化催化剂; 和（D）光致酸产生剂。

公开(公告)号：US09576850B2

公开(公告)日：2017-02-21

申请号：US14374879

申请日：2013-01-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Tadahiro Ishizaka ,  Atsushi Gomi ,  Kenji Suzuki ,  Tatsuo Hatano ,  Yasushi Mizusawa

IPC: H01L21/768 ,  C23C16/16 ,  H01L23/532 ,  C23C16/02 ,  H01L21/3105 ,  H01L21/285 ,  H01L21/02

CPC classification number: H01L21/76879 ,  C23C16/0272 ,  C23C16/16 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/28556 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: When a recess is formed in a SiCOH film, C is removed from the film to form a damage layer. If the damage layer is removed by hydrofluoric acid or the like, the surface becomes hydrophobic. By supplying a boron compound gas, a silicon compound gas or a gas containing trimethyl aluminum to the SiCOH film, B, Si or Al is adsorbed on the SiCOH film. These atoms bond with Ru and a Ru film is easily formed on the SiCOH film. The Ru film is formed using, for example, Ru3(CO)12 gas and CO gas. Copper is filled in the recess and an upper side wiring structure is formed by carrying out CMP processing.

Abstract translation: 当在SiCOH膜中形成凹部时，从膜中除去C以形成损伤层。 如果通过氢氟酸等去除损伤层，则表面变得疏水。 通过供给硼化合物气体，硅化合物气体或含有三甲基铝的气体到SiCOH膜B，Si或Al被吸附在SiCOH膜上。 这些原子与Ru结合，容易在SiCOH膜上形成Ru膜。 Ru膜使用例如Ru 3（CO）12气体和CO气体形成。 铜填充在凹部中，并且通过进行CMP处理形成上侧布线结构。

公开(公告)号：US09568825B2

公开(公告)日：2017-02-14

申请号：US14748911

申请日：2015-06-24

Applicant: SAMSUNG SDI CO., LTD.

Inventor： Youn-Hee Nam ,  Hea-Jung Kim ,  Hyun-Ji Song

IPC: G03F7/11 ,  H01L21/02 ,  H01L21/311 ,  H01L21/027 ,  G03F7/09 ,  G03F7/40 ,  C09D165/02 ,  C08G61/02 ,  C09D165/00

CPC classification number: G03F7/11 ,  C08G61/02 ,  C08G2261/1424 ,  C08G2261/146 ,  C08G2261/148 ,  C08G2261/3424 ,  C08G2261/45 ,  C08G2261/72 ,  C08G2261/90 ,  C09D165/00 ,  C09D165/02 ,  G03F7/094 ,  G03F7/40 ,  H01L21/0212 ,  H01L21/02126 ,  H01L21/02304 ,  H01L21/0276 ,  H01L21/31116 ,  H01L21/31144

Abstract: A hardmask composition includes a polymer including a moiety represented by the following Chemical Formula 1 and a solvent. In the Chemical Formula 1, A, B, R1 and R2 are the same as defined in the detailed description.

Abstract translation: 硬掩模组合物包括包含由以下化学式1表示的部分的聚合物和溶剂。 在化学式1中，A，B，R 1和R 2与详细说明中所定义相同。

公开(公告)号：US20170040231A1

公开(公告)日：2017-02-09

申请号：US15066667

申请日：2016-03-10

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Nobuyoshi SATO

IPC: H01L21/66 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L22/20 ,  G03F7/0002 ,  G03F7/168 ,  H01L21/0212 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/31144 ,  H01L22/12

Abstract: A method for processing a substrate exposes a silicon-containing surface at a circumferential edge portion of a first main surface of a substrate to be processed, performs surface processing to the silicon-containing surface to increase a contact angle of the silicon-containing surface with respect to a resist material, comparing with the contact angle before the surface processing is performed, supplies the resist material onto the substrate to be processed after the surface processing, and transfers a template pattern to the resist material.

Abstract translation: 用于处理基板的方法在待处理基板的第一主表面的周缘部露出含硅表面，对含硅表面进行表面处理，以增加含硅表面的接触角， 相对于抗蚀剂材料，与进行表面处理之前的接触角相比，在表面处理后将抗蚀剂材料供给到待处理的基板上，并将模板图案转印到抗蚀剂材料上。

公开(公告)号：US09558960B2

公开(公告)日：2017-01-31

申请号：US14757850

申请日：2015-12-24

Applicant: Tokyo Electron Limited

Inventor： Takahiro Shiozawa ,  Kenichi Ueda

IPC: H01L21/3105 ,  H01L21/027 ,  H01L21/67 ,  H05B3/00 ,  B05D3/02 ,  H01L21/02 ,  H01L21/687

CPC classification number: H01L21/31058 ,  B05D3/0254 ,  B05D3/0281 ,  H01L21/02115 ,  H01L21/02126 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/02337 ,  H01L21/0273 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/31144 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/6715 ,  H01L21/6875 ,  H05B3/0047

Abstract: A substrate processing method includes a coating step that applies a coating liquid to a substrate having a front surface on which a pattern is formed, thereby forming a coating film on the substrate, a film removing step that heats the substrate to gasify components of the coating film thereby to reduce a thickness of the film, and a film curing step that is performed after or simultaneously with the film removing step and that heats the substrate to cure the coating film through crosslinking reaction. The film removing step is performed under conditions ensuring that an average thickness of the cured coating film is not greater than 80% of an average thickness of the coating film before being subjected to the film removing step.

Abstract translation: 基板处理方法包括将涂布液涂布到具有图案的正面的基板上的涂布步骤，从而在基板上形成涂膜;膜移除步骤，其加热基板以使涂层的成分气化 膜，从而减小膜的厚度，以及在除膜步骤之后或同时进行的膜固化步骤，并且通过交联反应加热基板以固化涂膜。 膜去除步骤在确保固化涂膜的平均厚度不大于进行膜除去步骤之前的涂膜的平均厚度的80％的条件下进行。

公开(公告)号：US20170011908A1

公开(公告)日：2017-01-12

申请号：US15204781

申请日：2016-07-07

Applicant: HITACHI KOKUSAI ELECTRIC INC.

Inventor： Tatsuru MATSUOKA ,  Yoshiro HIROSE ,  Yoshitomo HASHIMOTO

IPC: H01L21/02 ,  H01L21/673 ,  C23C16/455 ,  H01L21/67

CPC classification number: H01L21/02126 ,  C23C16/45531 ,  H01L21/0214 ,  H01L21/0228 ,  H01L21/67109 ,  H01L21/67316

Abstract: A method of manufacturing a semiconductor device includes forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: supplying a precursor containing a predetermined element to the substrate in a process chamber, removing the precursor from the process chamber, supplying a first reactant containing nitrogen, carbon and hydrogen to the substrate, removing the first reactant from the process chamber, supplying a second reactant containing oxygen to the substrate, and removing the second reactant from the process chamber. A time period of the act of removing the precursor is set to be longer than a time period of the act of removing the first reactant, or a time period of the act of removing the second reactant is set to be longer than the time period of the act of removing the first reactant.

Abstract translation: 制造半导体器件的方法包括通过执行预定次数的周期在衬底上形成膜。 该循环包括非同时执行：在处理室中将含有预定元素的前体供应到基底，从处理室中除去前体，向基底提供含有氮，碳和氢的第一反应物，将第一反应物从 所述处理室将含有氧的第二反应物供应到所述基材，以及从所述处理室除去所述第二反应物。 除去前体的作用的时间段被设定为长于除去第一反应物的作用的时间段，或者将除去第二反应物的作用的时间段设定为长于 去除第一反应物的行为。

公开(公告)号：US09543191B2

公开(公告)日：2017-01-10

申请号：US14380306

申请日：2013-02-21

Applicant: TOKYO ELECTRON LIMITED ,  ZEON CORPORATION ,  TOHOKU UNIVERSITY

Inventor： Takenao Nemoto ,  Takehisa Saito ,  Yugo Tomita ,  Hirokazu Matsumoto ,  Akihide Shirotori ,  Akinobu Teramoto ,  Xun Gu

IPC: H01L23/48 ,  H01L21/00 ,  H01L21/44 ,  H01L21/31 ,  H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01J37/32 ,  H01L21/3105 ,  H01L21/3205 ,  H01L21/311

CPC classification number: H01L21/768 ,  H01J37/32192 ,  H01L21/02063 ,  H01L21/0212 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/31058 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/76801 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76831 ,  H01L23/53204 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device (100) includes a step in which a CF film (106) is formed on top of a semiconductor substrate (102), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (106), and a step in which a copper wiring member (114) is embedded in the grooves (C).

Abstract translation: 提供一种半导体器件和半导体器件制造方法，其可以改善绝缘膜和布线构件之间的接触及其可靠性。 该半导体装置（100）的制造方法包括在半导体基板（102）的顶部形成有CF膜（106）的步骤，对应于布线图案（P）的槽（C）为 形成在所述CF膜（106）中，以及将铜配线构件（114）埋设在所述槽（C）中的工序。

公开(公告)号：US09543159B2

公开(公告)日：2017-01-10

申请号：US14671552

申请日：2015-03-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Chih Chen ,  Chia-Wei Chen ,  Ching-Yu Chang ,  Shao-Jyun Wu

IPC: H01L21/30 ,  H01L21/02 ,  H01L21/308 ,  H01L21/266 ,  H01L21/027 ,  H01L21/32 ,  H01L21/67

CPC classification number: H01L21/3081 ,  G03F7/0751 ,  G03F7/0752 ,  G03F7/091 ,  G03F7/094 ,  H01L21/02126 ,  H01L21/0271 ,  H01L21/0274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/266 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/32 ,  H01L21/67075

Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer of a polymeric material on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a silicon concentration in weight percentage less than 20% and is wet strippable; forming a patterned photosensitive layer on the silicon-containing middle layer; performing a first etching process to transfer a pattern of the patterned photosensitive layer to the silicon-containing middle layer; performing a second etching process to transfer the pattern to the under layer; and performing a wet stripping process to the silicon-containing middle layer and the under layer.

Abstract translation: 根据一些实施例提供光刻方法。 光刻方法包括在基底上形成聚合物材料的底层; 在所述下层上形成含硅中间层，其中，所述含硅中间层的硅浓度的重量百分比小于20％，并且是湿式可剥离的; 在含硅中间层上形成图案化感光层; 执行第一蚀刻工艺以将图案化感光层的图案转移到含硅中间层; 执行第二蚀刻工艺以将图案转印到下层; 并对含硅中间层和下层进行湿剥离处理。