公开(公告)号：US08309401B2

公开(公告)日：2012-11-13

申请号：US13030141

申请日：2011-02-18

申请人： Shih-Wen Chou

发明人： Shih-Wen Chou

IPC分类号： H01L21/60

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49052 ,  H01L2224/73265 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A manufacturing method of a non-leaded package structure is provided. An upper surface and a lower surface of a metal base plate are patterned so as to form a plurality of first protruding parts and at least a second protruding part on the upper surface and to form a plurality of first recess patterns on the lower surface corresponding to the first protruding parts. A first solder layer is formed in each of the first recess patterns respectively. A chip is mounted on the second protruding part and electrically connected to the first protruding parts with a plurality of bonding wires. An encapsulant is formed on the upper surface. A back etching process is performed on the lower surface to partially remove the metal base plate until the encapsulant is exposed and a lead group including at least a die pad and a plurality of leads is defined.

摘要翻译： 提供一种非引线封装结构的制造方法。 图案化金属基板的上表面和下表面，以在上表面上形成多个第一突出部分和至少第二突出部分，并且在下表面上形成对应于多个第一凹陷图案 第一突出部分。 第一焊料层分别形成在每个第一凹槽图案中。 芯片安装在第二突出部分上并用多个接合线电连接到第一突出部分。 在上表面上形成密封剂。 在下表面上执行背蚀刻工艺以部分地去除金属基板，直到密封剂暴露，并且限定至少包括管芯焊盘和多个引线的引线组。

公开(公告)号：US08269352B2

公开(公告)日：2012-09-18

申请号：US13004946

申请日：2011-01-12

申请人： David Wei Wang ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

发明人： David Wei Wang ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Jar-Dar Yang ,  Yi-Chang Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A multi-chip stack package structure comprises a substrate, which has a chip placement area defined on its upper surface and a plurality of contacts disposed outside the chip placement area; a first chip is disposed in the chip placement area with the rear surface, a plurality of first pads being disposed on the active surface and a plurality of first bumps each being formed on one of the first pads; a plurality of metal wires connect the first bumps to the contacts; a second chip with a plurality of second pads being disposed on the active surface and a plurality of second bumps each being formed on one of the second pads, the second chip being mounted to the first chip with its active surface facing the active surface of the first chip, wherein the second bumps correspondingly connect the metal wires and the first bumps respectively.

摘要翻译： 多芯片堆叠封装结构包括：衬底，其具有限定在其上表面上的芯片放置区域和布置在芯片放置区域外部的多个触点; 第一芯片设置在具有后表面的芯片布置区域中，多个第一焊盘设置在有源表面上，并且多个第一凸块各自形成在第一焊盘之一上; 多个金属线将第一凸块连接到触点; 具有多个第二焊盘的第二芯片设置在所述有源表面上，并且多个第二凸块各自形成在所述第二焊盘之一上，所述第二芯片安装到所述第一芯片，其有源表面面向所述第二焊盘的有效表面 第一芯片，其中所述第二凸块分别对应地连接所述金属线和所述第一凸块。

公开(公告)号：US08207603B2

公开(公告)日：2012-06-26

申请号：US12849188

申请日：2010-08-03

申请人： Geng-Shin Shen ,  Wu-Chang Tu

发明人： Geng-Shin Shen ,  Wu-Chang Tu

IPC分类号： H01L23/02 ,  H01L23/48

CPC分类号： H01L23/49541 ,  H01L23/49531 ,  H01L23/49551 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/92247 ,  H01L2225/06562 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a stacked chip package structure with leadframe having inner leads with transfer pad, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided between the plurality of inner leads arranged in rows facing each other and vertically distant from the plurality of inner leads; an offset chip-stacked structure formed with a plurality of chips stacked together, the offest chip-stacked structure being set on the die pad and electrically connected to the plurality of inner leads arranged in rows facing each other; and an encapsulant covering the offset chip-stacked structure and the leadframe, the plurality of outer leads extending out of said encapsulant; the improvement of which being that the inner leads of the leadframe are coated with an insulating layer and a plurality of metal pads are selectively formed on the insulating layer.

摘要翻译： 本发明提供一种具有引线框架的堆叠式芯片封装结构，其具有带有传输焊盘的内引线，包括：引线框架，由相互排列成行的多个内引线，多个外引线和管芯焊盘构成， 衬垫设置在彼此相对并且彼此垂直远离多个内引线的行中排列的多个内引线之间; 叠置了多个芯片的偏置芯片堆叠结构，最小的芯片堆叠结构被设置在芯片焊盘上并电连接到彼此相对布置的多个内部引线; 以及覆盖所述偏移芯片堆叠结构和所述引线框的密封剂，所述多个外引线从所述密封剂延伸出来; 其改进之处在于引线框架的内引线被覆有绝缘层，并且绝缘层上选择性地形成多个金属焊盘。

公开(公告)号：US20120153449A1

公开(公告)日：2012-06-21

申请号：US13030141

申请日：2011-02-18

申请人： Shih-Wen Chou

发明人： Shih-Wen Chou

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49052 ,  H01L2224/73265 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A manufacturing method of a non-leaded package structure is provided. An upper surface and a lower surface of a metal base plate are patterned so as to form a plurality of first protruding parts and at least a second protruding part on the upper surface and to form a plurality of first recess patterns on the lower surface corresponding to the first protruding parts. A first solder layer is formed in each of the first recess patterns respectively. A chip is mounted on the second protruding part and electrically connected to the first protruding parts with a plurality of bonding wires. An encapsulant is formed on the upper surface. A back etching process is performed on the lower surface to partially remove the metal base plate until the encapsulant is exposed and a lead group including at least a die pad and a plurality of leads is defined.

摘要翻译： 提供一种非引线封装结构的制造方法。 图案化金属基板的上表面和下表面，以在上表面上形成多个第一突出部分和至少第二突出部分，并且在下表面上形成对应于多个第一凹陷图案 第一突出部分。 第一焊料层分别形成在每个第一凹槽图案中。 芯片安装在第二突出部分上并用多个接合线电连接到第一突出部分。 在上表面上形成密封剂。 在下表面上执行背蚀刻工艺以部分地去除金属基板直到密封剂暴露，并且限定包括至少一个管芯焊盘和多个引线的引线组。

公开(公告)号：US08105876B2

公开(公告)日：2012-01-31

申请号：US13016453

申请日：2011-01-28

申请人： Chun Ying Lin ,  Geng Shin Shen ,  Yu Tang Pan ,  Shih Wen Chou

发明人： Chun Ying Lin ,  Geng Shin Shen ,  Yu Tang Pan ,  Shih Wen Chou

IPC分类号： H01L21/00

CPC分类号： H01L21/4842 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H05K3/3426 ,  H05K2201/09745 ,  H05K2201/10689 ,  H05K2201/10787 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A leadframe employed by a leadless package comprises a plurality of package units and an adhesive tape. Each of the package units has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings. The adhesive tape is adhered to the surfaces of the plurality of package units and fixes the die pad and the plurality of pins.

公开(公告)号：US08093106B2

公开(公告)日：2012-01-10

申请号：US12565355

申请日：2009-09-23

申请人： Jun-Yong Wang ,  Geng-Shin Shen

发明人： Jun-Yong Wang ,  Geng-Shin Shen

IPC分类号： H01L21/00

CPC分类号： H01L24/13 ,  H01L21/56 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： This invention relates to a packaging structure and method for manufacturing the packaging structure. The packaging structure comprises a substrate film, a plurality of chips, a compound resin layer and a support layer. The substrate film is formed with circuits having a plurality of terminals exposed from a solder mask. The chips, each of which has a plurality of pads, under bump metals (UBMs) formed on the pads, and composite bumps disposed onto the UBMs, are bonded onto the substrate film to form the first tape. The second tape comprises the support layer and the compound resin layer formed on the support layer. The first tape and the second tape are both in reel-form and are expanded towards a pair of rollers to be heated and pressurized for encapsulating the chips.

摘要翻译： 本发明涉及用于制造包装结构的包装结构和方法。 包装结构包括基底膜，多个芯片，复合树脂层和支撑层。 衬底膜由具有从焊料掩模暴露的多个端子的电路形成。 每个芯片具有多个焊盘，形成在焊盘上的凸块下金属（UBM）和设置在UBM上的复合凸块相连接，形成第一条带。 第二带包括支撑层和形成在支撑层上的复合树脂层。 第一带和第二带都是卷状的并且朝向一对辊膨胀，以被加热和加压以封装芯片。

公开(公告)号：US20110304991A1

公开(公告)日：2011-12-15

申请号：US12948964

申请日：2010-11-18

申请人： TZU HSIN HUANG ,  YU TING YANG ,  HUNG HSIN LIU ,  AN HONG LIU ,  GENG SHIN SHEN ,  DAVID WEI WANG ,  SHIH FU LEE

发明人： TZU HSIN HUANG ,  YU TING YANG ,  HUNG HSIN LIU ,  AN HONG LIU ,  GENG SHIN SHEN ,  DAVID WEI WANG ,  SHIH FU LEE

IPC分类号： H05K7/20 ,  H05K1/00 ,  B82Y30/00

CPC分类号： H05K7/205 ,  B82B1/005 ,  B82Y10/00 ,  B82Y30/00 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/525 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29393 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/456 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K5/0213 ,  Y10S977/932 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2224/05124 ,  H01L2224/05147

摘要： A thermally enhanced electronic package comprises a driver chip, an insulator, a flexible carrier, and carbon nanocapsules. The flexible carrier includes a flexible substrate, a wiring layer formed on the substrate, and a resistant overlaying the wiring layer. The driver chip is connected to the wiring layer. The insulator is filled in the gap between the driver chip and the flexible carrier. The carbon nanocapsules are disposed on the driver chip, on the resistant, on the flexible carrier, or in the insulator to enhance heat dissipation of electronic packages.

摘要翻译： 热增强型电子封装包括驱动器芯片，绝缘体，柔性载体和碳纳米胶囊。 柔性载体包括柔性基板，形成在基板上的布线层和覆盖布线层的电阻。 驱动器芯片连接到布线层。 绝缘体填充在驱动器芯片和柔性载体之间的间隙中。 碳纳米胶囊设置在驱动芯片上，电阻上，柔性载体上或绝缘体中，以增强电子封装的散热。

公开(公告)号：US20110156281A1

公开(公告)日：2011-06-30

申请号：US12832223

申请日：2010-07-08

申请人： Yu-Tang Pan ,  Shih-Wen Chou

发明人： Yu-Tang Pan ,  Shih-Wen Chou

IPC分类号： H01L23/49 ,  H01L23/488

CPC分类号： H01L24/49 ,  H01L23/3121 ,  H01L23/49838 ,  H01L23/49861 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The present invention relates to a quad flat no lead (QFN) package is provided. In the invention, a plurality of first pads are disposed outside an extension area of a conductive circuit layer, and a plurality of second pads are disposed inside a die bonding area of the conductive circuit layer, wherein the extension area surrounds the die bonding area. First ends of a plurality of traces are connected to the second pads, and second ends of the traces are located in the extension area. An insulating layer fills at least the die bonding area and the extension area, and exposes top surfaces and bottom surfaces of the second pads. A chip is mounted at the die bonding area and a plurality of wires electrically connect the chip to the first pads and the second ends of the traces respectively. An encapsulation material is used to cover the conductive circuit layer, the chip and the wires. Whereby, the package of the invention can have more inputs/outputs terminals, and the insulating layer can prevent moisture permeation from corroding the joints between the wires and the first pads and the second ends of the traces, thus increasing the reliability of the package of the invention.

摘要翻译： 本发明涉及一种四边形无铅（QFN）封装。 在本发明中，多个第一焊盘设置在导电电路层的延伸区域的外侧，并且多个第二焊盘设置在导电电路层的管芯接合区域的内部，其中延伸区域围绕管芯接合区域。 多个迹线的第一端连接到第二焊盘，并且迹线的第二端位于扩展区域中。 绝缘层至少填充芯片接合区域和延伸区域，并且暴露第二焊盘的顶表面和底表面。 芯片安装在管芯接合区域，并且多条电线分别将芯片电连接到第一焊盘和迹线的第二端。 封装材料用于覆盖导电电路层，芯片和电线。 由此，本发明的封装可以具有更多的输入/输出端子，并且绝缘层可以防止水分渗透腐蚀电线与第一焊盘和迹线的第二端之间的接合，从而增加封装的可靠性 本发明。

公开(公告)号：US07927922B2

公开(公告)日：2011-04-19

申请号：US12191382

申请日：2008-08-14

申请人： Geng-Shin Shen ,  Yu-Ren Chen

发明人： Geng-Shin Shen ,  Yu-Ren Chen

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L25/50 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/25 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L33/486 ,  H01L33/54 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2933/005 ,  H01L2933/0066 ,  H01L2224/82 ,  H01L2924/00

摘要： A dice rearrangement package structure is provided, which a dice having an active surface and a bottom surface, and a plurality of pads is disposed on the active surface; a package body is provided to cover the dices and the plurality of pads being exposed; one ends of plurality of metal traces is electrically connected to the each pads; a protection layer is provided to cover the active surface and the other ends of the exposed metal traces is electrically connected to the plurality of conductive elements, the characteristic in that the package body is a B-stage material.

摘要翻译： 提供了具有活性表面和底表面的骰子，并且多个衬垫设置在活性表面上的骰子重排包装结构， 提供包装体以覆盖所述骰子并且所述多个垫被暴露; 多个金属迹线的一端电连接到每个焊盘; 提供保护层以覆盖有源表面，并且暴露的金属迹线的另一端电连接到多个导电元件，其特征在于封装体是B级材料。

公开(公告)号：US07902649B2

公开(公告)日：2011-03-08

申请号：US11934287

申请日：2007-11-02

申请人： Chun Ying Lin ,  Geng Shin Shen ,  Yu Tang Pan ,  Shih Wen Chou

发明人： Chun Ying Lin ,  Geng Shin Shen ,  Yu Tang Pan ,  Shih Wen Chou

IPC分类号： H01L23/495

CPC分类号： H01L21/4842 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H05K3/3426 ,  H05K2201/09745 ,  H05K2201/10689 ,  H05K2201/10787 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A leadframe employed by a leadless package comprises a plurality of package units and an adhesive tape. Each of the package units has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings. The adhesive tape is adhered to the surfaces of the plurality of package units and fixes the die pad and the plurality of pins.

摘要翻译： 由无引线封装采用的引线框架包括多个封装单元和胶带。 每个封装单元具有带有多个开口的管芯焊盘和设置在多个开口中的多个销。 粘合带粘附到多个封装单元的表面并固定芯片焊盘和多个引脚。