公开(公告)号：US20130235517A1

公开(公告)日：2013-09-12

申请号：US13866713

申请日：2013-04-19

Applicant: MICRON TECHNOLOGY, INC

Inventor： David J. Corisis ,  Choon Kuan Lee ,  Chin Hui Chong

IPC: H05K1/11 ,  G06F1/16 ,  H05K1/18

CPC classification number: H05K1/115 ,  G01R31/026 ,  G06F1/16 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0221 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/0296 ,  H05K1/18 ,  H05K3/42 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09809 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive interconnecting member extends through the hole and communicates electrically with the second trace of each of the first and second pairs. The first and second interconnecting members are separated from one another by a distance substantially equal to a distance separating the conductive traces in each pair. Electronic device assemblies include a transmitting device configured to transmit a differential signal through a conductive structure to a receiving device. The conductive structure includes first and second pair of conductive traces with first and second interconnecting members providing electrical communication therebetween.

公开(公告)号：US20190279964A1

公开(公告)日：2019-09-12

申请号：US16285081

申请日：2019-02-25

Applicant: Micron Technology, Inc.

Inventor： Kevin Gibbons ,  Tracy V. Reynolds ,  David J. Corisis

IPC: H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H05K3/34 ,  H05K1/11 ,  H01L23/00 ,  H05K7/02

Abstract: Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module substrate having a module material and an aperture extending at least partially into the module material. The computer modules can also include a microelectronic package carried by the module substrate. The microelectronic package includes a semiconductor die carried by a package substrate. At least a portion of the semiconductor die extends into the substrate material via the aperture.

公开(公告)号：US20180040582A1

公开(公告)日：2018-02-08

申请号：US15787041

申请日：2017-10-18

Applicant: Micron Technology, Inc.

Inventor： Matt E. Schwab ,  David J. Corisis ,  J. Michael Brooks

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L24/03 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/09 ,  H01L24/17 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/11011 ,  H01L2224/13111 ,  H01L2224/1405 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a system comprises a semiconductor component including an interposer substrate, a microelectronic die over the interposer substrate, and a connection structure composed of a volume of solder material between the interposer substrate and the microelectronic die. The connection structure can include at least one of (a) a single, unitary structure covering approximately all of the back side of the microelectronic die, and (b) a structure electrically isolated from internal active features of the microelectronic die. In some embodiments, the connection structure can be positioned to provide generally consistent stress distribution within the system.

公开(公告)号：US20170294414A1

公开(公告)日：2017-10-12

申请号：US15626843

申请日：2017-06-19

Applicant: Micron Technology, Inc.

Inventor： Kevin Gibbons ,  Tracy V. Reynolds ,  David J. Corisis

IPC: H01L25/065 ,  H05K1/18 ,  H05K3/34 ,  H01L25/10

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L24/83 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/19104 ,  H05K1/111 ,  H05K1/182 ,  H05K1/183 ,  H05K3/3436 ,  H05K7/02 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10727 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/4913 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module substrate having a module material and an aperture extending at least partially into the module material. The computer modules can also include a microelectronic package carried by the module substrate. The microelectronic package includes a semiconductor die carried by a package substrate. At least a portion of the semiconductor die extends into the substrate material via the aperture.

公开(公告)号：US08959759B2

公开(公告)日：2015-02-24

申请号：US14171584

申请日：2014-02-03

Applicant: Micron Technology, Inc.

Inventor： Kevin Gibbons ,  Tracy V. Reynolds ,  David J. Corisis

IPC: H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H05K3/34 ,  H01L23/00 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L24/83 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/19104 ,  H05K1/111 ,  H05K1/182 ,  H05K1/183 ,  H05K3/3436 ,  H05K7/02 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10727 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/4913 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module substrate having a module material and an aperture extending at least partially into the module material. The computer modules can also include a microelectronic package carried by the module substrate. The microelectronic package includes a semiconductor die carried by a package substrate. At least a portion of the semiconductor die extends into the substrate material via the aperture.

Abstract translation: 公开了具有小厚度和相关制造方法的计算机模块。 在一个实施例中，计算机模块可以包括具有模块材料和至少部分延伸到模块材料中的孔的模块衬底。 计算机模块还可以包括由模块衬底承载的微电子封装。 微电子封装包括由封装衬底承载的半导体管芯。 半导体管芯的至少一部分经由孔延伸到衬底材料中。

公开(公告)号：US20150041204A1

公开(公告)日：2015-02-12

申请号：US14525787

申请日：2014-10-28

Applicant: Micron Technology, Inc.

Inventor： Chin Hui Chong ,  Choon Kuan Lee ,  David J. Corisis

IPC: H01L23/495

CPC classification number: H01L23/4951 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4952 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49171 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49146 ,  Y10T29/49169 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods are disclosed. A system in accordance with one embodiment includes a support member having first package bond sites electrically coupled to leadframe bond sites. A microelectronic die can be carried by the support member and electrically coupled to the first packaged bond sites. A leadframe can be attached to the leadframe bond sites so as to extend adjacent to the microelectronic die, with the die positioned between the leadframe and the support member. The leadframe can include second package bond sites facing away from the first package bond sites. An encapsulant can at least partially surround the leadframe and the microelectronic die, with the first and second package bond sites accessible from outside the encapsulant.

Abstract translation: 公开了具有引线框架的微电子封装，包括配置用于堆叠管芯封装的引线框架，以及相关系统和方法。 根据一个实施例的系统包括具有电耦合到引线框架键合位置的第一封装焊接位置的支撑构件。 微电子管芯可以由支撑构件承载并电耦合到第一封装的粘结位置。 引线框架可以附接到引线框架结合位置，以便在裸片定位在引线框架和支撑构件之间的同时延伸到微电子模具附近。 引线框架可以包括背离第一封装焊接位置的第二封装焊接位置。 密封剂可以至少部分地围绕引线框架和微电子管芯，其中第一和第二封装结合位置可从密封剂外部接近。

公开(公告)号：US20140225282A1

公开(公告)日：2014-08-14

申请号：US14258875

申请日：2014-04-22

Applicant: Micron Technology, Inc.

Inventor： David J. Corisis ,  Matt Schwab

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L25/18 ,  H01L2224/48145 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00012

Abstract: There is provided a semiconductor device assembly with an interposer and method of manufacturing the same. More specifically, in one embodiment, there is provided a semiconductor device assembly comprising a semiconductor substrate, at least one semiconductor die attached to the semiconductor substrate, an interposer disposed on the semiconductor die, and a controller attached to the interposer. There is also provided a method of manufacturing comprising forming a first subassembly by coupling a substrate and a semiconductor die, and forming second subassembly by attaching a controller to an interposer, and coupling the first subassembly to the second subassembly.

Abstract translation: 提供了一种具有插入件的半导体器件组件及其制造方法。 更具体地，在一个实施例中，提供了一种半导体器件组件，包括半导体衬底，附接到半导体衬底的至少一个半导体管芯，设置在半导体管芯上的插入器和附接到插入器的控制器。 还提供了一种制造方法，包括通过耦合衬底和半导体管芯来形成第一子组件，以及通过将控制器附接到插入件来形成第二子组件，以及将第一子组件耦合到第二子组件。

公开(公告)号：US08749050B2

公开(公告)日：2014-06-10

申请号：US13933294

申请日：2013-07-02

Applicant: Micron Technology, Inc.

Inventor： Choon Kuan Lee ,  David J. Corisis ,  Chong Chin Hui

IPC: H01L23/04

CPC classification number: H05K1/113 ,  H01L23/3114 ,  H01L23/49524 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/20 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/30107 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for fabricating a chip-scale board-on-chip substrate, or redistribution element, includes forming conductive planes on opposite sides of a substrate. A first of the conductive planes includes two sets of bond fingers, conductive traces that extend from a first set of the bond fingers, and two sets of redistributed bond pads, including a first set to which the conductive traces lead. The second conductive plane includes conductive traces that extend from locations that are opposite from the second set of bond fingers toward locations that are opposite from the locations of the second set of redistributed bond pads. Conductive vias are formed through the second set of bond fingers to the conductive traces of the second conductive plane. In addition, conductive vias are also formed to electrically connect the conductive vias of the second conductive plane to their corresponding redistributed bond pads in the first conductive plane.

Abstract translation: 芯片级片上基板或再分配元件的制造方法包括在基板的相对侧上形成导电平面。 导电平面中的第一个包括两组键合指状物，从第一组键合指状物延伸的导电迹线和两组再分布的键合焊盘，包括导电迹线引导到的第一组。 第二导电平面包括从与第二组键合指状物相对的位置朝向与第二组再分布接合焊盘的位置相反的位置延伸的导电迹线。 导电通孔通过第二组接合指形成到第二导电平面的导电迹线。 此外，还形成导电通孔，以将第二导电平面的导电通孔与第一导电平面中相应的再分布接合焊盘电连接。

公开(公告)号：US10692827B2

公开(公告)日：2020-06-23

申请号：US16191358

申请日：2018-11-14

Applicant: Micron Technology, Inc.

Inventor： Matt E. Schwab ,  David J. Corisis ,  J. Michael Brooks

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56

Abstract: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a system comprises a semiconductor component including an interposer substrate, a microelectronic die over the interposer substrate, and a connection structure composed of a volume of solder material between the interposer substrate and the microelectronic die. The connection structure can include at least one of (a) a single, unitary structure covering approximately all of the back side of the microelectronic die, and (b) a structure electrically isolated from internal active features of the microelectronic die. In some embodiments, the connection structure can be positioned to provide generally consistent stress distribution within the system.

公开(公告)号：US20190252281A1

公开(公告)日：2019-08-15

申请号：US16391732

申请日：2019-04-23

Applicant: Micron Technology, Inc.

Inventor： Matt E. Schwab ,  J. Michael Brooks ,  David J. Corisis

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/16 ,  H01L23/492 ,  H01L25/065

Abstract: Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member proximate to the semiconductor die. The support member is at least substantially rigid. The packages can further include an adhesive between the support member and the semiconductor die and adhesively attaching the support member to the semiconductor die. The packages can also include a substrate carrying the semiconductor die and the support member attached to the semiconductor die.