公开(公告)号：US11795566B2

公开(公告)日：2023-10-24

申请号：US17071806

申请日：2020-10-15

申请人： Applied Materials, Inc.

发明人： Nolan L. Zimmerman

IPC分类号： C25D17/02 ,  C25D21/10 ,  H01L21/288

CPC分类号： C25D17/02 ,  C25D21/10 ,  H01L21/2885

摘要： Electroplating systems according to embodiments of the present technology may include a plating chamber configured to deposit metal material onto substrates positioned in the plating chamber. The plating chamber may include a rotor and a vessel. The electroplating systems may include at least one of baffle positioned in the plating chamber. The at least one baffle may define a plurality of slots. The at least one baffle may be configured to limit or prevent fluid from splashing the rotor or the plating chamber during operation of the plating chamber.

公开(公告)号：US20230304183A1

公开(公告)日：2023-09-28

申请号：US18118336

申请日：2023-03-07

申请人： Applied Materials, Inc.

发明人： Marvin Louis BERNT ,  Jon WOODYARD ,  Niranjan KHASGIWALE ,  Vincent DICAPRIO

IPC分类号： C25D5/02 ,  H01L21/288 ,  H01L21/66 ,  C25D21/12 ,  G03F1/70

CPC分类号： C25D5/022 ,  H01L21/2885 ,  H01L22/12 ,  C25D21/12 ,  G03F1/70

摘要： Methods and apparatus for electroplating a substrate incorporate aspects of digital lithography and feedback from electroplating processes to improve characteristics of plating material based on die patterns. In some embodiments, a method of electroplating a substrate may include receiving a die design, forming a first lithographic pattern for a first substrate based on the die design, using a digital lithography process to pattern the first substrate with the first lithographic pattern, using an electroplating process to deposit material on the first substrate, using a metrology process to determine at least one parameter of the deposited material on the first substrate, and forming a second lithographic pattern from the first lithographic pattern for a second substrate based, at least in part, on the at least one parameter received directly from the metrology process on the first substrate by the digital lithographic process for the second substrate.

公开(公告)号：US20230290901A1

公开(公告)日：2023-09-14

申请号：US17860092

申请日：2022-07-07

申请人： Solarlab Aiko Europe GmbH

发明人： Yongqian WANG ,  Wenli XU ,  Wei ZHU ,  Gang CHEN

IPC分类号： H01L31/20 ,  H01L21/67 ,  H01L21/288 ,  C25D7/12 ,  C25D17/00

CPC分类号： H01L31/206 ,  C25D7/126 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/6723

摘要： The disclosure discloses a method for manufacturing a solar cell, a solar module, and a power generation system. The manufacturing method includes the following steps: S1: perforating film layer in a first region and/or a second region of a solar cell where an electrode is to be disposed, thus forming a plurality holes; S2: growing a plurality seed layers on the solar cell, contacting with the first region and/or the second region through the plurality of holes or grooves in S1; and S3: horizontally transporting a to-be-electroplated solar cell on a horizontal electroplating device, to form a cathode on the seed layer, where an anode terminal is disposed in an electroplating liquid in an electroplating bath, and a moving mechanism disposed in the electroplating bath drives the solar cell to move from inlet to outlet, thus achieving electroplating.

公开(公告)号：US20230253338A1

公开(公告)日：2023-08-10

申请号：US18302461

申请日：2023-04-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Han Wang ,  Hung-Jui Kuo ,  Yu-Hsiang Hu

IPC分类号： H01L23/538 ,  H01L25/16 ,  H01L21/56 ,  H01L21/768 ,  H01L21/288 ,  H01L23/00 ,  H01L25/10 ,  H01L21/48 ,  H01L23/31 ,  H01L21/683 ,  H01L25/00

CPC分类号： H01L23/5389 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/16 ,  H01L21/56 ,  H01L21/76802 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/2885 ,  H01L21/76834 ,  H01L24/24 ,  H01L24/19 ,  H01L25/105 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L21/568 ,  H01L21/6835 ,  H01L25/50 ,  H01L25/0657

摘要： In an embodiment, a device includes: a molding compound; an integrated circuit die encapsulated in the molding compound; a through via adjacent the integrated circuit die; and a redistribution structure over the integrated circuit die, the molding compound, and the through via, the redistribution structure electrically connected to the integrated circuit die and the through via, the redistribution structure including: a first dielectric layer disposed over the molding compound; a first conductive via extending through the first dielectric layer; a second dielectric layer disposed over the first dielectric layer and the first conductive via; and a second conductive via extending through the second dielectric layer and into a portion of the first conductive via, an interface between the first conductive via and the second conductive via being non-planar.

公开(公告)号：US20230230847A1

公开(公告)日：2023-07-20

申请号：US17998415

申请日：2021-05-05

申请人： Lam Research Corporation

发明人： Kari Thorkelsson ,  Stephen J. Banik, II ,  Bryan L. Buckalew ,  Steven T. Mayer

IPC分类号： H01L21/3213 ,  H01L21/288 ,  H01L23/00 ,  C25F3/12

CPC分类号： H01L21/32134 ,  H01L21/2885 ,  H01L24/742 ,  C25F3/12 ,  H01L2224/0345 ,  H01L2224/742

摘要： During electro-oxidative metal removal on a semiconductor substrate, the substrate having a metal layer is anodically biased and the metal is electrochemically dissolved into an electrolyte. Metal particles (e.g., copper particles when the dissolved metal is copper) can inadvertently form on the surface of the substrate during electrochemical metal removal and cause defects during subsequent semiconductor processing. Contamination with such particles can be mitigated by preventing particle formation and/or by dissolution of particles. In one implementation, mitigation involves using an electrolyte that includes an oxidizer, such as hydrogen peroxide, during the electrochemical metal removal. An electrochemical metal removal apparatus in one embodiment has a conduit for introducing an oxidizer to the electrolyte and a sensor for monitoring the concentration of the oxidizer in the electrolyte.

公开(公告)号：US11699590B2

公开(公告)日：2023-07-11

申请号：US17158963

申请日：2021-01-26

申请人： Lam Research Corporation

发明人： Jeyavel Velmurugan ,  Bryan L. Buckalew ,  Thomas A. Ponnuswamy

IPC分类号： H01L21/288 ,  C25D3/38 ,  C25D17/00 ,  C25D17/06 ,  C25D5/10 ,  C25D5/34 ,  H01L21/321 ,  H01L23/532 ,  H01L21/285 ,  H01L21/768 ,  C25D5/18

CPC分类号： H01L21/2885 ,  C25D3/38 ,  C25D5/10 ,  C25D5/18 ,  C25D5/34 ,  C25D17/001 ,  C25D17/06 ,  H01L21/28568 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/53209 ,  H01L23/53238

摘要： In one example, an electroplating system comprises a first bath reservoir, a second bath reservoir, a clamp, a first anode in the first bath reservoir, a second anode in the second bath reservoir, and a direct current power supply. The first bath reservoir contains a first electrolyte solution that includes an alkaline copper-complexed solution. The second bath reservoir contains a second electrolyte solution that includes an acidic copper plating solution. The direct current power supply generates a first direct current between the clamp and the first anode to electroplate a first copper layer on the cobalt layer of the wafer submerged in the first electrolyte solution. The direct current power supply then generates a second direct current between the clamp and the second anode to electroplate a second copper layer on the first copper layer of the wafer submerged in the second electrolyte solution.

公开(公告)号：US20190196285A1

公开(公告)日：2019-06-27

申请号：US16058181

申请日：2018-08-08

申请人： SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.

发明人： Zhichao ZHOU ,  Hui XIA ,  Meng CHEN

IPC分类号： G02F1/1362 ,  H01L27/12 ,  H01L21/768 ,  H01L21/288

CPC分类号： G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L21/2885 ,  H01L21/76879 ,  H01L21/7688 ,  H01L27/124 ,  H01L27/1262

摘要： The present invention provides a manufacturing method of an electrode line pattern of an array substrate, includes: depositing a buffering film on a substrate; forming a photoresist pattern on the substrate, having the buffering film thereon; dry etching an exposed portion of the buffering film exposed by the photoresist pattern to form a first buffering layer; sequentially depositing a second conductive buffering film and a first copper film; forming the electrode line pattern on an exposed portion of the first copper film on the substrate exposed by the photoresist pattern by an electroplating process; stripping off the photoresist pattern and layer thereon to obtain the electrode line pattern. The manufacturing method of the electrode line pattern can avoid problem of difficult to etch on a copper film and easy oxidation problem. The present invention also provides an array substrate and the liquid crystal display panel thereof.

公开(公告)号：US20180355504A1

公开(公告)日：2018-12-13

申请号：US16050760

申请日：2018-07-31

申请人： International Business Machines Corporation

发明人： Charles L. Arvin ,  Michael S. Gordon

IPC分类号： C25D21/12 ,  C25D7/12 ,  C25D17/00 ,  C25D21/06 ,  C25D21/14 ,  C25D21/10 ,  C25D5/02 ,  C25D5/18 ,  C25D21/18 ,  C25D3/54 ,  H01L23/00 ,  C25D5/56 ,  H01L21/288 ,  H01L21/66

CPC分类号： C25D21/12 ,  C25D3/30 ,  C25D3/54 ,  C25D5/02 ,  C25D5/18 ,  C25D5/56 ,  C25D7/12 ,  C25D17/001 ,  C25D17/10 ,  C25D21/06 ,  C25D21/10 ,  C25D21/14 ,  C25D21/18 ,  H01L21/2885 ,  H01L22/14 ,  H01L24/11 ,  H01L2224/11462 ,  H01L2224/117

摘要： A plating product fabrication method includes forming a first concentrate. The concentrate includes a metal species, such as Tin, and a trace amount of an alpha emitting species, such as Polonium. The plating product fabrication method also includes creating a circuit between a filtering anode and a filtering cathode and reducing the alpha emitting species from the concentrate by plating the alpha emitting species upon the filtering cathode. In this manner, a purified concentrate is formed. The purified concentrate may be utilized to plate the metal species upon a plating cathode. The purified concentrate may be utilized to form a purified metal species.

公开(公告)号：US20180355502A1

公开(公告)日：2018-12-13

申请号：US15617482

申请日：2017-06-08

申请人： MacDermid Enthone Inc.

发明人： Elie Najjar ,  John Commander ,  Thomas Richardson ,  Tao Chi Liu ,  Jiang Chiang

IPC分类号： C25D7/12 ,  C25D3/38 ,  C25D5/02 ,  C25D5/34 ,  H01L21/288 ,  H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： C25D7/123 ,  C25D3/38 ,  C25D5/02 ,  C25D5/34 ,  H01L21/2885 ,  H01L21/76879 ,  H01L23/3114 ,  H01L23/5226 ,  H01L23/53228 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/11462 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13147 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753

摘要： Features such as bumps, pillars and/or vias can be plated best using current with either a square wave or square wave with open circuit wave form. Using the square wave or square wave with open circuit wave forms of plating current, produces features such as bumps, pillars, and vias with optimum shape and filling characteristics. Specifically, vias are filled uniformly and completely, and pillars are formed without rounded tops, bullet shape, or waist curves. In the process, the metalizing substrate is contacted with an electrolytic copper deposition composition. The deposition composition comprises a source of copper ions, an acid component selected from among an inorganic acid, an organic sulfonic acid, and mixtures thereof, an accelerator, a suppressor, a leveler, and chloride ions.

公开(公告)号：US20180331207A1

公开(公告)日：2018-11-15

申请号：US16031210

申请日：2018-07-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Alan B. BOTULA ,  Max L. LIFSON ,  James A. SLINKMAN ,  Theodore G. VAN KESSEL ,  Randy L. WOLF

IPC分类号： H01L29/732 ,  H01L29/78 ,  H01L21/02 ,  B82Y10/00 ,  H01L29/45 ,  H01L29/417 ,  H01L29/41 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L49/02 ,  H01L23/525 ,  H01L23/373 ,  H01L23/367 ,  H01L21/762 ,  H01L21/48 ,  H01L21/3205 ,  H01L21/288 ,  H01L21/285 ,  H01L23/48 ,  H01L23/485

CPC分类号： H01L29/732 ,  B82Y10/00 ,  H01L21/02112 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02271 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02603 ,  H01L21/02628 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/2885 ,  H01L21/32051 ,  H01L21/32053 ,  H01L21/4882 ,  H01L21/7624 ,  H01L23/3677 ,  H01L23/3731 ,  H01L23/3738 ,  H01L23/481 ,  H01L23/485 ,  H01L23/5256 ,  H01L28/20 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/413 ,  H01L29/41725 ,  H01L29/45 ,  H01L29/456 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer