公开(公告)号：US20060017161A1

公开(公告)日：2006-01-26

申请号：US11186964

申请日：2005-07-22

申请人： Jae-Sik Chung ,  Se-Young Jeong ,  Dong-Hyeon Jang

发明人： Jae-Sik Chung ,  Se-Young Jeong ,  Dong-Hyeon Jang

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L21/76838 ,  H01L23/3114 ,  H01L23/3157 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/062 ,  H05K3/108 ,  H05K3/244 ,  H05K3/388 ,  H05K2203/0505 ,  H05K2203/0597 ,  H01L2924/00 ,  H01L2924/00014

摘要： An apparatus and method for manufacturing a semiconductor package are disclosed. The apparatus may include at least a semiconductor chip having input/output (I/O) pads arranged on a surface thereof, a first dielectric layer formed on the surface of the semiconductor chip which may expose the I/O pads, a seed metal layer selectively formed on the first dielectric layer and the I/O pads, re-routing lines formed on the seed metal layer and electrically coupled to the I/O pads, a protective coating layer on side surfaces and an upper surface of each re-routing line, a second dielectric layer formed on the first dielectric layer which may cover the re-routing lines surrounded with the protective coating layer, and solder balls formed on the respective pads and electrically coupled to the re-routing lines.

摘要翻译： 公开了一种用于制造半导体封装的装置和方法。 该装置可以包括至少一个具有布置在其表面上的输入/输出（I / O）焊盘的半导体芯片，形成在半导体芯片的可能暴露I / O焊盘的表面上的第一介电层，种子金属层 选择性地形成在第一电介质层和I / O焊盘上，形成在种子金属层上并电耦合到I / O焊盘的再布线，在每个重新路由的侧表面上的保护涂层和上表面 形成在第一电介质层上的第二电介质层，其可以覆盖被保护涂层包围的重路由线，以及形成在相应焊盘上并电耦合到重路由线的焊球。

公开(公告)号：US20050164483A1

公开(公告)日：2005-07-28

申请号：US10922172

申请日：2004-08-20

申请人： Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

发明人： Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

IPC分类号： H01L21/44 ,  H01L21/50 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L24/11 ,  H01L24/02 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  Y10S438/951 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer and covers the second UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.

摘要翻译： 形成焊料凸点的方法可以包括在具有焊盘的晶片上形成第一光致抗蚀剂图案。 第一光致抗蚀剂图案可以具有露出垫的一部分的开口。 可以在焊盘上形成第一凸点下冶金（UBM）层，并且可以在第一光致抗蚀剂图案上形成第二UBM层。 可以形成第二光致抗蚀剂图案，其暴露第一UBM层并覆盖第二UBM层。 可以在开口中形成焊料凸块。 可以使用剥离剂除去第二光致抗蚀剂图案和第一光致抗蚀剂图案，从而通过剥离方法去除第二UBM层。

公开(公告)号：US20050090089A1

公开(公告)日：2005-04-28

申请号：US10911672

申请日：2004-08-05

申请人： Keum-Hee Ma ,  Se-Young Jeong ,  Dong-Hyeon Jang ,  Gu-Sung Kim

发明人： Keum-Hee Ma ,  Se-Young Jeong ,  Dong-Hyeon Jang ,  Gu-Sung Kim

IPC分类号： H01L21/60 ,  H01L21/44 ,  H01L23/485 ,  H01L23/50

CPC分类号： H01L24/12 ,  H01L24/11 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections may be formed in the first openings. A second opening may be formed at a second exposed region of the photoresist by a second exposure process. The second exposed region may include non-exposed regions defined by the first exposure process. A solder material may fill the second opening and may be reflowed to form a solder bump. The metal projections may be embedded within the solder bump.

摘要翻译： 可以使用可以是正性光致抗蚀剂的光致抗蚀剂的双曝光技术来形成焊料凸块结构。 正光致抗蚀剂可以涂覆在IC芯片上。 可以通过第一曝光工艺在光致抗蚀剂的第一曝光区域处形成第一开口。 金属突起可以形成在第一开口中。 可以通过第二曝光工艺在光致抗蚀剂的第二曝光区域处形成第二开口。 第二曝光区域可以包括由第一曝光工艺限定的非曝光区域。 焊料材料可以填充第二开口并且可以回流以形成焊料凸块。 金属突起可以嵌入在焊料凸块内。

公开(公告)号：US20050087885A1

公开(公告)日：2005-04-28

申请号：US10911705

申请日：2004-08-05

申请人： Se-Young Jeong

发明人： Se-Young Jeong

IPC分类号： H01L23/50 ,  H01L23/485 ,  H05K3/34 ,  H01L23/48

CPC分类号： H05K3/3436 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05082 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2201/0212 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor chip for flip chip bonding, a mounting structure for the semiconductor chip, and methods for forming a semiconductor chip for flip chip bonding and for fabricating a printed circuit board for a mounting structure of a semiconductor chip are provided which may improve connection between a solder bump of the semiconductor chip and a substrate of the printed circuit board without having to use an underfill material. A polymer core of the solder bump may be supported between a 3-dimensional UBM and a 3-dimensional top surface metallurgy, so as to establish connection strength of the solder bump without using underfill material, and to absorb the stresses which may concentrate on the solder bump due to the difference in coefficients of thermal expansion between metals.

摘要翻译： 提供了用于倒装芯片接合的半导体芯片，用于半导体芯片的安装结构以及用于形成用于倒装芯片接合的半导体芯片和用于制造用于半导体芯片的安装结构的印刷电路板的方法，其可以改善 半导体芯片的焊料凸块和印刷电路板的基板，而不必使用底部填充材料。 焊料凸块的聚合物芯可以支撑在3维UBM和3维顶表面冶金之间，以便在不使用底部填充材料的情况下建立焊料凸块的连接强度，并且吸收可能集中在 由于金属之间热膨胀系数的差异导致的焊料凸起。

公开(公告)号：US20110115078A1

公开(公告)日：2011-05-19

申请号：US12906348

申请日：2010-10-18

申请人： Se-Young JEONG ,  Nam-Seog Kim

发明人： Se-Young JEONG ,  Nam-Seog Kim

IPC分类号： H01L23/48

CPC分类号： H05K3/323 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/1316 ,  H01L2224/1318 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/2939 ,  H01L2224/29444 ,  H01L2224/29455 ,  H01L2224/29457 ,  H01L2224/2946 ,  H01L2224/2948 ,  H01L2224/2949 ,  H01L2224/2989 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81903 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K2201/083 ,  H05K2201/10674 ,  H05K2203/104 ,  H01L2924/00 ,  H01L2924/00014

摘要： A flip chip package may include a semiconductor chip, a package substrate, a conductive magnetic bump and an anisotropic conductive member. The semiconductor chip may have a first pad. The package substrate may have a second pad confronting the first pad. The conductive magnetic bump may be interposed between the semiconductor chip and the package substrate to generate a magnetic force. The anisotropic conductive member may be arranged between the semiconductor chip and the package substrate. The anisotropic conductive member may have conductive magnetic particles induced toward the conductive magnetic bump by the magnetic force to electrically connect the first pad with the second pad. A predetermined number of the conductive magnetic particles may be positioned between the conductive magnetic bump and the pad, so that an electrical connection reliability between the pads may be increased.

摘要翻译： 倒装芯片封装可以包括半导体芯片，封装基板，导电磁性凸块和各向异性导电构件。 半导体芯片可以具有第一焊盘。 封装基板可以具有面对第一焊盘的第二焊盘。 导电磁性凸块可以插入在半导体芯片和封装基板之间以产生磁力。 各向异性导电构件可以布置在半导体芯片和封装衬底之间。 各向异性导电构件可以具有通过磁力向导电磁性凸块引起的导电磁性颗粒，以将第一衬垫与第二衬垫电连接。 预定数量的导电磁性颗粒可以位于导电磁性凸块和焊盘之间，从而可以增加焊盘之间的电连接可靠性。

公开(公告)号：US20100149640A1

公开(公告)日：2010-06-17

申请号：US12498893

申请日：2009-07-07

申请人： Mun Cheol Paek ,  Kwang Yong Kang ,  Sang Kuk Choi ,  Seung Hwan Lee ,  Se Young Jeong

发明人： Mun Cheol Paek ,  Kwang Yong Kang ,  Sang Kuk Choi ,  Seung Hwan Lee ,  Se Young Jeong

IPC分类号： G02B5/18

CPC分类号： G02B5/1828

摘要： Provided is a tunable diffraction grating apparatus including: a diffraction grating portion having a diffraction grating with an linearly variable grating interval, the diffraction grating being formed of an elastic member; a drive portion connected to the diffraction grating portion and applying a force to the diffraction grating portion to vary the grating interval; and a controller for controlling the drive portion to adjust the grating interval depending on a specific wavelength input from the exterior.Therefore, the tunable diffraction grating apparatus can vary a grating interval of a diffraction grating using an elastic material so that a signal of a frequency bandwidth of THz can also be used. In addition, it is possible to simplify structure of the apparatus to reduce the manufacturing cost thereof.

摘要翻译： 本发明提供一种可调谐衍射光栅装置，包括：衍射光栅部分，具有具有线性可变光栅间隔的衍射光栅，衍射光栅由弹性部件形成; 连接到所述衍射光栅部分并且向所述衍射光栅部分施加力以改变所述光栅间隔的驱动部分; 以及控制器，用于根据从外部输入的特定波长来控制驱动部分来调整光栅间隔。 因此，可调谐衍射光栅装置可以使用弹性材料改变衍射光栅的光栅间隔，从而也可以使用THz的频率带宽的信号。 此外，可以简化装置的结构以降低其制造成本。

公开(公告)号：US20090211516A1

公开(公告)日：2009-08-27

申请号：US12436754

申请日：2009-05-06

申请人： Se Young Jeong ,  Chae Ryong Cho ,  Sang Eon Park ,  Sung Kyu Kim

发明人： Se Young Jeong ,  Chae Ryong Cho ,  Sang Eon Park ,  Sung Kyu Kim

IPC分类号： C30B15/14

CPC分类号： C30B15/00 ,  C22B11/02 ,  C30B11/00 ,  C30B11/14 ,  C30B15/36 ,  C30B29/02 ,  C30B29/62

摘要： Disclosed are a single crystal wire and a manufacturing method thereof. The method comprises the steps of: placing into a growth crucible at least one metal selected from the group consisting of gold, copper, silver, aluminum and nickel; heating and melting the metal placed in the growth crucible; growing a single crystal using the metal crystal as a seed by the Czochralski or Bridgman method; cutting the grown single crystal by electric discharge machining; and forming the cut single crystal into a wire. In the method, the grown metal single crystal is formed into a disc-shaped piece by electric discharge machining. The piece is formed into a single crystal wire by wire-cut electric discharge machining, and the single crystal wire can be used as a ring, a pendant or a wire within a high-quality cable making a connection in audio and video systems. Also, the single crystal formed into the disc-shaped piece by electric discharge machining can be used as a substrate and a target for deposition.

摘要翻译： 公开了一种单晶线及其制造方法。 该方法包括以下步骤：将生长坩埚放入至少一种选自金，铜，银，铝和镍的金属; 加热和熔化置于生长坩埚中的金属; 使用Czochralski或Bridgman方法生长使用金属晶体作为种子的单晶; 通过放电加工切割生长的单晶; 并将切割的单晶形成线。 在该方法中，通过放电加工将生长的金属单晶形成为盘状片。 该片通过线切割放电加工形成单晶线，并且单晶线可以用作在音频和视频系统中连接的高质量电缆中的环，吊线或线。 此外，通过放电加工形成为盘状片的单晶可以用作基板和沉积靶。

公开(公告)号：US07524763B2

公开(公告)日：2009-04-28

申请号：US11145994

申请日：2005-06-07

申请人： Soon-Bum Kim ,  Ung-Kwang Kim ,  Keum-Hee Ma ,  Young-Hee Song ,  Sung-Min Sim ,  Se-Yong Oh ,  Kang-Wook Lee ,  Se-Young Jeong

发明人： Soon-Bum Kim ,  Ung-Kwang Kim ,  Keum-Hee Ma ,  Young-Hee Song ,  Sung-Min Sim ,  Se-Yong Oh ,  Kang-Wook Lee ,  Se-Young Jeong

IPC分类号： H01L21/44

CPC分类号： C25D7/12 ,  C25D5/02 ,  H01L21/2885 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00

摘要： A method of fabricating wafer level chip scale packages may involve forming a hole to penetrate through a chip pad of an IC chip. A base metal layer may be formed on a first face of a wafer to cover inner surfaces of the hole. An electrode metal layer may fill the hole and rise over the chip pad. A second face of the wafer may be grinded such that the electrode metal layer in the hole may be exposed through the second face. By electroplating, a plated bump may be formed on the electrode metal layer exposed through the second face. The base metal layer may be selectively removed to isolate adjacent electrode metal layers. The wafer may be sawed along scribe lanes to separate individual packages from the wafer.

摘要翻译： 制造晶片级芯片级封装的方法可包括形成穿透IC芯片的芯片焊盘的孔。 基底金属层可以形成在晶片的第一面上以覆盖孔的内表面。 电极金属层可以填充孔并在芯片垫上升起。 可以研磨晶片的第二面，使得孔中的电极金属层可以通过第二面露出。 通过电镀，可以在通过第二面暴露的电极金属层上形成电镀凸块。 可以选择性地去除贱金属层以隔离相邻的电极金属层。 可以沿着划线锯切晶片以将单独的封装与晶片分开。

公开(公告)号：US20070205512A1

公开(公告)日：2007-09-06

申请号：US11785980

申请日：2007-04-23

申请人： In-Young Lee ,  Gu-Sung Kim ,  Se-Young Jeong ,  Sun-Young Park

发明人： In-Young Lee ,  Gu-Sung Kim ,  Se-Young Jeong ,  Sun-Young Park

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13616 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

摘要： A solder bump structure may have a metal stud formed on a chip pad of a semiconductor chip. Surfaces of the metal stud may be plated with a solder. The metal stud may be located on a substrate pad of the substrate. The substrate pad may have a pre-solder applied thereto. After a solder reflow, the solder bump may have a concave shape.

摘要翻译： 焊料凸块结构可以具有形成在半导体芯片的芯片焊盘上的金属螺柱。 金属螺柱的表面可以镀有焊料。 金属螺柱可以位于衬底的衬底焊盘上。 衬底垫可以具有施加到其上的预焊料。 在焊料回流之后，焊料凸点可以具有凹形。

公开(公告)号：US20070145603A1

公开(公告)日：2007-06-28

申请号：US11709800

申请日：2007-02-23

申请人： Se-Young Jeong

发明人： Se-Young Jeong

IPC分类号： H01L23/48

CPC分类号： H05K3/3436 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05082 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2201/0212 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor chip for flip chip bonding, a mounting structure for the semiconductor chip, and methods for forming a semiconductor chip for flip chip bonding and for fabricating a printed circuit board for a mounting structure of a semiconductor chip are provided which may improve connection between a solder bump of the semiconductor chip and a substrate of the printed circuit board without having to use an underfill material. A polymer core of the solder bump may be supported between a 3-dimensional UBM and a 3-dimensional top surface metallurgy, so as to establish connection strength of the solder bump without using underfill material, and to absorb the stresses which may concentrate on the solder bump due to the difference in coefficients of thermal expansion between metals.