公开(公告)号：US08604345B2

公开(公告)日：2013-12-10

申请号：US13354446

申请日：2012-01-20

Applicant: Seok Hwan Ahn ,  Young Gwan Ko

Inventor： Seok Hwan Ahn ,  Young Gwan Ko

IPC: H05K1/00

CPC classification number: H05K3/107 ,  H05K3/0032 ,  H05K3/045 ,  H05K3/426 ,  H05K2201/0376 ,  H05K2201/0959 ,  H05K2203/025 ,  H05K2203/1461

Abstract: A printed circuit board having a plating pattern buried in a via. The printed circuit board has: an insulating substrate including an electrically insulating resin; a via hole passing through the insulating substrate; a via including a metal layer formed on an inner wall of the via hole and a filler charged in the via hole; a circuit layer including a circuit pattern buried in the insulating substrate and transmitting an electrical signal; and a plating pattern buried in an end of the filler.

Abstract translation: 具有掩埋在通孔中的电镀图案的印刷电路板。 印刷电路板具有：包含电绝缘树脂的绝缘基板; 穿过所述绝缘基板的通孔; 通孔，其包括形成在所述通孔的内壁上的金属层和填充在所述通孔中的填充物; 电路层，其包括埋在所述绝缘基板中并传输电信号的电路图案; 以及埋在填料末端的电镀图案。

公开(公告)号：US08525356B2

公开(公告)日：2013-09-03

申请号：US12968405

申请日：2010-12-15

Applicant: Junichi Nakamura ,  Kazuhiro Kobayashi

Inventor： Junichi Nakamura ,  Kazuhiro Kobayashi

IPC: H01L23/544

CPC classification number: H05K3/10 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81132 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/82385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/351 ,  H05K1/0269 ,  H05K3/205 ,  H05K3/3436 ,  H05K3/4682 ,  H05K2201/09918 ,  H05K2203/025 ,  H05K2203/0361 ,  H05K2203/1152 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess.

Abstract translation: 所公开的布线基板包括绝缘层，形成在绝缘层的表面上的凹部和形成在凹部内部的对准标记，其中对准标记的表面被粗糙化，从绝缘层的表面凹陷， 从凹槽露出。

公开(公告)号：US08522427B2

公开(公告)日：2013-09-03

申请号：US12345134

申请日：2008-12-29

Applicant: Tadao Ookawa ,  Mitsuru Honjo ,  Takashi Oda

Inventor： Tadao Ookawa ,  Mitsuru Honjo ,  Takashi Oda

IPC: H05K3/02 ,  H05K3/10

CPC classification number: H05K3/22 ,  H05K1/0393 ,  H05K3/002 ,  H05K3/0041 ,  H05K3/108 ,  H05K3/281 ,  H05K3/381 ,  H05K3/386 ,  H05K3/388 ,  H05K2203/025 ,  H05K2203/095 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/53504

Abstract: A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.

Abstract translation: 制备包括基底绝缘层和薄金属膜层（籽晶层）的多层结构。 在金属薄膜层的上表面上形成具有规定图案的电镀抗蚀剂层。 在通过电镀暴露的薄金属膜层上形成金属镀层。 然后，除去电镀抗蚀剂层，去除具有电镀抗蚀剂层的区域中的金属薄膜层。 以这种方式形成包括金属薄膜层和金属镀层的导电图案。 在没有导电图案的区域中的基底绝缘层的上表面进行粗糙化处理。 覆盖绝缘层形成在基底绝缘层和导电图案的上表面上。 这样，印刷电路板就完成了。

公开(公告)号：US20130133190A1

公开(公告)日：2013-05-30

申请号：US13668982

申请日：2012-11-05

Applicant: Olympus Corporation

Inventor： Mikio Nakamura ,  Yu Kondo

IPC: H05K3/30

CPC classification number: H05K3/368 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/19 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/274 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/01079 ,  H05K1/144 ,  H05K3/284 ,  H05K3/3426 ,  H05K3/3436 ,  H05K3/4046 ,  H05K3/4647 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2201/10318 ,  H05K2203/025 ,  H05K2203/1316 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49147 ,  H01L2924/00

Abstract: A stacked mounting structure and a method of manufacturing stacked mounting structure are provided. The stacked mounting structure includes a plurality of members provided with a mounting area which is necessary for installing and operating components to be mounted on at least one principal surface, and an area for connections for signal transfer for operating the components to be mounted, and an electroconductive member which is disposed on the area for connections between the mutually facing members, and a cross section of the electroconductive member is same as or smaller than the area for connections, and an end portion of the electroconductive member is extended from a principal surface of one member up to a principal surface of the other member, and a height of the electroconductive member regulates a distance of the mounting area.

Abstract translation: 提供一种堆叠安装结构和制造堆叠安装结构的方法。 堆叠的安装结构包括多个构件，其设置有安装和操作要安装在至少一个主表面上的部件所需的安装区域，以及用于操作要安装的部件的信号传送的连接区域，以及 布置在相互面对构件之间的连接区域上的导电构件和导电构件的横截面与连接区域相同或更小，并且导电构件的端部从主表面延伸 一个构件直到另一构件的主表面，并且导电构件的高度调节安装区域的距离。

公开(公告)号：US08426961B2

公开(公告)日：2013-04-23

申请号：US12823851

申请日：2010-06-25

Applicant: Ying-Ching Shih ,  Jing-Cheng Lin ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

Inventor： Ying-Ching Shih ,  Jing-Cheng Lin ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

IPC: H01L23/14 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L21/48

CPC classification number: H01L21/76885 ,  H01L21/486 ,  H01L21/56 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/11002 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/2518 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/181 ,  H05K1/0306 ,  H05K1/185 ,  H05K3/4007 ,  H05K2203/016 ,  H05K2203/025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/16145 ,  H01L2924/00012

Abstract: A device includes an interposer, which includes a substrate; and at least one dielectric layer over the substrate. A plurality of through-substrate vias (TSVs) penetrate through the substrate. A first metal bump is in the at least one dielectric layer and electrically coupled to the plurality of TSVs. A second metal bump is over the at least one dielectric layer. A die is embedded in the at least one dielectric layer and bonded to the first metal bump.

Abstract translation: 一种装置包括：插入件，其包括基板; 以及衬底上的至少一个电介质层。 多个穿通基板通孔（TSV）穿透基板。 第一金属凸块在至少一个电介质层中并电耦合到多个TSV。 第二金属凸块在至少一个电介质层的上方。 模具嵌入在至少一个电介质层中并结合到第一金属凸块。

公开(公告)号：US20130069251A1

公开(公告)日：2013-03-21

申请号：US13603882

申请日：2012-09-05

Applicant: Yuji KUNIMOTO ,  Naoyuki Koizumi

Inventor： Yuji KUNIMOTO ,  Naoyuki Koizumi

IPC: H05K1/03 ,  H01L21/60 ,  H05K3/10 ,  H01L23/52

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/17 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/351 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/0313 ,  H05K3/4605 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/025 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.

公开(公告)号：US08314340B2

公开(公告)日：2012-11-20

申请号：US12568512

申请日：2009-09-28

Applicant: Sho Akai ,  Tatsuya Imai ,  Iku Tokihisa

Inventor： Sho Akai ,  Tatsuya Imai ,  Iku Tokihisa

IPC: H05K1/03

CPC classification number: H05K3/3452 ,  H05K3/244 ,  H05K3/389 ,  H05K3/4644 ,  H05K2201/099 ,  H05K2203/025

Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.

Abstract translation: 一种多层印刷线路板，包括第一层间树脂绝缘层，形成在第一层间树脂绝缘层上的焊盘，形成在第一层间树脂绝缘层上的阻焊层和焊盘，形成在焊盘的一部分上的保护膜 由阻焊层的开口暴露，以及形成在焊盘和阻焊层之间的涂层。 垫安装电子元件。 涂层具有金属层和涂膜。 金属层形成在焊盘的表面上，涂膜形成在金属层上。

公开(公告)号：US20120281370A1

公开(公告)日：2012-11-08

申请号：US13547085

申请日：2012-07-12

Applicant: Hiroshi NISHIKAWA ,  Makoto FUJITA ,  Fumikiyo KAWAHARA

Inventor： Hiroshi NISHIKAWA ,  Makoto FUJITA ,  Fumikiyo KAWAHARA

IPC: H05K1/18

CPC classification number: H05K3/284 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/095 ,  H05K3/0044 ,  H05K3/0052 ,  H05K3/381 ,  H05K2203/025 ,  H05K2203/1316 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49151 ,  Y10T29/49789 ,  Y10T29/49798 ,  H01L2224/85

Abstract: A circuit module and a manufacturing method for the same, reduce a possibility that a defect area where an electrically conductive resin is not coated may occur in a shield layer. A mother board is prepared. A plurality of electronic components are mounted on a principal surface of the mother board. An insulator layer is arranged so as to cover the principal surface of the mother board and the electronic components. The insulator layer is cut such that grooves and projections are formed in and on the principal surface of the insulator layer and the insulator layer has a predetermined thickness H. An electrically conductive resin is coated on the principal surface of the insulator layer to form a shield layer. The mother board including the insulator layer and the shield layer both formed thereon is divided to obtain a plurality of circuit modules.

Abstract translation: 电路模块及其制造方法可以降低屏蔽层中可能发生未涂覆导电性树脂的缺陷区域的可能性。 准备了一个母板。 多个电子部件安装在母板的主表面上。 绝缘体层被布置成覆盖母板和电子部件的主表面。 绝缘体层被切割成使得沟槽和突起形成在绝缘体层的主表面中并且在绝缘体层的主表面上并且绝缘体层具有预定的厚度H.导电树脂涂覆在绝缘体层的主表面上以形成屏蔽 层。 包括其上形成的绝缘体层和屏蔽层的母板被划分以获得多个电路模块。

公开(公告)号：US20120118618A1

公开(公告)日：2012-05-17

申请号：US12929480

申请日：2011-01-27

Applicant: Byung Seung Min

Inventor： Byung Seung Min

IPC: H05K1/09 ,  H05K3/10 ,  H05K1/11

CPC classification number: H05K3/045 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/1258 ,  H05K3/4069 ,  H05K2203/025 ,  Y10T29/49155 ,  H01L2924/00

Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. The method for manufacturing a printed circuit board includes: (a) forming at least one plate through hole penetrating through an insulating layer; (b) forming pattern grooves for implementing inner layer circuits on both surfaces of the insulating layer; and (c) filling the plate through hole and the pattern grooves with a conductive material. The method for manufacturing a printed circuit board may provide the printed circuit board having excellent heat radiating characteristics and reduce process cost.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 制造印刷电路板的方法包括：（a）形成穿过绝缘层的至少一个板通孔; （b）形成用于在绝缘层的两个表面上实现内层电路的图案槽; 和（c）用导电材料填充板通孔和图案槽。 制造印刷电路板的方法可以提供具有优异散热特性并降低工艺成本的印刷电路板。

公开(公告)号：US20110169164A1

公开(公告)日：2011-07-14

申请号：US12968405

申请日：2010-12-15

Applicant: Junichi NAKAMURA ,  Kazuhiro Kobayashi

Inventor： Junichi NAKAMURA ,  Kazuhiro Kobayashi

IPC: H01L23/498 ,  H05K1/00 ,  H05K3/10

CPC classification number: H05K3/10 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81132 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/82385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/351 ,  H05K1/0269 ,  H05K3/205 ,  H05K3/3436 ,  H05K3/4682 ,  H05K2201/09918 ,  H05K2203/025 ,  H05K2203/0361 ,  H05K2203/1152 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess.

Abstract translation: 所公开的布线基板包括绝缘层，形成在绝缘层的表面上的凹部和形成在凹部内部的对准标记，其中对准标记的表面被粗糙化，从绝缘层的表面凹陷， 从凹槽露出。