Integrated circuit tester with high bandwidth probe assembly

    公开(公告)号:US20030067316A1

    公开(公告)日:2003-04-10

    申请号:US10286062

    申请日:2002-10-31

    CPC classification number: G01R1/073 G01R1/06766 G01R1/06772

    Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.

    Predictive, adaptive power supply for an integrated circuit under test
    57.
    发明申请
    Predictive, adaptive power supply for an integrated circuit under test 有权
    用于被测集成电路的预测,自适应电源

    公开(公告)号:US20020186037A1

    公开(公告)日:2002-12-12

    申请号:US10206276

    申请日:2002-07-25

    Abstract: A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.

    Abstract translation: 主电源将电流通过路径阻抗提供给被测集成电路器件(DUT)的电源端子。 在测试期间,DUT对电源输入端的电流需求暂时增加了在测试期间施加到DUT的时钟信号的随后边缘,作为IC开关中的晶体管响应于时钟信号的边缘。 为了限制电源输入端子的电压变化(噪声),辅助电源为电源输入端子提供额外的电流脉冲,以满足在时钟信号的每个周期期间增加的需求。 电流脉冲的大小是在该时钟周期期间电流需求的预测增加以及由反馈电路控制的适配信号的大小的函数,以限制在DUT的功率输入端产生的电压变化。

    Probe card with coplanar daughter card
    59.
    发明申请
    Probe card with coplanar daughter card 失效
    探头卡与共面子卡

    公开(公告)号:US20020145437A1

    公开(公告)日:2002-10-10

    申请号:US09832913

    申请日:2001-04-10

    CPC classification number: G01R1/07342

    Abstract: A probe card assembly includes a printed circuit board with tester contacts for making electrical connections to a semiconductor tester. The probe card assembly also includes a probe head assembly with probes for contacting a semiconductor device under test. One or more daughter cards is mounted to the printed circuit board such that they are substantially coplanar with the printed circuit board. The daughter cards may contain a circuit for processing test data, including test signals to be input into the semiconductor and/or response signals generated by the semiconductor device in response to the test signals.

    Abstract translation: 探针卡组件包括具有用于与半导体测试器电连接的测试器触点的印刷电路板。 探针卡组件还包括具有用于接触被测半导体器件的探针的探针头组件。 一个或多个子卡安装到印刷电路板上,使得它们与印刷电路板基本共面。 子卡可以包含用于处理测试数据的电路,包括要输入半导体的测试信号和/或响应于测试信号由半导体器件产生的响应信号。

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