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    Integrated circuit package and method of forming thereof
    65.
    发明授权
    Integrated circuit package and method of forming thereof 有权

    公开(公告)号：US12211707B2

    公开(公告)日：2025-01-28

    申请号：US18329302

    申请日：2023-06-05

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hsien-Wei Chen ,  Ming-Fa Chen ,  Ying-Ju Chen

    IPC: H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/538

    Abstract: A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.

    Passivation Scheme Design for Wafer Singulation
    68.
    发明申请
    Passivation Scheme Design for Wafer Singulation 有权

    公开(公告)号：US20220384261A1

    公开(公告)日：2022-12-01

    申请号：US17883932

    申请日：2022-08-09

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hsien-Wei Chen ,  Ying-Ju Chen ,  Ming-Fa Chen

    IPC: H01L21/78 ,  H01L23/58 ,  H01L23/525

    Abstract: A method of forming a semiconductor device includes: forming first electrical components in a substrate in a first device region of the semiconductor device; forming a first interconnect structure over and electrically coupled to the first electrical components; forming a first passivation layer over the first interconnect structure, the first passivation layer extending from the first device region to a scribe line region adjacent to the first device region; after forming the first passivation layer, removing the first passivation layer from the scribe line region while keeping a remaining portion of the first passivation layer in the first device region; and dicing along the scribe line region after removing the first passivation layer.

    Structure and Method for Forming Integrated High Density Mim Capacitor
    69.
    发明申请
    Structure and Method for Forming Integrated High Density Mim Capacitor 有权

    公开(公告)号：US20220359642A1

    公开(公告)日：2022-11-10

    申请号：US17872701

    申请日：2022-07-25

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hsien-Wei Chen ,  Ying-Ju Chen ,  Jie Chen ,  Ming-Fa Chen

    IPC: H01L49/02 ,  H01L21/768 ,  H01L23/522 ,  H01G4/30

    Abstract: Methods of forming a super high density metal-insulator-metal (SHDMIM) capacitor and semiconductor device are disclosed herein. A method includes depositing a first insulating layer over a semiconductor substrate and a series of conductive layers separated by a series of dielectric layers over the first insulating layer, the series of conductive layers including device electrodes and dummy metal plates. A first set of contact plugs through the series of conductive layers contacts one or more conductive layers of a first portion of the series of conductive layers. A second set of contact plugs through the series of dielectric layers avoids contact of a second portion of the series of conductive layers, the second portion of the series of conductive layers electrically floating.

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