中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

45 records (took 0.02 seconds)

    Methods for planarizing a semiconductor contactor
    1.
    发明申请
    Methods for planarizing a semiconductor contactor 有权
    平面化半导体接触器的方法

    公开(公告)号：US20040266089A1

    公开(公告)日：2004-12-30

    申请号：US10852370

    申请日：2004-05-24

    Applicant: FormFactor, Inc.

    Inventor： Gaetan L. Mathieu ,  Benjamin N. Eldridge ,  Gary W. Grube

    IPC: H01L021/8238

    CPC classification number: G01R1/07307 ,  G01R3/00

    Abstract: A planarizer for a probe card assembly. A planarizer includes a first control member extending from a substrate in a probe card assembly. The first control member extends through at least one substrate in the probe card assembly and is accessible from an exposed side of an exterior substrate in the probe card assembly. Actuating the first control member causes a deflection of the substrate connected to the first control member.

    Abstract translation: 用于探针卡组件的平面化器。 平面化器包括从探针卡组件中的衬底延伸的第一控制构件。 第一控制构件延伸穿过探针卡组件中的至少一个衬底，并且可从探针卡组件中的外部衬底的暴露侧进入。 驱动第一控制构件导致连接到第一控制构件的衬底的偏转。

    Method of making microelectronic spring contact array
    2.
    发明申请
    Method of making microelectronic spring contact array 失效
    制造微电子弹簧接触阵列的方法

    公开(公告)号：US20040016119A1

    公开(公告)日：2004-01-29

    申请号：US10202712

    申请日：2002-07-24

    Applicant: FormFactor, Inc.

    Inventor： Benjamin N. Eldridge ,  Gaetan L. Mathieu ,  Carl V. Reynolds

    IPC: H01R043/20 ,  H05K003/30

    CPC classification number: G01R1/06744 ,  G01R1/06733 ,  G01R3/00 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/49224

    Abstract: A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the base substrate to a distal end of its beams. The distal ends are aligned with a predetermined array of tip positions. In an embodiment of the invention, the spring contacts are formed by patterning contours of the spring contacts in a sacrificial layer on the sacrificial substrate. The walls of patterned recesses in the sacrificial layer define side profiles of the spring contacts, and a conductive material is deposited in the recesses to form the elongated beams of the spring contacts.

    Abstract translation: 制造微电子弹簧接触阵列的方法包括在牺牲衬底上形成多个弹簧触点，然后从牺牲衬底释放弹簧触头。 每个弹簧触点具有带有基端的细长梁。 制造阵列的方法包括在它们已经从牺牲基板完全释放之后将其基端处的弹簧触点附接到基底基板，使得每个触点从基底延伸到其波束的远端。 远端与预定阵列的尖端位置对准。 在本发明的一个实施例中，通过在牺牲衬底上的牺牲层中图形地形成弹簧触点的轮廓来形成弹簧触点。 牺牲层中的图案化凹槽的壁限定弹簧触点的侧面轮廓，并且导电材料沉积在凹部中以形成弹簧触点的细长梁。

    Contact tip structure for microelectronic interconnection elements and method of making same
    3.
    发明申请
    Contact tip structure for microelectronic interconnection elements and method of making same 审中-公开
    微电子互连元件的接触尖端结构及其制造方法

    公开(公告)号：US20030199179A1

    公开(公告)日：2003-10-23

    申请号：US09953666

    申请日：2001-09-14

    Applicant: FormFactor, Inc.

    Inventor： Thomas H. Dozier II ,  Benjamin N. Eldridge ,  Igor Y. Khandros ,  Gaetan L. Mathieu ,  Sheldon A. Taylor

    IPC: H01R012/00 ,  H05K001/00

    CPC classification number: G01R1/06727 ,  G01R1/07342 ,  H01L2924/01074 ,  H01L2924/01078

    Abstract: Contact tip structures are fabricated on sacrificial substrates for subsequent joining to interconnection elements including composite interconnection elements, monolithic interconnection elements, tungsten needles of probe cards, contact bumps of membrane probes, and the like. The spatial relationship between the tip structures can lithographically be defined to very close tolerances. The metallurgy of the tip structures is independent of that of the interconnection element to which they are attached, by brazing, plating or the like. The contact tip structures are readily provided with topological (small, precise, projecting, non-planar) contact features, such as in the form of truncated pyramids, to optimize electrical pressure connections subsequently being made to terminals of electronic components. Elongate contact tip structures, adapted in use to function as spring contact elements without the necessity of being joined to resilient contact elements are described. Generally, the invention is directed to making (pre-fabricating) relatively nullperfectnull contact tip structures (nulltipsnull) and joining them to relatively nullimperfectnull interconnection elements to improve the overall capabilities of resulting nulltippednull interconnection elements.

    Abstract translation: 接触尖端结构被制造在牺牲衬底上，用于随后连接到包括复合互连元件，单片互连元件，探针卡的钨针，膜探针的接触凸块等的互连元件。 尖端结构之间的空间关系可以光刻地定义为非常接近的公差。 尖端结构的冶金独立于它们所连接的互连元件的冶金，通过钎焊，电镀等。 接触尖端结构容易地具有拓扑（小的，精确的，突出的，非平面的）接触特征，例如呈截锥形的形式，以优化随后对电子部件的端子进行的电压连接。 描述了适于用作弹簧接触元件而不需要接合到弹性接触元件的细长接触尖端结构。 通常，本发明旨在制造（预制）相对“完美”的接触尖端结构（“尖端”）并将它们连接到相对“不完美”的互连元件，以改善所产生的“尖端”互连元件的总体能力。

    Method and system for detecting an arc condition
    4.
    发明申请
    Method and system for detecting an arc condition 失效
    用于检测电弧状况的方法和系统

    公开(公告)号：US20030122568A1

    公开(公告)日：2003-07-03

    申请号：US10035364

    申请日：2001-12-28

    Applicant: FormFactor, Inc.

    Inventor： Benjamin N. Eldridge ,  Stefan Jan Juergen Zschiegner

    IPC: G01R031/26

    CPC classification number: G01R31/2831

    Abstract: A method and apparatus for detecting an arc condition in a semiconductor test system is disclosed. While probes in a semiconductor test system are being moved into or out of contact with a semiconductor wafer, the voltage level of power supplied to selected ones of the probes is monitored. If the voltage level of the power exceeds a level that could cause an arc between the probes and the semiconductor wafer while the wafer is being moved, an indication is generated that an arc condition has been detected.

    Abstract translation: 公开了一种用于检测半导体测试系统中的电弧状态的方法和装置。 当半导体测试系统中的探针被移入或接触半导体晶片时，监测提供给所选探针的电压的电压电平。 如果电源的电压水平超过在晶片被移动时在探针与半导体晶片之间可能引起电弧的电平，则产生已经检测到电弧条件的指示。

    Method of assembling and testing an electronics module
    7.
    发明申请
    Method of assembling and testing an electronics module 有权
    组装和测试电子模块的方法

    公开(公告)号：US20040096994A1

    公开(公告)日：2004-05-20

    申请号：US10609263

    申请日：2003-06-26

    Applicant: FormFactor, Inc.

    Inventor： Benjamin N. Eldridge

    IPC: H01L021/66

    CPC classification number: G01R31/31926 ,  G01R1/07314 ,  G01R31/318505 ,  G01R31/31905 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2924/00013 ,  Y10T29/49002 ,  Y10T29/49004 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00014

    Abstract: An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed.. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested speed and sold, or the module may be tested at a higher speed.

    Abstract translation: 通过可拆卸地将集成电路连接到模块基板来组装电子模块。 然后以特定的操作速度对模块进行测试。如果模块在测试速度下无法正常工作，则导致故障的集成电路或电路被移除，并替换为新的集成电路，并重新测试模块。 一旦确定模块以测试速度正确运行，模块可能被评定为以测试速度运行并出售，或者模块可以以更高的速度进行测试。

    Electrical contractor, especially wafer level contactor, using fluid pressure
    10.
    发明申请
    Electrical contractor, especially wafer level contactor, using fluid pressure 失效
    电气承包商，特别是晶圆级接触器，使用流体压力

    公开(公告)号：US20020197895A1

    公开(公告)日：2002-12-26

    申请号：US10222114

    申请日：2002-08-15

    Applicant: FormFactor, Inc.

    Inventor： Benjamin N. Eldridge

    IPC: H01R013/44

    CPC classification number: G01R31/2887 ,  G01R1/0735 ,  G01R31/2886

    Abstract: An electrical interconnect assembly and methods for making an electrical interconnect assembly. In one embodiment, an interconnect assembly includes a flexible wiring layer having a plurality of first contact elements and a fluid containing structure which is coupled to the flexible wiring layer. The fluid, when contained in the fluid containing structure, presses the flexible wiring layer towards a device under test to form electrical interconnections between the first contact elements and corresponding second contact elements on the device under test. In a further embodiment, an interconnect assembly includes a flexible wiring layer having a plurality of first contact terminals and a semiconductor substrate which includes a plurality of second contact terminals. A plurality of freestanding, resilient contact elements, in one embodiment, are mechanically coupled to one of the flexible wiring layers or the semiconductor substrate and make electrical contacts between corresponding ones of the first contact terminals and the second contact terminals. In another embodiment, a method of making electrical interconnections includes joining a flexible wiring layer and a substrate together in proximity and causing a pressure differential between a first side and a second side of the flexible wiring layer. The pressure differential deforms the flexible wiring layer and causes a plurality of first contact terminals on the flexible wiring layer to electrically connect with a corresponding plurality of second contact terminals on the substrate.

    Abstract translation: 电互连组件和用于制造电互连组件的方法。 在一个实施例中，互连组件包括具有多个第一接触元件和耦合到柔性布线层的流体容纳结构的柔性布线层。 当容纳在流体容纳结构中时，流体将柔性布线层压向被测器件，以在被测器件上的第一接触元件和对应的第二接触元件之间形成电互连。 在另一实施例中，互连组件包括具有多个第一接触端子的柔性布线层和包括多个第二接触端子的半导体衬底。 在一个实施例中，多个独立的弹性接触元件机械耦合到柔性布线层或半导体衬底中的一个，并且在对应的第一接触端子和第二接触端子之间形成电接触。 在另一个实施例中，制造电互连的方法包括将柔性布线层和基板接合在一起并在柔性布线层的第一侧和第二侧之间形成压差。 压差使柔性布线层变形，使柔性布线层上的多个第一接触端子与基板上的对应的多个第二接触端子电连接。

Patent Agency Ranking