公开(公告)号：US06777708B1

公开(公告)日：2004-08-17

申请号：US10342541

申请日：2003-01-15

Applicant: Hung-Jen Lin ,  W. Eugene Hill

Inventor： Hung-Jen Lin ,  W. Eugene Hill

IPC: H01L2358

CPC classification number: H01L22/34 ,  G01R31/2882 ,  G01R31/3016

Abstract: Methods and systems are described for determining floating body delay effects in an SOI wafer, wherein test apparatus is provided in a wafer comprising a plurality of floating body devices fabricated in series in the wafer, and a pulse generation circuit providing a pulse output corresponding to a delay time associated with the floating body chain according to an input pulse edge and a propagated pulse edge from the floating body devices.

Abstract translation: 描述了用于确定SOI晶片中的浮体延迟效应的方法和系统，其中测试装置设置在包括在晶片中串联制造的多个浮体装置的晶片中，以及脉冲产生电路，其提供对应于 根据输入脉冲边缘和浮体装置的传播脉冲边缘与浮体链相关联的延迟时间。

公开(公告)号：US06774395B1

公开(公告)日：2004-08-10

申请号：US10345007

申请日：2003-01-15

Applicant: Hung-Jen Lin ,  W Eugene Hill ,  Mario M. Pelella ,  Chern-Jann Lee ,  Srikanth Sundararajan ,  Siu May Ho

Inventor： Hung-Jen Lin ,  W Eugene Hill ,  Mario M. Pelella ,  Chern-Jann Lee ,  Srikanth Sundararajan ,  Siu May Ho

IPC: H01L2358

CPC classification number: H01L22/34

Abstract: Methods are described for characterizing floating body delay effects in SOI wafers comprising providing a pulse edge to a floating body and a tied body chain in the wafer, storing tied body chain data according to one or more of the floating body devices, and characterizing the floating body delay effects according to the stored tied body chain data. Test apparatus are also described comprising a floating body chain including a plurality of series connected floating body inverters or NAND gates fabricated in the wafer and a tied body chain comprising a plurality of series connected tied body devices to in the wafer. Storage devices are coupled with the tied body devices and with one or more of the floating body devices and operate to store tied body chain data from the tied body devices according to one or more signals from floating body chain.

Abstract translation: 描述了用于表征SOI晶片中的浮体延迟效应的方法，包括向晶片中的浮体和绑定的主体链提供脉冲边缘，根据一个或多个浮体装置存储绑定的身体链数据，并表征浮动 根据存储的绑定的身体链数据的身体延迟效应。 还描述了测试装置，其包括浮体体链，其包括在晶片中制造的多个串联连接的浮体反相器或NAND门，以及包括多个串联连接的绑定体装置的晶片的绑定体链。 存储装置与绑定的身体装置和一个或多个浮体装置相耦合，并根据来自浮体的一个或多个信号，操作以从捆绑的身体装置中存储绑定的身体链数据。

公开(公告)号：US07176081B2

公开(公告)日：2007-02-13

申请号：US10851044

申请日：2004-05-20

Applicant: Chih-Fu Chang ,  Yen-Hsiu Chen ,  Hung-Jen Lin ,  Ming-Chu King ,  Ching-Hwanq Su ,  Chih-Mu Huang ,  Yun Chang

Inventor： Chih-Fu Chang ,  Yen-Hsiu Chen ,  Hung-Jen Lin ,  Ming-Chu King ,  Ching-Hwanq Su ,  Chih-Mu Huang ,  Yun Chang

IPC: H01L21/8242

CPC classification number: H01L21/2855 ,  H01L21/32051 ,  H01L28/60

Abstract: A novel, low-temperature metal deposition method which is suitable for depositing a metal film on a substrate, such as in the fabrication of metal-insulator-metal (MIM) capacitors, is disclosed. The method includes depositing a metal film on a substrate using a deposition temperature of less than typically about 270 degrees C. The resulting metal film is characterized by enhanced thickness uniformity and reduced grain agglomeration which otherwise tends to reduce the operational integrity of a capacitor or other device of which the metal film is a part. Furthermore, the metal film is characterized by intrinsic breakdown voltage (Vbd) improvement.

Abstract translation: 公开了一种适用于在金属 - 绝缘体 - 金属（MIM）电容器的制造中在基底上沉积金属膜的新颖的低温金属沉积方法。 该方法包括使用小于一般约270℃的沉积温度在基板上沉积金属膜。所得到的金属膜的特征在于增强的厚度均匀性和减小的晶粒聚集，否则倾向于降低电容器或其它的操作完整性 金属膜是其一部分的装置。 此外，金属膜的特征在于本征击穿电压（V BAT）改善。

公开(公告)号：US20050026406A1

公开(公告)日：2005-02-03

申请号：US10631251

申请日：2003-07-31

Applicant: Ching-Chen Hao ,  Hung-Jen Lin ,  Min-Hwa Chi ,  Chih-Heng Shen

Inventor： Ching-Chen Hao ,  Hung-Jen Lin ,  Min-Hwa Chi ,  Chih-Heng Shen

IPC: H01L21/027 ,  H01L21/28 ,  H01L21/283 ,  H01L21/31 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L21/28211 ,  H01L21/28035 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/32139 ,  H01L21/823828

Abstract: A method of fabricating polysilicon patterns. The method includes depositing polysilicon on a substrate. The polysilicon may be doped or pre-doped depending upon the application. A mask layer is applied and patterned. Thereafter, the polysilicon is etched to form the polysilicon patterns and an oxidizing step is performed. The mask layer is removed after the oxidizing step is performed.

Abstract translation: 一种制造多晶硅图案的方法。 该方法包括在衬底上沉积多晶硅。 根据应用，多晶硅可以被掺杂或预掺杂。 应用掩模层并构图。 此后，蚀刻多晶硅以形成多晶硅图案，并进行氧化步骤。 在进行氧化步骤之后，去除掩模层。

公开(公告)号：US06638409B1

公开(公告)日：2003-10-28

申请号：US10152471

申请日：2002-05-21

Applicant: Chen-Ming Huang ,  Li-Chuen Cheng ,  Hung-Jen Lin ,  Chih-Chen Ku ,  San-Sun Yang

Inventor： Chen-Ming Huang ,  Li-Chuen Cheng ,  Hung-Jen Lin ,  Chih-Chen Ku ,  San-Sun Yang

IPC: C25D2118

CPC classification number: C25D21/06 ,  C25D21/12 ,  C25D21/18

Abstract: A real-time and in-line process control system maintains stable plating performance in copper electrochemical plating IC devices by using a real time, on-line programmable controller. Two or more valves to direct the flow of the electrolyte from the electroplating cell back to the reservoir connect an alternative carbon-filter as well as a mirco-filter. The programmable controller controls the operation of at least two in-line valves to direct the flow of the electrolyte within the system.

Abstract translation: 实时和在线过程控制系统通过使用实时在线可编程控制器在铜电化学电镀IC器件中保持稳定的电镀性能。 两个或更多个阀将电解液从电镀池引导回储存器，连接另一个碳过滤器以及微过滤器。 可编程控制器控制至少两个直列阀的操作以引导系统内的电解质的流动。

公开(公告)号：US09059109B2

公开(公告)日：2015-06-16

申请号：US13427787

申请日：2012-03-22

Applicant: Hung-Jen Lin ,  Tsung-Ding Wang ,  Chien-Hsiun Lee ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Hung-Jen Lin ,  Tsung-Ding Wang ,  Chien-Hsiun Lee ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/525

CPC classification number: H01L24/81 ,  H01L21/563 ,  H01L21/565 ,  H01L21/566 ,  H01L21/768 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/02311 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0347 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/21 ,  H01L2224/27318 ,  H01L2224/27334 ,  H01L2224/27416 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01047 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/2076 ,  H01L2224/81 ,  H01L2924/01029 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00

Abstract: A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure.

Abstract translation: 一种包装组件，其包括通过互连的接合结构电耦合到衬底的半导体管芯。 半导体管芯包括覆盖半导体衬底的凸块和覆盖半导体衬底并与凸点的第一部分物理接触的模塑复合层。 衬底包括导电区域上的无流动底部填充层。 凸块的第二部分与无流动底部填充层物理接触以形成互连的连接结构。

公开(公告)号：US08987605B2

公开(公告)日：2015-03-24

申请号：US13247529

申请日：2011-09-28

Applicant: Tsung-Ding Wang ,  Hung-Jen Lin ,  Chien-Hsiun Lee

Inventor： Tsung-Ding Wang ,  Hung-Jen Lin ,  Chien-Hsiun Lee

IPC: H05K1/09 ,  B23K31/02 ,  B23K1/20 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/29

CPC classification number: H01L24/11 ,  H01L21/561 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3192 ,  H01L24/13 ,  H01L24/16 ,  H01L24/18 ,  H01L24/81 ,  H01L2224/02379 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/11515 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2224/64

Abstract: A device includes a substrate, a metal pad over the substrate, and a passivation layer having a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI includes a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A solder ball is over the PPI. A compound includes a portion adjoining the solder ball and the polymer layer, wherein the compound includes flux and a polymer.

Abstract translation: 一种器件包括衬底，衬底上的金属焊盘以及具有在金属焊盘上的部分的钝化层。 后钝化互连（PPI）电耦合到金属焊盘，其中PPI包括在金属焊盘和钝化层上的部分。 聚合物层在PPI之上。 焊球在PPI之上。 化合物包括邻接焊球和聚合物层的部分，其中所述化合物包括助熔剂和聚合物。

公开(公告)号：US20130270705A1

公开(公告)日：2013-10-17

申请号：US13444649

申请日：2012-04-11

Applicant: Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

Inventor： Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L23/4824 ,  H01L21/563 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/05 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16056 ,  H01L2224/16146 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Semiconductor devices packages and methods are disclosed. In one embodiment, a package for a semiconductor device includes a substrate and a contact pad disposed on a first surface of the substrate. The contact pad has a first side and a second side opposite the first side. A conductive trace is coupled to the first side of the contact pad, and an extension of the conductive trace is coupled to the second side of the contact pad. A plurality of bond pads is disposed on a second surface of the substrate.

Abstract translation: 公开了半导体器件封装和方法。 在一个实施例中，用于半导体器件的封装包括衬底和设置在衬底的第一表面上的接触焊盘。 接触垫具有与第一侧相对的第一侧和第二侧。 导电迹线耦合到接触焊盘的第一侧，并且导电迹线的延伸部耦合到接触焊盘的第二侧。 多个接合焊盘设置在衬底的第二表面上。

公开(公告)号：US06949471B2

公开(公告)日：2005-09-27

申请号：US10631251

申请日：2003-07-31

Applicant: Ching-Chen Hao ,  Hung-Jen Lin ,  Min-Hwa Chi ,  Chih-Heng Shen

Inventor： Ching-Chen Hao ,  Hung-Jen Lin ,  Min-Hwa Chi ,  Chih-Heng Shen

IPC: H01L21/027 ,  H01L21/28 ,  H01L21/283 ,  H01L21/31 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L21/28211 ,  H01L21/28035 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/32139 ,  H01L21/823828

Abstract: A method of fabricating polysilicon patterns. The method includes depositing polysilicon on a substrate. The polysilicon may be doped or pre-doped depending upon the application. A mask layer is applied and patterned. Thereafter, the polysilicon is etched to form the polysilicon patterns and an oxidizing step is performed. The mask layer is removed after the oxidizing step is performed.

公开(公告)号：US11857282B2

公开(公告)日：2024-01-02

申请号：US17321552

申请日：2021-05-17

Applicant: Han-I Huang ,  Hung-Jen Lin

Inventor： Han-I Huang ,  Hung-Jen Lin

IPC: A61B34/30 ,  A61B34/00 ,  B25J9/04

CPC classification number: A61B34/70 ,  A61B34/30 ,  B25J9/04 ,  A61B2034/301 ,  A61B2034/302

Abstract: Provided is a multi-segment rotation robotic arm which contains a plurality of concatenated robotic arm segments which can rotate 360 degrees along an adjacent oblique section thereof. Any one of the concatenated robotic arm segments of the multi-segment rotation robotic arm can be arbitrarily concatenate in accordance with use requirements. When the concatenated robotic arm segments rotate relatively, they can rotate 360 degrees without affecting the electric supply, and can also reduce the volume increase by rotated joints. Therefore, the multi-segment rotation robotic arm of the present invention can effectively adapt to complex and tortuous spaces in the body cavity to reduce the possibility of expanding the opening of the minimally invasive surgery and causing damage to organs or tissues in the body cavity.