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公开(公告)号:US09275944B2
公开(公告)日:2016-03-01
申请号:US14013112
申请日:2013-08-29
发明人: Kok Chai Goh
IPC分类号: H01L23/13 , H01L23/495 , H01L23/00 , H01L25/065
CPC分类号: H01L23/49575 , H01L23/13 , H01L23/49503 , H01L23/49513 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/89 , H01L25/0652 , H01L2224/291 , H01L2224/2919 , H01L2224/32014 , H01L2224/32105 , H01L2224/32145 , H01L2224/32237 , H01L2224/32257 , H01L2224/33181 , H01L2224/33505 , H01L2224/371 , H01L2224/37599 , H01L2224/40101 , H01L2224/40137 , H01L2224/45014 , H01L2224/45015 , H01L2224/48101 , H01L2224/48137 , H01L2224/49096 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15153 , H01L2924/00 , H01L2924/014 , H01L2924/07802 , H01L2924/0781 , H01L2924/00012 , H01L2224/45099
摘要: A semiconductor package includes a block having a first side, a second side opposite the first side and a recessed region extending from the second side toward the first side so that the block has a thinner part in the recessed region and a thicker part outside the recessed region. The semiconductor package further includes a first semiconductor die and a second semiconductor die each having opposing first and second sides. The first semiconductor die is disposed in the recessed region of the block and attached to the thinner part of the block at the first side of the first semiconductor die. The second semiconductor die is attached to the second side of the first semiconductor die at a first side of the second semiconductor die.
摘要翻译: 半导体封装包括具有第一侧,与第一侧相对的第二侧和从第二侧朝向第一侧延伸的凹陷区域的块,使得该块在凹陷区域中具有较薄部分,并且在凹陷区域外侧具有较厚部分 地区。 半导体封装还包括具有相对的第一和第二侧面的第一半导体管芯和第二半导体管芯。 第一半导体管芯设置在块的凹陷区域中,并且在第一半导体管芯的第一侧附接到块的较薄部分。 第二半导体管芯在第二半导体管芯的第一侧附接到第一半导体管芯的第二侧。
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公开(公告)号:US09054063B2
公开(公告)日:2015-06-09
申请号:US13857252
申请日:2013-04-05
发明人: Kok Chai Goh , Meng Tong Ong
IPC分类号: H01L23/34 , H01L21/78 , H01L23/31 , H01L23/36 , H01L23/492 , H01L21/683
CPC分类号: H01L23/34 , H01L21/561 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L23/3185 , H01L23/36 , H01L23/492 , H01L2221/68327 , H01L2221/6834 , H01L2224/73253 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/00
摘要: A semiconductor package includes a single semiconductor die and an electrically and thermally conductive base. The single semiconductor die includes a semiconductor body having opposing first and second surfaces and insulated sides between the first and second surfaces. The single semiconductor die further includes a first electrode at the first surface and a second electrode at the second surface. The single semiconductor die has a defined thickness measured between the first and second surfaces, a defined width measured along one of the insulated sides, and a defined length measured along another one of the insulated sides. The base is attached to the second electrode at the second surface of the single semiconductor die and has the same length and width as the single semiconductor die.
摘要翻译: 半导体封装包括单个半导体管芯和导电和导热基座。 单个半导体管芯包括具有相对的第一和第二表面以及第一和第二表面之间的绝缘侧的半导体本体。 单个半导体管芯还包括在第一表面处的第一电极和在第二表面处的第二电极。 单个半导体管芯具有在第一和第二表面之间测量的限定厚度,沿着绝缘侧中的一个测量的限定宽度,以及沿另一个绝缘侧测量的限定长度。 基座在单个半导体管芯的第二表面处附接到第二电极,并且具有与单个半导体管芯相同的长度和宽度。
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公开(公告)号:US09373609B2
公开(公告)日:2016-06-21
申请号:US13655228
申请日:2012-10-18
发明人: Meng Tong Ong , Thiam Huat Lim , Kok Chai Goh
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L25/00 , H01L25/07 , H01L25/16 , H01L21/78 , H01L23/00
CPC分类号: H01L25/50 , H01L21/78 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/30 , H01L24/92 , H01L24/96 , H01L25/072 , H01L25/16 , H01L2224/0401 , H01L2224/04026 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/11003 , H01L2224/1112 , H01L2224/114 , H01L2224/1161 , H01L2224/11826 , H01L2224/13006 , H01L2224/13019 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/1316 , H01L2224/13171 , H01L2224/13562 , H01L2224/1357 , H01L2224/13611 , H01L2224/13618 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13669 , H01L2224/1403 , H01L2224/14181 , H01L2224/14505 , H01L2224/24101 , H01L2224/24137 , H01L2224/2518 , H01L2224/27003 , H01L2224/2712 , H01L2224/274 , H01L2224/2761 , H01L2224/27826 , H01L2224/28105 , H01L2224/29006 , H01L2224/29019 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29171 , H01L2224/29562 , H01L2224/2957 , H01L2224/29611 , H01L2224/29618 , H01L2224/29639 , H01L2224/29644 , H01L2224/29655 , H01L2224/29669 , H01L2224/3003 , H01L2224/30181 , H01L2224/30505 , H01L2224/92133 , H01L2224/92135 , H01L2224/94 , H01L2224/96 , H01L2924/01322 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/00 , H01L2924/00014 , H01L2924/014 , H01L2924/01082 , H01L2224/11 , H01L2224/27 , H01L2224/82
摘要: In accordance with an embodiment of the present invention, a semiconductor package includes a semiconductor chip and a bump. The semiconductor chip has a contact pad on a major surface. The bump is disposed on the contact pad of the semiconductor chip. A solder layer is disposed on sidewalls of the bump.
摘要翻译: 根据本发明的实施例,半导体封装包括半导体芯片和凸块。 半导体芯片在主表面上具有接触焊盘。 凸块设置在半导体芯片的接触焊盘上。 焊料层设置在凸块的侧壁上。
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公开(公告)号:US09209152B2
公开(公告)日:2015-12-08
申请号:US13866811
申请日:2013-04-19
发明人: Kok Chai Goh , Meng Tong Ong
CPC分类号: H01L24/27 , H01L21/561 , H01L21/568 , H01L23/28 , H01L23/3107 , H01L23/3135 , H01L23/36 , H01L23/49524 , H01L23/60 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/84 , H01L24/96 , H01L24/97 , H01L2224/04034 , H01L2224/056 , H01L2224/05647 , H01L2224/24245 , H01L2224/37147 , H01L2224/37611 , H01L2224/4005 , H01L2224/40101 , H01L2224/40105 , H01L2224/40245 , H01L2224/84002 , H01L2224/84005 , H01L2224/848 , H01L2224/84801 , H01L2224/84897 , H01L2224/96 , H01L2224/97 , H01L2924/1306 , H01L2924/13091 , H01L2924/00 , H01L2924/00012 , H01L2224/84 , H01L2924/00014 , H01L2924/01322 , H01L2924/014
摘要: A method and apparatus for packaging a semiconductor chip is presented. A semiconductor device includes a chip, a lead, and an encapsulant. The encapsulant includes a stabilization layer, a laminate molding layer connected to the stabilization layer, and a conductive strip connected to the laminate molding layer. The conductive strip electrically connects the contact area of the chip to the lead.
摘要翻译: 提出了一种用于封装半导体芯片的方法和装置。 半导体器件包括芯片,引线和密封剂。 密封剂包括稳定层,连接到稳定层的层压成型层和连接到层压成型层的导电条。 导电带将芯片的接触区域电连接到引线。
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公开(公告)号:US20200075530A1
公开(公告)日:2020-03-05
申请号:US16679883
申请日:2019-11-11
发明人: Alexander Heinrich , Michael Juerss , Konrad Roesl , Oliver Eichinger , Kok Chai Goh , Tobias Schmidt
IPC分类号: H01L23/00 , H01L23/495 , H01L23/482 , H01L29/43 , H01L29/45
摘要: An electronic device with a multi-layer contact and a system is disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate having a first electrode terminal located on a first surface and a second surface electrode terminal located on a second surface, the first surface being opposite to the second surface, an electrical contact layer disposed directly on the first electrode terminal, a functional layer directly disposed on the electrical contact layer, an adhesion layer directly disposed on the functional layer, a solder layer directly disposed on the adhesion layer; and a protection layer directly disposed on the solder layer, wherein the semiconductor device is a power semiconductor device configured to provide a vertical current flow.
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公开(公告)号:US10475761B2
公开(公告)日:2019-11-12
申请号:US16126190
申请日:2018-09-10
发明人: Alexander Heinrich , Michael Juerss , Konrad Roesl , Oliver Eichinger , Kok Chai Goh , Tobias Schmidt
IPC分类号: H01L29/45 , H01L29/43 , H01L23/482 , H01L23/495 , H01L23/00
摘要: A method for producing an electric device with a multi-layer contact is disclosed. In an embodiment, a method includes providing a carrier, the carrier having a metallic layer disposed on its surface, providing a semiconductor substrate, forming a layer stack on the semiconductor substrate and attaching the layer stack of the semiconductor substrate to the metallic layer of the carrier so that an intermetallic phase is formed between the metallic layer and the solder layer.
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公开(公告)号:US20140312497A1
公开(公告)日:2014-10-23
申请号:US13866811
申请日:2013-04-19
发明人: Kok Chai Goh , Meng Tong Ong
CPC分类号: H01L24/27 , H01L21/561 , H01L21/568 , H01L23/28 , H01L23/3107 , H01L23/3135 , H01L23/36 , H01L23/49524 , H01L23/60 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/84 , H01L24/96 , H01L24/97 , H01L2224/04034 , H01L2224/056 , H01L2224/05647 , H01L2224/24245 , H01L2224/37147 , H01L2224/37611 , H01L2224/4005 , H01L2224/40101 , H01L2224/40105 , H01L2224/40245 , H01L2224/84002 , H01L2224/84005 , H01L2224/848 , H01L2224/84801 , H01L2224/84897 , H01L2224/96 , H01L2224/97 , H01L2924/1306 , H01L2924/13091 , H01L2924/00 , H01L2924/00012 , H01L2224/84 , H01L2924/00014 , H01L2924/01322 , H01L2924/014
摘要: A method and apparatus for packaging a semiconductor chip is presented. A semiconductor device includes a chip, a lead, and an encapsulant. The encapsulant includes a stabilization layer, a laminate molding layer connected to the stabilization layer, and a conductive strip connected to the laminate molding layer. The conductive strip electrically connects the contact area of the chip to the lead.
摘要翻译: 提出了一种用于封装半导体芯片的方法和装置。 半导体器件包括芯片,引线和密封剂。 密封剂包括稳定层,连接到稳定层的层压成型层和连接到层压成型层的导电条。 导电带将芯片的接触区域电连接到引线。
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公开(公告)号:US20140110835A1
公开(公告)日:2014-04-24
申请号:US13655228
申请日:2012-10-18
发明人: Meng Tong Ong , Thiam Huat Lim , Kok Chai Goh
CPC分类号: H01L25/50 , H01L21/78 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/30 , H01L24/92 , H01L24/96 , H01L25/072 , H01L25/16 , H01L2224/0401 , H01L2224/04026 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/11003 , H01L2224/1112 , H01L2224/114 , H01L2224/1161 , H01L2224/11826 , H01L2224/13006 , H01L2224/13019 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/1316 , H01L2224/13171 , H01L2224/13562 , H01L2224/1357 , H01L2224/13611 , H01L2224/13618 , H01L2224/13639 , H01L2224/13644 , H01L2224/13655 , H01L2224/13669 , H01L2224/1403 , H01L2224/14181 , H01L2224/14505 , H01L2224/24101 , H01L2224/24137 , H01L2224/2518 , H01L2224/27003 , H01L2224/2712 , H01L2224/274 , H01L2224/2761 , H01L2224/27826 , H01L2224/28105 , H01L2224/29006 , H01L2224/29019 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29171 , H01L2224/29562 , H01L2224/2957 , H01L2224/29611 , H01L2224/29618 , H01L2224/29639 , H01L2224/29644 , H01L2224/29655 , H01L2224/29669 , H01L2224/3003 , H01L2224/30181 , H01L2224/30505 , H01L2224/92133 , H01L2224/92135 , H01L2224/94 , H01L2224/96 , H01L2924/01322 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/00 , H01L2924/00014 , H01L2924/014 , H01L2924/01082 , H01L2224/11 , H01L2224/27 , H01L2224/82
摘要: In accordance with an embodiment of the present invention, a semiconductor package includes a semiconductor chip and a bump. The semiconductor chip has a contact pad on a major surface. The bump is disposed on the contact pad of the semiconductor chip. A solder layer is disposed on sidewalls of the bump.
摘要翻译: 根据本发明的实施例,半导体封装包括半导体芯片和凸块。 半导体芯片在主表面上具有接触焊盘。 凸块设置在半导体芯片的接触焊盘上。 焊料层设置在凸块的侧壁上。
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公开(公告)号:US20190006311A1
公开(公告)日:2019-01-03
申请号:US16126190
申请日:2018-09-10
发明人: Alexander Heinrich , Michael Juerss , Konrad Roesl , Oliver Eichinger , Kok Chai Goh , Tobias Schmidt
IPC分类号: H01L23/00 , H01L29/45 , H01L29/43 , H01L23/482 , H01L23/495
CPC分类号: H01L24/32 , H01L23/4827 , H01L23/49513 , H01L23/49541 , H01L23/49582 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/29 , H01L24/83 , H01L29/43 , H01L29/45 , H01L2224/03438 , H01L2224/0345 , H01L2224/04026 , H01L2224/05083 , H01L2224/05124 , H01L2224/05139 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/08503 , H01L2224/2745 , H01L2224/29082 , H01L2224/29084 , H01L2224/291 , H01L2224/29101 , H01L2224/29105 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29118 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/32507 , H01L2224/83191 , H01L2224/83439 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/8346 , H01L2224/83464 , H01L2224/83469 , H01L2224/83815 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/01047 , H01L2924/01048 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1461 , H01L2924/17738 , H01L2924/17747 , H01L2924/1776 , H01L2924/00014 , H01L2924/01023 , H01L2924/01015 , H01L2924/00
摘要: A method for producing an electric device with a multi-layer contact is disclosed. In an embodiment, a method includes providing a carrier, the carrier having a metallic layer disposed on its surface, providing a semiconductor substrate, forming a layer stack on the semiconductor substrate and attaching the layer stack of the semiconductor substrate to the metallic layer of the carrier so that an intermetallic phase is formed between the metallic layer and the solder layer.
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公开(公告)号:US20170025375A1
公开(公告)日:2017-01-26
申请号:US15282927
申请日:2016-09-30
发明人: Alexander Heinrich , Michael Juerss , Konrad Roesl , Oliver Eichinger , Kok Chai Goh , Tobias Schmidt
IPC分类号: H01L23/00 , H01L23/495
CPC分类号: H01L24/32 , H01L23/4827 , H01L23/49513 , H01L23/49541 , H01L23/49582 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/29 , H01L24/83 , H01L29/43 , H01L29/45 , H01L2224/03438 , H01L2224/0345 , H01L2224/04026 , H01L2224/05083 , H01L2224/05124 , H01L2224/05139 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/08503 , H01L2224/2745 , H01L2224/29082 , H01L2224/29084 , H01L2224/291 , H01L2224/29101 , H01L2224/29105 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29118 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/32507 , H01L2224/83191 , H01L2224/83439 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/8346 , H01L2224/83464 , H01L2224/83469 , H01L2224/83815 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/01047 , H01L2924/01048 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1461 , H01L2924/17738 , H01L2924/17747 , H01L2924/1776 , H01L2924/00014 , H01L2924/01023 , H01L2924/01015 , H01L2924/00
摘要: An electric device with a multi-layer contact is disclosed. In an embodiment, the electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.
摘要翻译: 公开了具有多层接触的电气设备。 在一个实施例中,电子设备包括载体,连接到载体的半导体衬底以及设置在半导体衬底和载体之间的层系统。 层系统包括设置在半导体衬底上的电接触层。 功能层设置在电接触层上。 粘附层设置在功能层上。 在粘合层和载体之间设置焊料层。
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