公开(公告)号：US11728298B2

公开(公告)日：2023-08-15

申请号：US17459604

申请日：2021-08-27

申请人： ROHM CO., LTD.

发明人： Koshun Saito

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/05 ,  H01L21/76867 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/46 ,  H01L24/49 ,  H01L24/97 ,  H01L23/562 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29644 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/97 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2224/48465 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/05599

摘要： A semiconductor device includes a predetermined number of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin that covers the semiconductor element and a part of each lead. Each lead includes some portions exposed from the sealing resin. A surface plating layer is formed on at least one of the exposed portions of the respective leads.

公开(公告)号：US20180278234A1

公开(公告)日：2018-09-27

申请号：US15468710

申请日：2017-03-24

申请人： Dror Hurwitz

发明人： Dror Hurwitz

IPC分类号： H03H9/58 ,  H03H9/205 ,  H01L23/00

CPC分类号： H03H9/205 ,  H01L24/13 ,  H01L24/29 ,  H01L2224/0401 ,  H01L2224/13684 ,  H01L2224/29624 ,  H01L2224/29644

摘要： A filter package comprising an array of piezoelectric films sandwiched between an array of upper electrodes and lower electrodes: the individual piezoelectric films and the upper electrodes being separated by a passivation material; the lower electrode being coupled to an interposer with a first cavity between the lower electrodes and the interposer; the filter package further comprising a silicon wafer of known thickness attached over the upper electrodes with an array of upper cavities between the silicon wafer and a silicon cover; each upper cavity aligned with a piezoelectric film in the array of piezoelectric films, the upper cavities having side walls comprising the passivation material.

公开(公告)号：US20170316997A1

公开(公告)日：2017-11-02

申请号：US15496800

申请日：2017-04-25

申请人： ROHM CO., LTD.

发明人： Koshun SAITO

IPC分类号： H01L23/29 ,  H01L21/56 ,  H01L23/00 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H01L23/495

CPC分类号： H01L24/05 ,  H01L21/76867 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49582 ,  H01L23/562 ,  H01L24/29 ,  H01L24/46 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29644 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device includes a predetermined number of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin that covers the semiconductor element and a part of each lead. Each lead includes some portions exposed from the sealing resin. A surface plating layer is formed on at least one of the exposed portions of the respective leads.

公开(公告)号：US20170294393A1

公开(公告)日：2017-10-12

申请号：US15093713

申请日：2016-04-07

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： David F. Abdo ,  Sivanesan A/L Sathiapalan

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/27 ,  H01L24/29 ,  H01L24/80 ,  H01L24/83 ,  H01L2224/03019 ,  H01L2224/0312 ,  H01L2224/03462 ,  H01L2224/05547 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05601 ,  H01L2224/05611 ,  H01L2224/2746 ,  H01L2224/27825 ,  H01L2224/29 ,  H01L2224/29007 ,  H01L2224/29023 ,  H01L2224/29036 ,  H01L2224/29144 ,  H01L2224/29562 ,  H01L2224/2957 ,  H01L2224/29644 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/80048 ,  H01L2224/80355 ,  H01L2224/80359 ,  H01L2224/83048 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83355 ,  H01L2924/01079 ,  H01L2924/1033 ,  H01L2924/0105 ,  H01L2924/00014

摘要： A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The attachment layer is covered by a protective flash plating layer. The protective flash plating layer has a reflow temperature less than or equal to a reflow temperature of the attachment layer. The method further includes preheating the substrate to a temperature greater than or equal to a reflow temperature of the attachment layer, attaching a semiconductor die to the attachment layer, and cooling the substrate and semiconductor die.

公开(公告)号：US20150262960A1

公开(公告)日：2015-09-17

申请号：US14723378

申请日：2015-05-27

申请人： International Rectifier Corporation

发明人： Martin Standing ,  Robert J. Clarke

IPC分类号： H01L23/00 ,  H01L29/20 ,  H01L29/201 ,  H01L29/423 ,  H01L29/417 ,  H01L23/29

CPC分类号： H01L24/33 ,  H01L23/296 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/4951 ,  H01L23/49562 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/41725 ,  H01L29/4232 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29611 ,  H01L2224/29644 ,  H01L2224/2969 ,  H01L2224/81054 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0715 ,  H01L2924/1032 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/30101 ,  H01L2924/00 ,  H01L2224/29075 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.

摘要翻译： 一种功率半导体封装，其包括具有至少两个功率电极的半导体管芯和与每个功率电极电气和机械耦合的导电夹子。

公开(公告)号：US20120115305A1

公开(公告)日：2012-05-10

申请号：US12943281

申请日：2010-11-10

申请人： Jung-Huei PENG ,  Hsin-Ting HUANG ,  Yao-Te HUANG ,  Shang-Ying TSAI ,  Ping-Yin LIU

发明人： Jung-Huei PENG ,  Hsin-Ting HUANG ,  Yao-Te HUANG ,  Shang-Ying TSAI ,  Ping-Yin LIU

IPC分类号： H01L21/302

CPC分类号： H01L25/0657 ,  B81C1/00269 ,  B81C2203/019 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/2746 ,  H01L2224/2782 ,  H01L2224/2783 ,  H01L2224/27831 ,  H01L2224/2784 ,  H01L2224/27848 ,  H01L2224/29082 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29117 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29611 ,  H01L2224/29617 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/3207 ,  H01L2224/32148 ,  H01L2224/32505 ,  H01L2224/83011 ,  H01L2224/83012 ,  H01L2224/83014 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/10157 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2924/01013 ,  H01L2224/83

摘要： A method for wafer to wafer bonding in semiconductor packaging provides for roughening the bonding surfaces in one embodiment. Also provided is a method for passivating the bonding surfaces with a lower melting point material that becomes forced away from the bonding interface during bonding. Also provided is a method for forming an eutectic at the bonding interface to reduce the impact of any native oxide formation at the bonding interface.

摘要翻译： 在一个实施例中，用于半导体封装中的晶片到晶片接合的方法提供了使结合表面粗糙化的方法。 还提供了一种用于在接合期间被迫离开接合界面的较低熔点材料钝化接合表面的方法。 还提供了在键合界面处形成共晶的方法，以减少接合界面处的任何自然氧化物形成的影响。

公开(公告)号：US07375427B2

公开(公告)日：2008-05-20

申请号：US11257457

申请日：2005-10-24

申请人： Shuichi Tanaka

发明人： Shuichi Tanaka

IPC分类号： H01L23/48

CPC分类号： H01L23/562 ,  G02F1/13458 ,  H01L21/563 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/91 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11831 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13684 ,  H01L2224/16225 ,  H01L2224/27825 ,  H01L2224/27831 ,  H01L2224/29008 ,  H01L2224/29013 ,  H01L2224/29017 ,  H01L2224/29023 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/29563 ,  H01L2224/2957 ,  H01L2224/29582 ,  H01L2224/29624 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/29664 ,  H01L2224/29666 ,  H01L2224/29671 ,  H01L2224/29684 ,  H01L2224/29695 ,  H01L2224/30155 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/01084

摘要： A semiconductor device including a semiconductor element, an electrode pad formed on the semiconductor element, and a bump electrode conductively connected to the electrode pad which includes a resin bump formed on an active face of the semiconductor element and a conductive layer provided from the electrode pad to the surface of the resin bump, the conductive layer and the resin bump being arranged without adhesion.

摘要翻译： 包括半导体元件的半导体器件，形成在半导体元件上的电极焊盘和导电连接到电极焊盘的突起电极，该电极焊盘包括形成在半导体元件的有源面上的树脂凸块和从电极焊盘提供的导电层 到树脂凸块的表面，导电层和树脂凸块被布置而不粘附。

公开(公告)号：US20060091539A1

公开(公告)日：2006-05-04

申请号：US11257457

申请日：2005-10-24

申请人： Shuichi Tanaka

发明人： Shuichi Tanaka

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/562 ,  G02F1/13458 ,  H01L21/563 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/91 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11831 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13684 ,  H01L2224/16225 ,  H01L2224/27825 ,  H01L2224/27831 ,  H01L2224/29008 ,  H01L2224/29013 ,  H01L2224/29017 ,  H01L2224/29023 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/29563 ,  H01L2224/2957 ,  H01L2224/29582 ,  H01L2224/29624 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/29664 ,  H01L2224/29666 ,  H01L2224/29671 ,  H01L2224/29684 ,  H01L2224/29695 ,  H01L2224/30155 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/01084

摘要： A semiconductor device including a semiconductor element, an electrode pad formed on the semiconductor element, and a bump electrode conductively connected to the electrode pad which includes a resin bump formed on an active face of the semiconductor element and a conductive layer provided from the electrode pad to the surface of the resin bump, the conductive layer and the resin bump being arranged without adhesion.

摘要翻译： 包括半导体元件的半导体器件，形成在半导体元件上的电极焊盘和导电连接到电极焊盘的突起电极，该电极焊盘包括形成在半导体元件的有源面上的树脂凸块和从电极焊盘提供的导电层 到树脂凸块的表面，导电层和树脂凸块被布置而不粘附。

公开(公告)号：US20160264402A1

公开(公告)日：2016-09-15

申请号：US14645650

申请日：2015-03-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shao-Chi Yu ,  Chia-Ming Hung ,  Hsin-Ting Huang ,  Hsiang-Fu Chen ,  Allen Timothy Chang ,  Wen-Chuan Tai

IPC分类号： B81B7/00 ,  B81C1/00

CPC分类号： B81C1/0023 ,  B81B7/0048 ,  B81B7/0051 ,  B81B7/0054 ,  B81B7/007 ,  H01L2224/04026 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/16225 ,  H01L2224/2957 ,  H01L2224/29624 ,  H01L2224/29644

摘要： The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.

摘要翻译： 本公开涉及一种具有应力吸收帽基片的晶片级芯片级封装（WLCSP）。 盖基板通过结合环和布置在盖基板的上表面上的接合焊盘接合到管芯。 贯穿衬底通孔（TSV）从接合焊盘延伸穿过盖衬底到帽衬底的下表面。 此外，上表面中的凹槽围绕接合焊盘延伸并且沿着接合环的侧壁延伸。 凹槽吸收诱发的应力，从而减轻模具中的任何装置偏移。

公开(公告)号：US09048196B2

公开(公告)日：2015-06-02

申请号：US12283204

申请日：2008-09-10

申请人： Martin Standing ,  Robert J. Clarke

发明人： Martin Standing ,  Robert J. Clarke

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L23/31 ,  H01L23/482 ,  H01L23/00

CPC分类号： H01L24/33 ,  H01L23/296 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/4951 ,  H01L23/49562 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/41725 ,  H01L29/4232 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29611 ,  H01L2224/29644 ,  H01L2224/2969 ,  H01L2224/81054 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0715 ,  H01L2924/1032 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/30101 ,  H01L2924/00 ,  H01L2224/29075 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.