公开(公告)号：US20140353818A1

公开(公告)日：2014-12-04

申请号：US13909133

申请日：2013-06-04

Applicant: Infineon Technologies AG

Inventor： Ottmar GEITNER ,  Wolfram HABLE ,  Andreas Grassmann ,  Frank Winter ,  Christian Neugirg ,  Ivan Nikitin

IPC: H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L24/89 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49531 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/26135 ,  H01L2224/29005 ,  H01L2224/291 ,  H01L2224/29124 ,  H01L2224/29147 ,  H01L2224/30181 ,  H01L2224/83048 ,  H01L2224/83139 ,  H01L2224/83191 ,  H01L2224/83201 ,  H01L2224/97 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A method of manufacturing a power module comprising two substrates is provided, wherein the method comprises disposing a compensation layer of a first thickness above a first substrate; disposing a second substrate above the compensation layer; and reducing the thickness of the compensation layer from the first thickness to a second thickness after the second substrate is disposed on the compensation layer

Abstract translation: 提供一种制造包括两个基板的功率模块的方法，其中所述方法包括在第一基板之上设置第一厚度的补偿层; 在补偿层之上设置第二衬底; 以及在所述第二衬底设置在所述补偿层上之后，将所述补偿层的厚度从所述第一厚度减小到第二厚度

公开(公告)号：US20190006260A1

公开(公告)日：2019-01-03

申请号：US16111606

申请日：2018-08-24

Applicant: Infineon Technologies AG

Inventor： Mark PAVIER ,  Wolfram HABLE ,  Angela KESSLER ,  Michael SIELAFF ,  Anton PUGATSCHOW ,  Charles RIMBERT-RIVIERE ,  Marco SOBKOWIAK

IPC: H01L23/373 ,  B60R16/02 ,  H01L21/56 ,  H01L21/48 ,  H01L25/18 ,  H01L23/29 ,  H01L23/00 ,  H01L23/498 ,  H01L23/50 ,  H01L23/31

Abstract: A method of manufacturing a package, wherein the method comprises a forming a chip carrier by covering a thermally conductive and electrically insulating core on both opposing main surfaces thereof at least partially by a respective electrically conductive layer by brazing the respective electrically conductive layer on a respective one of the main surfaces; a mounting at least one electronic chip on the chip carrier; an electrically coupling an electrically conductive contact structure with the at least one electronic chip; and an encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip by a mold-type encapsulant.

公开(公告)号：US20140327127A1

公开(公告)日：2014-11-06

申请号：US13886284

申请日：2013-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Wolfram HABLE ,  Andreas Grassmann ,  Frank Winter ,  Ottmar Geitner ,  Alexander Schwarz ,  Alexander Herbrandt ,  Lothar Koenig ,  Andre Uhlemann

IPC: H01L23/34 ,  H01L21/50

CPC classification number: H01L23/34 ,  H01L21/50 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/467 ,  H01L23/473 ,  H01L24/33 ,  H01L24/36 ,  H01L24/40 ,  H01L25/072 ,  H01L2224/40137 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099 ,  H01L2224/37599

Abstract: According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.

Abstract translation: 根据示例性实施例，提供了一种功率模块，其包括半导体芯片，包括导电片的接合衬底和直接附接到导电片并且热耦合到半导体芯片的电绝缘片，以及 直接连接到导电片的冷却结构的阵列，并被配置为当与冷却流体相互作用时从半导体芯片移除热量。

公开(公告)号：US20180122720A1

公开(公告)日：2018-05-03

申请号：US15796771

申请日：2017-10-28

Applicant: Infineon Technologies AG

Inventor： Wolfram HABLE ,  Andreas GRASSMANN ,  Juergen HOEGERL ,  Eduard KNAUER ,  Michael LEDUTKE

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/31 ,  H01L23/498 ,  H01L25/07 ,  H01L25/18 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L23/3675 ,  B60L11/18 ,  H01L21/4853 ,  H01L21/4882 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/49811 ,  H01L23/49861 ,  H01L24/48 ,  H01L25/072 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/33181 ,  H01L2224/48229 ,  H01L2224/4823 ,  H01L2224/48237 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/14252 ,  H01L2924/30107 ,  H02M7/003

Abstract: A package comprising at least one electronic chip, an encapsulant encapsulating at least part of the at least one electronic chip, a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the at least one electronic chip, and a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the at least one electronic chip, wherein at least a portion of the first electrically conductive contact structure and at least a portion of the second electrically conductive contact structure within the encapsulant are spaced in a direction between two opposing main surfaces of the package.

公开(公告)号：US20180102302A1

公开(公告)日：2018-04-12

申请号：US15730758

申请日：2017-10-12

Applicant: Infineon Technologies AG

Inventor： Andreas GRASSMANN ,  Wolfram HABLE ,  Juergen HOEGERL ,  Angela KESSLER ,  Ivan NIKITIN ,  Achim STRASS

IPC: H01L23/373 ,  H01L23/492 ,  H01L23/66 ,  H01L23/00

CPC classification number: H01L23/3735 ,  H01L23/4334 ,  H01L23/4924 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45014 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/206

Abstract: A chip carrier which comprises a thermally conductive and electrically insulating sheet, a first electrically conductive structure on a first main surface of the sheet, and a second electrically conductive structure on a second main surface of the sheet, wherein the first electrically conductive structure and the second electrically conductive structure extend beyond a lateral edge of the sheet.

公开(公告)号：US20180082925A1

公开(公告)日：2018-03-22

申请号：US15710852

申请日：2017-09-21

Applicant: Infineon Technologies AG

Inventor： Andreas GRASSMANN ,  Wolfram HABLE ,  Juergen HOEGERL ,  Ivan NIKITIN ,  Achim STRASS

IPC: H01L23/42 ,  H01L23/473

CPC classification number: H01L23/42 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/473 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/552 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package which comprises at least one electronic chip, an encapsulant encapsulating at least part of the at least one electronic chip, and a shielding layer on at least part of an external surface of the encapsulant configured for shielding an interior of the package with regard to cooling fluid for removing thermal energy from the at least one electronic chip.

公开(公告)号：US20160322333A1

公开(公告)日：2016-11-03

申请号：US15137062

申请日：2016-04-25

Applicant: Infineon Technologies AG

Inventor： Edward FUERGUT ,  Martin GRUBER ,  Wolfram HABLE

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/473 ,  H01L25/00 ,  H01L23/00 ,  H01L25/07 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/473 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L25/074 ,  H01L25/50 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/023 ,  H01L2224/27464 ,  H01L2224/29082 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/84801 ,  H01L2224/85205 ,  H01L2224/85801 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/1426 ,  H01L2924/1431 ,  H01L2924/186 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19101 ,  H01L2924/401 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

Abstract translation: 各种实施例提供了一种电子模块，其包括插入器，其包括形成在电隔离材料中的流体通道和导电结构化层; 至少一个电子芯片附接到所述导电层并与所述流体通道热接触; 以及至少部分地围绕所述至少一个电子芯片形成的模制封装，其中所述导电结构化层直接形成在所述电绝缘材料上。

公开(公告)号：US20150264796A1

公开(公告)日：2015-09-17

申请号：US14214962

申请日：2014-03-16

Applicant: Infineon Technologies AG

Inventor： Christian NEUGIRG ,  Andreas GRASSMANN ,  Wolfram HABLE ,  Ottmar GEITNER ,  Frank WINTER ,  Alexander SCHWARZ ,  Inpil YOO

IPC: H05K1/02 ,  H05K3/30 ,  H05K1/18

CPC classification number: H01L23/3733 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/373 ,  H01L23/49833 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/40137 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/181 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a CTE value being matched with at least one other CTE.

Abstract translation: 提供一种电子模块，其包括第一载体; 电子芯片，其包括至少一个电子部件并且布置在所述第一载体上; 间隔元件，包括布置在所述电子芯片上并与所述至少一个电子部件导热连接的表面; 布置在间隔元件上的第二载体; 以及至少部分地包围所述电子芯片和所述间隔元件的模具化合物; 其中所述间隔元件包括具有与至少一个其它CTE匹配的CTE值的材料。