公开(公告)号：US06661093B2

公开(公告)日：2003-12-09

申请号：US09988684

申请日：2001-11-20

申请人： Kenji Ujiie ,  Kenichi Yamamoto ,  Junichi Arita

发明人： Kenji Ujiie ,  Kenichi Yamamoto ,  Junichi Arita

IPC分类号： H01L2348

CPC分类号： H01L24/16 ,  H01L23/3107 ,  H01L23/53228 ,  H01L23/556 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/45 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48

摘要： For preventing &agr;-rays induced soft errors in a semiconductor device in which solder bumps are connected with Cu wirings formed on Al wirings, bump lands connected with solder bumps and Cu wirings connected integrally therewith are constituted of a stacked film of a Cu film and an Ni film formed thereon, the thickness of the stacked film is larger than the thickness of the photosensitive polyimide resin film, the thickness of the inorganic passivation film, the thickness of the third Al wiring layer and the bonding pad and the thickness of the second interlayer insulative film formed below the Cu wirings and the bump land, that is, the bump land being constituted with such a thickness as larger than any of the thickness for the insulation material and the wiring material interposed between the MISFET (n-channel MISFET and p-channel MISFET) constituting the memory cell and the bump land.

摘要翻译： 为了防止在焊料凸块与形成在Al布线上的Cu布线连接的半导体器件中的α射线引起的软错误，与焊料凸块连接的凸起焊盘和与其一体连接的Cu布线由Cu膜和 形成在其上的Ni膜，层叠膜的厚度大于光敏聚酰亚胺树脂膜的厚度，无机钝化膜的厚度，第三Al布线层和接合焊盘的厚度以及第二夹层的厚度 形成在Cu配线和凸块焊盘之下的绝缘膜，即，凸起焊盘的面积大于绝缘材料的厚度以及布置在MISFET（n沟道MISFET和p 沟道MISFET）构成存储单元和凸起区域。

公开(公告)号：US06639392B2

公开(公告)日：2003-10-28

申请号：US10084068

申请日：2002-02-28

申请人： Nobuyoshi Kogawa ,  Hiroshi Kitaguchi ,  Tetsuya Matsui ,  Akihisa Kaihara ,  Junichi Arita

发明人： Nobuyoshi Kogawa ,  Hiroshi Kitaguchi ,  Tetsuya Matsui ,  Akihisa Kaihara ,  Junichi Arita

IPC分类号： G01N2700

CPC分类号： G01T1/24

摘要： A highly sensitive charged particle measuring device capable of measuring low-level alpha rays comprises in a measurement chamber 7 provided with a sealable door 15, a test sample 2 and a semiconductor detector 1, a radiation measuring circuit 30 including a preamplifier 30c connected to the semiconductor detector 1, a linear amplifier 30d, and a pulse height analyzer 30e, a charged particle emission amount arithmetic unit 40 for performing the quantitative analysis of charged particles from its measurement, a display unit for displaying its analysis result, and further has an evacuation pipe line and a pure gas supply pipe line for performing supply and replacement of the pure gas in the measuring chamber 7.

摘要翻译： 能够测量低水平α射线的高灵敏度带电粒子测量装置包括设置有可密封门15的测量室7，测试样品2和半导体检测器1，辐射测量电路30，包括连接到 半导体检测器1，线性放大器30d和脉冲高度分析器30e，用于从其测量执行带电粒子的定量分析的带电粒子发射量运算单元40，用于显示其分析结果的显示单元，并且进一步具有撤离 管线和纯气体供给管线，用于在测量室7中进行纯气体的供给和更换。

公开(公告)号：US06563212B2

公开(公告)日：2003-05-13

申请号：US10046204

申请日：2002-01-16

申请人： Masanori Shibamoto ,  Masahiro Ichitani ,  Ryo Haruta ,  Katsuyuki Matsumoto ,  Junichi Arita ,  Ichiro Anjo

发明人： Masanori Shibamoto ,  Masahiro Ichitani ,  Ryo Haruta ,  Katsuyuki Matsumoto ,  Junichi Arita ,  Ichiro Anjo

IPC分类号： H01L2334

CPC分类号： H01L24/50 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/36 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/3732 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29144 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73269 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2224/45099

摘要： A semiconductor device in which a semiconductor chip 1 is bonded by a metal bond 2 to one surface of a heat sink 4 formed of a material with a thermal expansion coefficient is close to he semiconductor chip 1, the heat sink 4 is glued to a stiffener with a silicon adhesive 5 with an elastic modulus of 10 MPa or less, a TAB tape 9 is glued to the stiffener 3 with an epoxy adhesive 6, and the semiconductor chip 1 is sealed with an epoxy sealing resin 8 with an elastic modulus of 10 GPa or more for protection from outside.

摘要翻译： 其中半导体芯片1通过金属接合2接合到由具有热膨胀系数的材料形成的散热器4的一个表面接近半导体芯片1的半导体器件，散热器4被胶合到加强件 使用弹性模量为10MPa以下的硅粘合剂5，用环氧树脂粘合剂6将TAB带9胶合到加强件3，并用环氧树脂密封树脂8密封弹性模量为10的半导体芯片1 GPa或更多用于保护外部。

公开(公告)号：US5437915A

公开(公告)日：1995-08-01

申请号：US261230

申请日：1994-06-16

申请人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

发明人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

IPC分类号： B23K26/00 ,  B23K26/20 ,  H01L23/495 ,  H01L23/50 ,  B32B9/00

CPC分类号： H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  Y10S428/901 ,  Y10T428/24917

摘要： A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

摘要翻译： 一种制造用于半导体器件的引线框架的方法包括以下步骤：在要重叠和焊接的引线1a和1b之间形成空间，并且在包括该空间的区域中焊接引线并熔化并切断一个 的领导。 在熔化的一个引线中，熔融金属的内聚和分离发生在空间周围的区域中。 结果，当通过焊接连接引线时，可以切断用于定位的诸如用于定位的外框之类的不必要的部分。 因此，实现了多个元件引线框架的高精度定位以及高的组装生产率。

公开(公告)号：US06232653B1

公开(公告)日：2001-05-15

申请号：US09270500

申请日：1999-03-17

申请人： Naotaka Tanaka ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Kiyomi Kojima ,  Takeshi Terasaki ,  Hideo Miura ,  Junichi Arita ,  Chikako Imura

发明人： Naotaka Tanaka ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Kiyomi Kojima ,  Takeshi Terasaki ,  Hideo Miura ,  Junichi Arita ,  Chikako Imura

IPC分类号： H01L2348

CPC分类号： H01L23/4951 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A TSOP type semiconductor device having a LOC structure employing a copper (alloy) type frame prevents resin cracks that occur in a reliability test such as a temperature cycle test. The TSOP type semiconductor device has narrower common inner leads where a resin crack would be likely to occur first, and has a thinner chip.

摘要翻译： 具有采用铜（合金）型框架的LOC结构的TSOP型半导体器件防止了在诸如温度循环测试的可靠性测试中发生的树脂裂纹。 TSOP型半导体器件具有较窄的公共内引线，其中首先可能发生树脂裂纹，并且具有更薄的芯片。

公开(公告)号：US5583375A

公开(公告)日：1996-12-10

申请号：US990633

申请日：1992-12-14

申请人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

发明人： Kunihiro Tsubosaki ,  Michio Tanimoto ,  Kunihiko Nishi ,  Masahiro Ichitani ,  Shunji Koike ,  Kazunari Suzuki ,  Ryosuke Kimoto ,  Ichiro Anjoh ,  Taisei Jin ,  Akihiko Iwaya ,  Gen Murakami ,  Masamichi Ishihara ,  Junichi Arita

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H01L23/48

CPC分类号： H01L24/06 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2225/1029 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49121

摘要： A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

摘要翻译： 一种半导体器件，其具有通过绝缘粘合剂膜固定到半导体芯片的主表面并与半导体芯片的各个外部端子电连接的内部引线。 可以关于芯片尺寸的半导体器件被配置为使得外引线从每个内引线连续地延伸到与半导体芯片的主表面相对的后表面，以便保持引线和外部器件 导通。

公开(公告)号：US5571428A

公开(公告)日：1996-11-05

申请号：US423735

申请日：1995-04-18

申请人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

发明人： Asao Nishimura ,  Akihiro Yaguchi ,  Mitsuaki Haneda ,  Ichiro Anjoh ,  Junichi Arita ,  Akihiko Iwaya ,  Masahiro Ichitani

IPC分类号： B23K26/00 ,  B23K26/20 ,  H01L23/495 ,  H01L23/50 ,  B23K28/02

CPC分类号： H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  Y10S428/901 ,  Y10T428/24917

摘要： A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

公开(公告)号：US5371044A

公开(公告)日：1994-12-06

申请号：US876349

申请日：1992-04-30

申请人： Isamu Yoshida ,  Junichi Saeki ,  Shigeharu Tsunoda ,  Kunihiko Nishi ,  Ichiro Anjoh ,  Kenichi Imura ,  Toshihiro Yasuhara ,  Junichi Arita ,  Kazuhiro Sugino

发明人： Isamu Yoshida ,  Junichi Saeki ,  Shigeharu Tsunoda ,  Kunihiko Nishi ,  Ichiro Anjoh ,  Kenichi Imura ,  Toshihiro Yasuhara ,  Junichi Arita ,  Kazuhiro Sugino

IPC分类号： B29C45/02 ,  B29C45/14 ,  H01L21/56 ,  H01L23/495 ,  H01L21/58 ,  H01L21/60

CPC分类号： H01L21/565 ,  B29C45/14655 ,  H01L23/4951 ,  H01L23/49541 ,  B29C45/02 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01025 ,  H01L2924/01079

摘要： A molding method in which a control plate having a size which is equal to or larger than the width of the outlet port of a supply passage are disposed in a cavity adjacent to the resin supply passage of a mold and thereby, the resin molding can be effected substantially equally at upper and lower sides of the insert comprising a semiconductor device and a lead.

摘要翻译： 一种模制方法，其中具有等于或大于供应通道的出口宽度的尺寸的控制板设置在与模具的树脂供应通道相邻的空腔中，从而树脂模制件可以 在包括半导体器件和引线的插入件的上侧和下侧基本相等地实现。

公开(公告)号：US08492882B2

公开(公告)日：2013-07-23

申请号：US13464257

申请日：2012-05-04

申请人： Junichi Arita ,  Kazuko Hanawa ,  Makoto Nishimura

发明人： Junichi Arita ,  Kazuko Hanawa ,  Makoto Nishimura

IPC分类号： H01L23/495

CPC分类号： H01L23/49503 ,  H01L23/3107 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05599

摘要： A semiconductor device has a die pad, a heat dissipating plate in the form of a frame arranged between the die pad and leads so as to surround the die pad, members that connect the die pad and the inner edge of the heat dissipating plate, and a suspension lead linked to the outer extension of the heat dissipating plate. A semiconductor chip larger than the die pad is mounted over the die pad and the members. Top surfaces of the die pad and the members in opposition to the back surface of the chip are bonded to the back surface of the chip with silver paste. Heat is conducted from the back surface of the chip to the heat dissipating plate via the silver paste, the die pad, and the members, and dissipated to the outside of the semiconductor device via the leads.

摘要翻译： 半导体器件具有管芯焊盘，布置在管芯焊盘和引线之间的框架形式的散热板，以围绕管芯焊盘，连接管芯焊盘和散热板的内边缘的部件，以及 连接到散热板的外延伸部的悬挂引线。 大于管芯焊盘的半导体芯片安装在管芯焊盘和部件上。 芯片的顶表面和与芯片的背面相对的构件的顶面用银浆粘合到芯片的背面。 通过银膏，芯片焊盘和部件从芯片的背面向散热板传导热量，并通过引线消散到半导体器件的外部。

公开(公告)号：US08188583B2

公开(公告)日：2012-05-29

申请号：US12731201

申请日：2010-03-25

申请人： Junichi Arita ,  Kazuko Hanawa ,  Makoto Nishimura

发明人： Junichi Arita ,  Kazuko Hanawa ,  Makoto Nishimura

IPC分类号： H01L23/495

CPC分类号： H01L23/49503 ,  H01L23/3107 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05599

摘要： To improve the heat dissipation characteristics of a semiconductor device.The semiconductor device has a die pad, a heat dissipating plate in the form of a frame arranged between the die pad and a plurality of leads so as to surround the die pad, a plurality of members that connect the die pad and the inner edge of the heat dissipating plate, and a suspension lead linked to the outer extension of the heat dissipating plate, wherein a semiconductor chip the outer shape of which is larger than the die pad is mounted over the die pad and the members. The top surface of the die pad and the top surface of the members at the part in opposition to the back surface of the semiconductor chip are bonded to the back surface of the semiconductor chip in their entire surfaces with a silver paste. Heat in the semiconductor chip is conducted from the back surface of the semiconductor chip to the heat dissipating plate via the silver paste, the die pad, and the member, and dissipated to the outside of the semiconductor device therefrom via the lead.

摘要翻译： 提高半导体器件的散热特性。 半导体器件具有管芯焊盘，散热板，其形式为布置在管芯焊盘和多个引线之间的框架形式，以围绕管芯焊盘;多个构件，其将管芯焊盘和内部边缘连接 散热板和连接到散热板的外部延伸部的悬挂引线，其中外部形状大于管芯焊盘的半导体芯片安装在管芯焊盘和部件上。 芯片焊盘的顶表面和与半导体芯片的背面相对的部分的部件的顶表面在银浆的整个表面上与半导体芯片的背面接合。 半导体芯片中的热量通过银膏，芯片焊盘和部件从半导体芯片的背面传导到散热板，并通过引线从其散发到半导体器件的外部。