公开(公告)号：US06975026B2

公开(公告)日：2005-12-13

申请号：US10409929

申请日：2003-04-10

申请人： Morihiko Mouri ,  Sadayuki Okuma ,  Yasushi Takahashi ,  Takao Ono ,  Yosihiro Sakaguchi ,  Atsushi Nakamura ,  Toshio Miyazawa

发明人： Morihiko Mouri ,  Sadayuki Okuma ,  Yasushi Takahashi ,  Takao Ono ,  Yosihiro Sakaguchi ,  Atsushi Nakamura ,  Toshio Miyazawa

IPC分类号： H01L23/29 ,  H01L23/31 ,  H01L23/34 ,  H01L23/373 ,  H01L23/10

CPC分类号： H01L23/3135 ,  H01L23/3164 ,  H01L23/3737 ,  H01L2924/0002 ,  H01L2924/00

摘要： A package for mounting a semiconductor device has a surface exposed to an atmosphere. The exposed surface is covered with a covering material such as a paint, a tape or a seal.

摘要翻译： 用于安装半导体器件的封装具有暴露于大气的表面。 暴露的表面被覆盖材料覆盖，例如涂料，胶带或密封件。

公开(公告)号：US07633147B2

公开(公告)日：2009-12-15

申请号：US10672551

申请日：2003-09-26

申请人： Seiji Funaba ,  Hisashi Abo ,  Takao Ono ,  Koji Hosokawa ,  Yoji Nishio ,  Atsushi Nakamura ,  Tomohiko Sato

发明人： Seiji Funaba ,  Hisashi Abo ,  Takao Ono ,  Koji Hosokawa ,  Yoji Nishio ,  Atsushi Nakamura ,  Tomohiko Sato

IPC分类号： H01L23/538

CPC分类号： H01L25/105 ,  H01L23/50 ,  H01L23/552 ,  H01L23/60 ,  H01L23/64 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6627 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/19032 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H05K1/112 ,  H05K1/14 ,  H05K1/181 ,  H05K2201/09236 ,  H05K2201/10159 ,  H05K2201/10545 ,  Y02P70/611 ,  H01L2224/45099 ,  H01L2924/00

摘要： A semiconductor unit constituting a memory device has a memory chip, a package substrate having three wiring layers. Power-supply surfaces (VDD surface) and (GND surface) are wired on the package substrate while an intra-package DQ bus is wired on an intermediate layer between both of the power-supply surfaces. The memory device has two DQ pins every one intra-package DQ bus. The intra-package DQ bus is connected to a signal terminal pad of the memory chip through a via hole. In view of the two DW pins, a via hole for connecting the intra-package DQ bus with the signal terminal pad constitutes a branch wire.

摘要翻译： 构成存储器件的半导体单元具有存储芯片，具有三个布线层的封装基板。 电源表面（VDD表面）和（GND表面）被布线在封装衬底上，而封装内的DQ总线布线在两个电源表面之间的中间层上。 存储器件每一个封装内DQ总线具有两个DQ引脚。 封装内的DQ总线通过通孔连接到存储器芯片的信号端子焊盘。 鉴于两个DW引脚，用于将封装内DQ DQ总线与信号端子焊盘连接的通孔构成分支线。

公开(公告)号：US06426560B1

公开(公告)日：2002-07-30

申请号：US09608149

申请日：2000-06-30

申请人： Masayasu Kawamura ,  Atsushi Nakamura ,  Yoshihiro Sakaguchi ,  Yoshitaka Kinoshita ,  Yasushi Takahashi ,  Yoshihiko Inoue

发明人： Masayasu Kawamura ,  Atsushi Nakamura ,  Yoshihiro Sakaguchi ,  Yoshitaka Kinoshita ,  Yasushi Takahashi ,  Yoshihiko Inoue

IPC分类号： H01L27108

CPC分类号： H01L23/49537 ,  G11C5/02 ,  G11C5/025 ,  G11C5/04 ,  G11C5/06 ,  G11C8/12 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01055 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units. A memory module is so constructed that a plurality of such semiconductor storage devices, in each of which two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units, are mounted on a mounting circuit board which is square and which is formed with electrodes along one latus thereof.

摘要翻译： 以2位为单位进行存储器访问的两个存储器芯片通过将它们的背面放置在另一个上而被组装成堆叠结构，以便以4位单元进行存储器访问。 存储器模块被构造成使得多个这样的半导体存储器件，其中每个存储器芯片每个以2位单元进行存储器访问，通过将它们的背面放置在另一个上而被组装成堆叠结构，因此 为了以4位单位进行存储器访问，安装在正方形的安装电路板上，并且沿其一个区域形成有电极。

公开(公告)号：US06566760B1

公开(公告)日：2003-05-20

申请号：US09666063

申请日：2000-09-19

申请人： Masayasu Kawamura ,  Atsushi Nakamura ,  Yoshihiro Sakaguchi ,  Yoshitaka Kinoshita ,  Yasushi Takahashi ,  Yoshihiko Inoue

发明人： Masayasu Kawamura ,  Atsushi Nakamura ,  Yoshihiro Sakaguchi ,  Yoshitaka Kinoshita ,  Yasushi Takahashi ,  Yoshihiko Inoue

IPC分类号： H01L2302

CPC分类号： H01L23/49537 ,  G11C5/02 ,  G11C5/025 ,  G11C5/04 ,  G11C5/06 ,  G11C8/12 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01055 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units. A memory module is so constructed that a plurality of such semiconductor storage devices, in each of which two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units, are mounted on a mounting circuit board which is square and which is formed with electrodes along one latus thereof.

公开(公告)号：US09348226B2

公开(公告)日：2016-05-24

申请号：US10541032

申请日：2003-12-24

申请人： Isao Nishimura ,  Kouichi Fujiwara ,  Eiichi Kobayashi ,  Tsutomu Shimokawa ,  Atsushi Nakamura ,  Eiji Yoneda ,  Yong Wang

发明人： Isao Nishimura ,  Kouichi Fujiwara ,  Eiichi Kobayashi ,  Tsutomu Shimokawa ,  Atsushi Nakamura ,  Eiji Yoneda ,  Yong Wang

IPC分类号： G03F7/039 ,  G03F7/004 ,  G03F7/20

CPC分类号： G03F7/039 ,  G03F7/0046 ,  G03F7/0397 ,  G03F7/2006

摘要： A radiation-sensitive resin composition comprising an acid-labile group-containing resin obtained by living radical polymerization having a specific structure which is insoluble or scarcely soluble in alkali, but becomes alkali soluble by the action of an acid, and a photoacid generator, wherein the ratio of weight average molecular weight to number average molecular weight (weight average molecular weight/number average molecular weight) of the acid-labile group-containing resin is smaller than 1.5.

公开(公告)号：US08759419B2

公开(公告)日：2014-06-24

申请号：US13599581

申请日：2012-08-30

申请人： Satoshi Okuda ,  Junichiro Sugimoto ,  Tatsunosuke Hoshi ,  Atsushi Nakamura ,  Mitsunori Maeda

发明人： Satoshi Okuda ,  Junichiro Sugimoto ,  Tatsunosuke Hoshi ,  Atsushi Nakamura ,  Mitsunori Maeda

IPC分类号： C09D11/00 ,  C08K3/00 ,  C08F8/30

CPC分类号： C09D11/38 ,  C09D11/324

摘要： A water-based ink for ink-jet recording includes a self-dispersible pigment modified by phosphate group; water; a water-soluble organic solvent; at least one of a cationic polymer and basic amino acid; and at least one selected from the group consisting of boric acids, a chelate agent, a reducing sugar and a sugar alcohol.

摘要翻译： 用于喷墨记录的水性油墨包括由磷酸酯基改性的自分散颜料; 水; 水溶性有机溶剂; 阳离子聚合物和碱性氨基酸中的至少一种; 和选自硼酸，螯合剂，还原糖和糖醇中的至少一种。

公开(公告)号：US08652399B2

公开(公告)日：2014-02-18

申请号：US12854683

申请日：2010-08-11

申请人： Atsushi Nakamura ,  Masataka Yahagi ,  Akihisa Inoue ,  Hisamichi Kimura ,  Shin-ichi Yamaura

发明人： Atsushi Nakamura ,  Masataka Yahagi ,  Akihisa Inoue ,  Hisamichi Kimura ,  Shin-ichi Yamaura

IPC分类号： C22C1/04

CPC分类号： C23C14/3414 ,  B01D67/0072 ,  B01D71/022 ,  B01D2325/04 ,  B22F2998/10 ,  B22F2999/00 ,  C01B3/503 ,  C01B3/505 ,  C22C5/04 ,  C22C9/00 ,  C22C16/00 ,  C22C19/03 ,  C22C19/07 ,  C22C45/001 ,  C22C45/003 ,  C22C45/02 ,  C22C45/04 ,  C22C45/10 ,  B22F9/082 ,  B22F3/10 ,  B22F2201/11

摘要： A sputtering target for producing a metallic glass membrane characterized in comprising a structure obtained by sintering atomized powder having a composition of a ternary compound system or greater with at least one or more metal elements selected from Pd, Zr, Fe, Co, Cu and Ni as its main component (component of greatest atomic %), and being an average grain size of 50 μm or less. The prepared metallic glass membrane can be used as a substitute for conventional high-cost bulk metallic glass obtained by quenching of molten metal. This sputtering target for producing the metallic glass membrane is also free from problems such as defects in the metallic glass membrane and unevenness of composition, has a uniform structure, can be produced efficiently and at low cost, and does not generate many nodules or particles. Further provided is a method for manufacturing such a sputtering target for forming the metallic glass membrane.

摘要翻译： 一种用于制造金属玻璃膜的溅射靶，其特征在于包括通过将选自Pd，Zr，Fe，Co，Cu和Ni中的至少一种或多种金属元素烧结成具有三元化合物体系以上的组成的雾化粉末而获得的结构 作为其主要成分（原子％最大的成分），平均粒径为50μm以下。 制备的金属玻璃膜可用作通过熔融金属淬火获得的常规高成本大块金属玻璃的替代物。 用于制造金属玻璃膜的溅射靶也没有诸如金属玻璃膜的缺陷和组成不均匀等问题，具有均匀的结构，可有效且低成本地生产，并且不产生许多结节或颗粒。 进一步提供一种用于制造用于形成金属玻璃膜的溅射靶的方法。

公开(公告)号：US08610105B2

公开(公告)日：2013-12-17

申请号：US12614859

申请日：2009-11-09

申请人： Toshihiko Fukamachi ,  Takashi Shiota ,  Takeshi Kitatani ,  Nozomu Yasuhara ,  Atsushi Nakamura ,  Mitsuhiro Sawada

发明人： Toshihiko Fukamachi ,  Takashi Shiota ,  Takeshi Kitatani ,  Nozomu Yasuhara ,  Atsushi Nakamura ,  Mitsuhiro Sawada

IPC分类号： H01L33/00

CPC分类号： H01S5/3434 ,  B82Y20/00 ,  H01L33/06 ,  H01L33/30 ,  H01S5/3403 ,  H01S5/3407

摘要： Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.

摘要翻译： 提供了具有拉伸应变的具有InGaAlAs的阱层的半导体场致发光器件，或具有拉伸应变的InGaAsP基阱层和具有InGaAlAs基阻挡层的半导体场致发光器件，其在高温下具有高可靠性 宽温度范围 在半导体电致发光器件的多量子阱层中，阱层和势垒层之间的界面处的界面应变的大小小于由层厚度值确定的临界界面应变的大小，该层厚度值是 阱层的厚度和阻挡层的厚度。

公开(公告)号：US08597867B2

公开(公告)日：2013-12-03

申请号：US11579646

申请日：2005-05-02

申请人： Hiromitsu Nakashima ,  Tomohiro Utaka ,  Takashi Chiba ,  Eiji Yoneda ,  Atsushi Nakamura

发明人： Hiromitsu Nakashima ,  Tomohiro Utaka ,  Takashi Chiba ,  Eiji Yoneda ,  Atsushi Nakamura

IPC分类号： G03F7/00 ,  G03F7/004 ,  G03F7/028

CPC分类号： C08F220/28 ,  C08F220/18 ,  G03F7/0046 ,  G03F7/0392 ,  G03F7/0397

摘要： A radiation-sensitive resin composition excelling in basic properties as a resist such as sensitivity, resolution, and the like, having a wide depth of focus (DOF) to both a line-and-space pattern and an isolated space pattern, and exhibiting a minimal line width change due to fluctuation of a bake temperature, and having a small line width limit in which the line pattern destroying phenomenon does not occur, and a lactone-containing copolymer useful as a resin component of the composition are provided.The lactone-containing copolymer is represented by a copolymer of the following compounds (1-1), (2-1), and (3-1). The radiation-sensitive resin composition comprises (a) the lactone-containing copolymer and (b) a photoacid generator.

公开(公告)号：US20130279146A1

公开(公告)日：2013-10-24

申请号：US13824506

申请日：2011-03-16

申请人： Atsushi Nakamura

发明人： Atsushi Nakamura

IPC分类号： G02B7/00 ,  F21V9/02 ,  G02B6/26 ,  F21V8/00

CPC分类号： G02B7/00 ,  F21S8/006 ,  F21V9/02 ,  F21Y2101/00 ,  G01N17/00 ,  G01N17/004 ,  G02B6/0001 ,  G02B6/26 ,  H02S50/00 ,  H02S50/10

摘要： A light guide member of the pseudo-sunlight irradiation apparatus is formed of eight light guide plates WG1′-WG8′ arrayed in one direction. A light diffusing part formed of a plurality of dot-like protrusions 701, 702 is formed on a surface opposite to an irradiating surface of each of the light guide plates WG1′-WG8′. A dot diameter of the dot-like protrusions 701 of the light guide plates WG1′, WG8′ positioned at ends in the one direction orthogonal to the light guide direction of the light guide plates WG1′-WG8′ is made larger than a dot diameter of the dot-like protrusions 702 of the light guide plates WG2′-WG7′ positioned at central portions other than the ends in the one direction.

摘要翻译： 伪阳光照射装置的导光构件由沿一个方向排列的八个导光板WG1'-WG8'形成。 在与每个导光板WG1'-WG8'的照射表面相对的表面上形成由多个点状突起701,702形成的光漫射部。 使位于与导光板WG1'-WG8'的导光方向正交的一个方向上的端部的导光板WG1'，WG8'的点状突起701的点直径大于点直径 的导光板WG2'-WG7'的点状突起702位于除了一个方向上的端部之外的中心部分。