摘要:
The invention relates to electrically conductive connections between individuals contacts of electronic components having electrically conductive conductor structures configured on a substrate. The invention is based on the known flip chip technology and aims at providing the possibility of achieving a cost-effective and better transfer safety in an electrically conductive connection between the contacts of electronic components and conductor structures consisting of an electrically conductive material. To this end, electronic components are used whose connection bumps are configured by currentless deposition primarily of palladium. The connection bumps project beyond the base of the component, are directly pressed on the conductor structure and permanently connected to the substrate by means of a material or a polymer film exerting a pressure or tensile force as a result of volume reduction.
摘要:
A microcap wafer-level package [10] is provided in which a micro device [14] is connected to bonding pads [16, 18] on a base wafer [12]. A peripheral pad [20] on the base wafer [12] encompasses the bonding pads [16, 18] and the micro device [14]. A cap wafer [24] is processed to form wells [40, 42] of a predetermined depth in the cap wafer [24]. A conductive material [27, 29] is made integral with the walls [46, 47] of the wells [40, 42] in the cap wafer [24]. The cap wafer [24] has contacts [30,32] and a peripheral gasket [22] formed thereon where the contacts [30,32] are capable of being aligned with the bonding pads [16, 18] on the base wafer [12], and the gasket [22] matches the peripheral pad [20] on the base wafer [12]. The cap wafer [24] is then placed over the base wafer [12] so as to bond the contacts [30, 32] and gasket [22] to the pads [16, 18, 20] and form a hermetically sealed volume [25] within the peripheral gasket [22]. The cap wafer [24] is thinned to form a "microcap" [24]. The microcap [24] is thinned below the predetermined depth until the conductive material [27, 29] is exposed to become conductive vias [26, 28] through the cap wafer [24] to outside the hermetically sealed volume [25].
摘要:
An integrated circuit device comprises an active circuit (4) provided in an active circuit area at a surface (5) of a semiconductor body (6), a plurality of bond pads (3) disposed substantially over the active circuit area and electrical connections between the bond pads (3) and the active circuit (4). Each one of the bond pads (3) has a wire-bonding region (23) for bonding a wire (24) and a circuit-connecting region (22) for the electrical connection with the active circuit (4). The active circuit (4) comprises active circuit devices (7), an interconnect structure comprising at least one patterned metal layer disposed in overlying relationship relative to the active circuit devices (7) and a layer (20) of passivating material disposed atop the interconnect structure, through which the electrical connections pass. The layer (20) of passivating material substantially consists of inorganic material and is substantially free from interruptions beneath the wire-bonding region (23) of the bond pads (3). The bond pads (3) and the layer (20) of passivating material have thicknesses that jointly counteract the occurrence of damage to the active circuit (4) during bonding of the wire (24) to the wire-bonding region (23).
摘要:
A conductor (112) and method for attaching a surface mount device to the conductor (112), in which solder bumps (16) formed by the method are characterized as being accurately located on the conductor (112) and having a bump height and shape that provides stress relief during thermal cycles, minimizes bridging between adjacent bumps (16), allows penetration of cleaning solutions for removing undesirable residues, and enables the penetration of mechanical bonding and encapsulation materials between the chip and its substrate (10). Such benefits are achieved by forming the conductor (112) of a nonsolderable material, on which a solderable pillar (114) is formed. The pillar (114) is selectively formed to have a shape that determines the distribution and height of the solder bump (16) on the conductor (112).
摘要:
A metallic member with an improved surface layer exhibiting good corrosion resistance is provided. The metallic member consists of a base material and the surface layer. The surface layer is formed by a remelting and solidifying treatment of the surface of the base material, and consists of a plurality of minutely thin layers. An non-treated metallic member is dipped in an aqueous solution containing at least one metal ion and a reducing agent. A high density energy beam is applied to the metallic member in the solution in order to remelt and solidify the surface layer of the member. The improved surface layer contains the metal of the reduced metal ion.
摘要:
Disclosed is a semiconductor device wherein among elements forming brazing material for bonding an electrode (21, 22) on a semiconductor substrate (2) to an external electrode (11, 12), the amounts of elements reacting with the material of electrode (21, 22) or external electrode (11, 12) and forming a compound harder and more brittle than the electrode material are smaller on the portion contacting the electrode (21,22) or external electrode (11, 12) than at other portions. A fabrication method of such device is also disclosed, involving the steps of laminating and depositing an at least two-layered metallic layer (140, 150) on the surface of the electrode (21, 22) on the substrate (2) or the surface of the external electrode (11, 12), bringing the electrodes (21, 22; 11, 12) into intimate contact with each other while opposing one another, and bonding them together by force of pressure applied to both electrodes (21, 22; 11, 12) while being heated close to an eutectic temperature of an alloy consisting of the metals of the uppermost and subsequent layers (140, 150), immediately therebelow, of the metallic layer (140, 150).
摘要:
The present invention relates to methods for fabricating a semiconductor device and to the related semiconductor devices for use in harsh media. The semiconductor device comprises a silicon die (420) comprising a metal contact region (422) and, at least one passivation layer (421) covering the semiconductor die (420) and patterned such as to form an opening to the metal contact region (422) of the semiconductor die (420). The device also comprises a continuous part of a contact layer comprising a refractory metal. This continuous part overlaps and completely covers the opening in the at least one passivation layer (421), contacts the metal contact region (422) in the opening and adheres to the at least one passivation layer (421) along the entire edge of the continuous part. The contact layer comprises at least an adhesion layer (529) and at least a diffusion barrier layer. The device further comprises a noble metal layer (524) arranged over the contact layer and completely covering the continuous part, in which the noble metal layer (524) extends over the entire edge of the continuous part to adhere to the at least one passivation layer (421) around the edge of the continuous part.
摘要:
Provided is a thermal bonding sheet capable of preventing bonding irregularity by uniform thickness, and imparting the bonding reliability at high temperatures, and a thermal bonding sheet with dicing tape having the thermal bonding sheet. A thermal bonding sheet includes a precursor layer that is to become a sintered layer by heating, and the precursor layer has an average thickness of 5 µm to 200 µm, and a maximum thickness and a minimum thickness falling within a range of ±20% of the average thickness. A thermal bonding sheet includes a precursor layer that is to become a sintered layer by heating, and the precursor layer has an average thickness of 5 µm to 200 µm, and a surface roughness Sa measured in a field of view of 200 µm × 200 µm by a confocal microscope of 2 µm or less.