公开(公告)号：US09379094B2

公开(公告)日：2016-06-28

申请号：US14616568

申请日：2015-02-06

申请人： TOYODA GOSEI CO., LTD.

发明人： Satoshi Wada ,  Kosei Fukui ,  Takashi Nonogawa

IPC分类号： H01L25/16 ,  H01L29/866 ,  H01L33/50 ,  H01L33/54 ,  H01L33/60 ,  H01L33/46 ,  H01L25/075 ,  H05B33/08 ,  H01L33/56

CPC分类号： H01L25/167 ,  H01L25/0753 ,  H01L25/165 ,  H01L29/866 ,  H01L33/46 ,  H01L33/505 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0058 ,  H05B33/0803 ,  H05B33/089 ,  H01L2924/00012

摘要： A light emitting device includes a substrate, a light-emitting diode chip mounted on the substrate, a Zener diode chip mounted next to the light-emitting diode chip on the substrate, a frame-like dam material formed on the substrate to surround the light-emitting diode chip and the Zener diode chip, and a light-reflective resin injected inside the dam material to coat side surfaces of the light-emitting diode chip and side surfaces and an upper surface of the Zener diode chip. A part of the frame-like dam material swells outward to surround three of the side surfaces of the Zener diode chip.

摘要翻译： 发光装置包括基板，安装在基板上的发光二极管芯片，安装在基板上的发光二极管芯片旁边的齐纳二极管芯片，形成在基板上以围绕光线的框状阻挡材料 注入二极管芯片和齐纳二极管芯片，以及注入堤坝材料内的光反射树脂，以涂覆发光二极管芯片的侧表面和齐纳二极管芯片的侧表面和上表面。 框架式坝体的一部分向外膨胀以围绕齐纳二极管芯片的三个侧表面。

公开(公告)号：US20160163883A1

公开(公告)日：2016-06-09

申请号：US15041019

申请日：2016-02-10

申请人： ROHM CO., LTD.

发明人： Hiroki YAMAMOTO

IPC分类号： H01L29/866

CPC分类号： H01L29/866 ,  H01L27/0255 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/66106 ,  H01L29/747

摘要： A bidirectional Zener diode of the present invention includes a semiconductor substrate of a first conductivity type, a first electrode and a second electrode which are defined on the semiconductor substrate, and a plurality of diffusion regions of a second conductivity type, which are defined at intervals from one another on a surface portion of the semiconductor substrate, to define p-n junctions with the semiconductor substrate, and the plurality of diffusion regions include diode regions which are electrically connected to the first electrode and the second electrode, and pseudo-diode regions which are electrically isolated from the first electrode and the second electrode.

公开(公告)号：US09362352B2

公开(公告)日：2016-06-07

申请号：US14845386

申请日：2015-09-04

申请人： ROHM CO., LTD.

发明人： Kenichi Yoshimochi

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L29/866 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L23/482 ,  H01L27/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/08 ,  H01L23/00

CPC分类号： H01L21/76237 ,  H01L21/76205 ,  H01L21/763 ,  H01L23/4824 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L27/0207 ,  H01L27/0629 ,  H01L27/0635 ,  H01L27/0664 ,  H01L27/11896 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66106 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/866 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/036 ,  H01L2224/039 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/4911 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2224/03 ,  H01L2924/01029 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes a first-conductivity-type semiconductor layer including an active region in which a transistor having impurity regions is formed and a marginal region surrounding the active region, a second-conductivity-type channel layer formed between the active region and the marginal region and forming a front surface of the semiconductor layer, at least one gate trench formed in the active region to extend from the front surface of the semiconductor layer through the channel layer, a gate insulation film formed on an inner surface of the gate trench, a gate electrode formed inside the gate insulation film in the gate trench, and at least one isolation trench arranged between the active region and the marginal region to surround the active region and extending from the front surface of the semiconductor layer through the channel layer, the isolation trench having a depth equal to that of the gate trench.

公开(公告)号：US09362266B1

公开(公告)日：2016-06-07

申请号：US14657653

申请日：2015-03-13

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Jam-Wem Lee

IPC分类号： H01L29/66 ,  H01L27/06 ,  H01L27/02 ,  H01L23/60 ,  H01L29/866 ,  H01L27/08 ,  H01L23/528

CPC分类号： H01L27/0292 ,  H01L23/528 ,  H01L23/60 ,  H01L27/02 ,  H01L27/0248 ,  H01L27/0255 ,  H01L27/0814 ,  H01L29/0684 ,  H01L29/866 ,  H01L2924/0002 ,  H05F3/00 ,  H01L2924/00

摘要： A robust electrostatic (ESD) protection device is provided. In one example, the ESD protection device is configured to accommodate three nodes. When used with a differential signal device, the first and second nodes may be coupled with the differential signal device's BP and BM signal lines, respectively, and the third node may be coupled to a voltage source. This allows for a single ESD protection device to be used to protect the signal lines of the differential signal device, thus providing significant substrate area savings as compared to the conventional means of using three dual-node ESD protection devices to accomplish substantially the same protection mechanism. Moreover, the ESD protection device may be structurally designed to handle high voltage ESD events, as required by the FlexRay standard.

摘要翻译： 提供强大的静电（ESD）保护装置。 在一个示例中，ESD保护装置被配置为容纳三个节点。 当与差分信号装置一起使用时，第一和第二节点可以分别与差分信号装置的BP和BM信号线耦合，并且第三节点可以耦合到电压源。 这允许使用单个ESD保护装置来保护差分信号装置的信号线，因此与使用三个双节点ESD保护装置来实现基本上相同的保护机制的常规手段相比，提供了显着的基板面积节省 。 此外，ESD保护器件可以在结构上设计为按照FlexRay标准的要求处理高压ESD事件。

公开(公告)号：US20160126271A1

公开(公告)日：2016-05-05

申请号：US14847567

申请日：2015-09-08

申请人： Katsuyuki Sakurano ,  Takaaki Negoro ,  Yoshinori Ueda ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Yasukazu Nakatani ,  Hirofumi Watanabe

发明人： Katsuyuki Sakurano ,  Takaaki Negoro ,  Yoshinori Ueda ,  Kazuhiro Yoneda ,  Katsuhiko Aisu ,  Yasukazu Nakatani ,  Hirofumi Watanabe

IPC分类号： H01L27/146 ,  H01L29/868 ,  H01L29/866

CPC分类号： H01L29/868 ,  H01L27/14603 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14643 ,  H01L29/866

摘要： A solid-state image sensing device is provided including a first semi-conducting layer of first conductivity, a second semi-conducting layer of first conductivity disposed on the first semi-conducting layer, a semiconductor region of second conductivity different from the first conductivity disposed in the second semi-conducting layer, a deep trench configured to isolate a plurality of neighboring pixels from each other, and an electrode implanted into the deep trench, where the semiconductor region of second conductivity, the second semi-conducting layer, and the first semi-conducting layer are disposed in that order from a proximal side to a distal side, the second semi-conducting layer is split by the deep trench into sections that correspond to the pixels, an impurity concentration of first conductivity of the first semi-conducting layer is higher than an impurity concentration of first conductivity of the second semi-conducting layer, and the deep trench contacts the first semi-conducting layer.

摘要翻译： 提供一种固态图像感测装置，包括：第一导电性的第一半导体层，设置在第一半导电层上的第一导电性的第二半导体层，与第一导电性不同的第二导电性半导体区域 在第二半导电层中，深沟槽被配置为将多个相邻像素彼此隔离，以及注入到深沟槽中的电极，其中第二导电层的半导体区域，第二半导体层和第一半导体层 半导体层从近侧到远侧按顺序设置，第二半导体层被深沟槽分成与像素对应的部分，第一半导电层的第一导电性的杂质浓度 层比第二半导体层的第一导电性的杂质浓度高，并且深沟槽接触第一半导体层 制作层。

公开(公告)号：US09331142B2

公开(公告)日：2016-05-03

申请号：US14819826

申请日：2015-08-06

申请人： Vishay General Semiconductor LLC

发明人： Shih-Kuan Chen ,  Wan-Lan Chiang ,  Ming-Tai Chiang ,  Chih-Ping Peng ,  Yih-Yin Lin

IPC分类号： H01L21/425 ,  H01L29/06 ,  H01L29/861 ,  H01L29/66 ,  H01L21/265 ,  H01L21/283 ,  H01L21/225 ,  H01L29/866

CPC分类号： H01L29/0611 ,  H01L21/2253 ,  H01L21/2257 ,  H01L21/2652 ,  H01L21/283 ,  H01L29/456 ,  H01L29/66106 ,  H01L29/66113 ,  H01L29/861 ,  H01L29/866

摘要： A semiconductor device such as a Zener diode includes a first semiconductor material of a first conductivity type and a second semiconductor material of a second conductivity type in contact with the first semiconductor material to form a junction therebetween. A first oxide layer is disposed over a portion of the second semiconductor material such that a remaining portion of the second semiconductor material is exposed. A polysilicon layer is disposed on the exposed portion of the second semiconductor material and a portion of the first oxide layer. A first conductive layer is disposed on the polysilicon layer. A second conductive layer is disposed on a surface of the first semiconductor material opposing a surface of the first semiconductor material in contact with the second semiconductor material.

摘要翻译： 诸如齐纳二极管的半导体器件包括第一导电类型的第一半导体材料和与第一半导体材料接触形成第二导电类型的第二导电类型的第二半导体材料，以形成它们之间的连接点。 第一氧化物层设置在第二半导体材料的一部分上，使得第二半导体材料的剩余部分被暴露。 多晶硅层设置在第二半导体材料的暴露部分和第一氧化物层的一部分上。 第一导电层设置在多晶硅层上。 第二导电层设置在与第二半导体材料接触的与第一半导体材料的表面相对的第一半导体材料的表面上。

公开(公告)号：US09331063B2

公开(公告)日：2016-05-03

申请号：US14714837

申请日：2015-05-18

申请人： Renesas Electronics Corporation

发明人： Ryo Niide ,  Shinichi Yamada ,  Yasuharu Ichinose ,  Toshiya Nozawa

IPC分类号： H01L33/62 ,  H01L27/02 ,  H01L27/15 ,  H01L33/36 ,  H01L25/16 ,  H01L29/866 ,  H01L23/00 ,  H01L33/44 ,  H01L33/48

CPC分类号： H01L27/0248 ,  H01L24/32 ,  H01L25/167 ,  H01L27/15 ,  H01L29/866 ,  H01L33/36 ,  H01L33/44 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2924/07802 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device simplifies the manufacturing process. The device includes a protective chip which has a surface Zener diode to protect a light emitting chip with an LED formed therein from surge voltage. The protective chip is mounted over a wiring electrically coupled through a metal wire to an anode electrode coupled to a p-type semiconductor region whose conductivity type is the same as that of the semiconductor substrate of the chip. The anode electrode of the protective chip is electrically coupled to the back surface of the chip without PN junction, so even if the back surface is in contact with the wiring, no problem occurs with the electrical characteristics of the Zener diode. This eliminates the need to form an insulating film on the back surface of the chip to prevent contact between the back surface and the wiring, thus simplifying the manufacturing process.

摘要翻译： 半导体器件简化了制造工艺。 该器件包括保护芯片，该保护芯片具有表面齐纳二极管，以保护发光芯片与其中形成的LED的浪涌电压。 保护芯片安装在通过金属线电耦合到与p型半导体区域耦合的阳极的布线上，该p型半导体区域的导电类型与芯片的半导体衬底的导电类型相同。 保护芯片的阳极电极电耦合到芯片的背面而没有PN结，所以即使背面与布线接触，也不会在齐纳二极管的电气特性上出现问题。 这样就不需要在芯片背面形成绝缘膜，以防止背面和布线之间的接触，从而简化了制造工艺。

公开(公告)号：US20160093604A1

公开(公告)日：2016-03-31

申请号：US14637128

申请日：2015-03-03

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Hideaki SAI

IPC分类号： H01L27/02 ,  H01L29/06 ,  H01L23/522 ,  H01L29/861 ,  H01L29/866 ,  H01L29/36 ,  H01L23/528

CPC分类号： H01L27/0255 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/861 ,  H01L29/8611

摘要： A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type selectively provided on a surface of the first semiconductor region, an insulating layer provided on the first semiconductor region and on the second semiconductor region, and having a first opening exposing a portion of the second semiconductor region therein, a wiring layer on the insulating layer and electrically connected to the second semiconductor region through the first opening, and a third semiconductor region of the second conductivity type below the insulating layer and contacting the first semiconductor region.

摘要翻译： 半导体器件包括第一导电类型的第一半导体区域，选择性地设置在第一半导体区域的表面上的第二导电类型的第二半导体区域，设置在第一半导体区域和第二半导体区域上的绝缘层， 并且具有暴露其中的第二半导体区域的一部分的第一开口，绝缘层上的布线层，并且通过第一开口电连接到第二半导体区域，以及在绝缘层下面的第二导电类型的第三半导体区域，以及 使第一半导体区域接触。

公开(公告)号：US09293605B2

公开(公告)日：2016-03-22

申请号：US14635627

申请日：2015-03-02

申请人： ROHM CO., LTD.

发明人： Hiroki Yamamoto

IPC分类号： H01L29/78 ,  H01L29/866 ,  H01L29/417 ,  H01L27/02 ,  H01L29/747 ,  H01L29/66 ,  H01L29/06

CPC分类号： H01L29/866 ,  H01L27/0255 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/66106 ,  H01L29/747

摘要： A bidirectional Zener diode of the present invention includes a semiconductor substrate of a first conductivity type, a first electrode and a second electrode which are defined on the semiconductor substrate, and a plurality of diffusion regions of a second conductivity type, which are defined at intervals from one another on a surface portion of the semiconductor substrate, to define p-n junctions with the semiconductor substrate, and the plurality of diffusion regions include diode regions which are electrically connected to the first electrode and the second electrode, and pseudo-diode regions which are electrically isolated from the first electrode and the second electrode.

摘要翻译： 本发明的双向齐纳二极管包括限定在半导体衬底上的第一导电类型的半导体衬底，第一电极和第二电极以及间隔限定的多个第二导电类型的扩散区 在所述半导体衬底的表面部分上彼此定义与所述半导体衬底的pn结，并且所述多个扩散区域包括电连接到所述第一电极和所述第二电极的二极管区域，以及伪二极管区域， 与第一电极和第二电极电隔离。

公开(公告)号：US20160079240A1

公开(公告)日：2016-03-17

申请号：US14617799

申请日：2015-02-09

申请人： Kabushiki Kaisha Toshiba

发明人： Naomasa Sugita

IPC分类号： H01L27/08 ,  H01L29/866 ,  H01L29/06

CPC分类号： H01L27/0814 ,  H01L23/49562 ,  H01L23/49575 ,  H01L25/18 ,  H01L29/0619 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/407 ,  H01L29/866 ,  H01L2224/48247 ,  H01L2224/49113

摘要： According to one embodiment, a semiconductor device includes a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, an isolation region, a first electrode, a second electrode, and a third electrode. The plurality of second semiconductor regions is selectively provided on the first semiconductor region. The second semiconductor region has a first conductivity type. The plurality of third semiconductor regions is selectively provided on the first semiconductor region. Each of the third semiconductor regions is adjacent to each of the second semiconductor regions. The third semiconductor region has a second conductivity type. The isolation region is provided in the first semiconductor region. The isolation region is positioned between the adjacent second semiconductor regions and the adjacent third semiconductor regions. The first electrode is connected to the second semiconductor region and the third semiconductor region which are adjacent to the isolation region.

摘要翻译： 根据一个实施例，半导体器件包括第一半导体区域，多个第二半导体区域，多个第三半导体区域，隔离区域，第一电极，第二电极和第三电极。 多个第二半导体区域选择性地设置在第一半导体区域上。 第二半导体区域具有第一导电类型。 多个第三半导体区域选择性地设置在第一半导体区域上。 每个第三半导体区域与每个第二半导体区域相邻。 第三半导体区域具有第二导电类型。 隔离区域设置在第一半导体区域中。 隔离区域位于相邻的第二半导体区域和相邻的第三半导体区域之间。 第一电极连接到与隔离区相邻的第二半导体区域和第三半导体区域。