公开(公告)号：US09935038B2

公开(公告)日：2018-04-03

申请号：US13444649

申请日：2012-04-11

申请人： Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

发明人： Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

IPC分类号： H01L23/482 ,  H01L23/00 ,  H01L23/528 ,  H01L23/488 ,  H01L23/498 ,  H01L21/56

CPC分类号： H01L23/4824 ,  H01L21/563 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/05 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16056 ,  H01L2224/16146 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： Semiconductor devices packages and methods are disclosed. In one embodiment, a package for a semiconductor device includes a substrate and a contact pad disposed on a first surface of the substrate. The contact pad has a first side and a second side opposite the first side. A conductive trace is coupled to the first side of the contact pad, and an extension of the conductive trace is coupled to the second side of the contact pad. A plurality of bond pads is disposed on a second surface of the substrate.

公开(公告)号：US20140041918A1

公开(公告)日：2014-02-13

申请号：US13570089

申请日：2012-08-08

申请人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

发明人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

IPC分类号： H02G15/00 ,  H01R43/16 ,  H05K1/11

CPC分类号： H05K3/4015 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2924/15311 ,  H01L2924/19107 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49147 ,  Y10T29/49204 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein is a system and method for mounting packages by forming one or more wire loop interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a first substrate. A first and second stud ball may each have at least one flat surface be disposed on a single mounting pad, and a wire having a bend region and forming a loop may be disposed between the stud balls. The stud balls may be formed from a deformed mouthing node formed on a wire. The loop may be mounted on a mounting pad on a first substrate and a second substrate may be mounted on the loop via a conductive material such as solder.

摘要翻译： 本文公开了一种用于通过形成一个或多个线环互连件（可选地，使用引线键合器）并将互连件安装到第一基板上的安装焊盘来安装封装件的系统和方法。 第一和第二螺柱球可以各自具有设置在单个安装垫上的至少一个平坦表面，并且具有弯曲区域并形成环的线可以设置在螺柱球之间。 螺柱球可以由形成在线上的变形的口部节点形成。 环可以安装在第一基板上的安装焊盘上，并且第二基板可以经由诸如焊料的导电材料安装在环上。

公开(公告)号：US08927877B2

公开(公告)日：2015-01-06

申请号：US13570089

申请日：2012-08-08

申请人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

发明人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

IPC分类号： H05K1/11 ,  H05K3/30

CPC分类号： H05K3/4015 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2924/15311 ,  H01L2924/19107 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49147 ,  Y10T29/49204 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein is a system and method for mounting packages by forming one or more wire loop interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a first substrate. A first and second stud ball may each have at least one flat surface be disposed on a single mounting pad, and a wire having a bend region and forming a loop may be disposed between the stud balls. The stud balls may be formed from a deformed mouthing node formed on a wire. The loop may be mounted on a mounting pad on a first substrate and a second substrate may be mounted on the loop via a conductive material such as solder.

摘要翻译： 本文公开了一种用于通过形成一个或多个线环互连件（可选地，使用引线键合器）并将互连件安装到第一基板上的安装焊盘来安装封装件的系统和方法。 第一和第二螺柱球可以各自具有设置在单个安装垫上的至少一个平坦表面，并且具有弯曲区域并形成环的线可以设置在螺柱球之间。 螺柱球可以由形成在线上的变形的口部节点形成。 环可以安装在第一基板上的安装焊盘上，并且第二基板可以经由诸如焊料的导电材料安装在环上。

公开(公告)号：US20130105979A1

公开(公告)日：2013-05-02

申请号：US13483734

申请日：2012-05-30

申请人： Chen-Hua Yu ,  Chien-Hsun Lee ,  Chen Yung Ching

发明人： Chen-Hua Yu ,  Chien-Hsun Lee ,  Chen Yung Ching

IPC分类号： H01L23/485

CPC分类号： H01L23/147 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/525 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06155 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/92247 ,  H01L2224/05599

摘要： Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a bump region and a tail region coupled to the bump region. The metal stud bumps are embedded in solder joints.

摘要翻译： 封装封装（PoP）器件和封装半导体管芯的方法被公开。 PoP器件包括第一封装管芯和耦合到第一封装管芯的第二封装管芯。 在第一封装模具和第二封装模具之间设置金属凸块凸块。 金属柱凸起包括凸起区域和耦合到凸起区域的尾部区域。 金属螺柱凸块嵌入焊点。

公开(公告)号：US07315216B2

公开(公告)日：2008-01-01

申请号：US11408040

申请日：2006-04-21

申请人： Chih-Wei Yang ,  Chien-Hsun Lee ,  Hsiang-Sheng Liu ,  Juh-Gua Shiau

发明人： Chih-Wei Yang ,  Chien-Hsun Lee ,  Hsiang-Sheng Liu ,  Juh-Gua Shiau

IPC分类号： H03D3/24 ,  H03L7/085 ,  H03L7/033

CPC分类号： H03L7/0812 ,  H03L7/07 ,  H03L7/085 ,  H03L7/093

摘要： An adjusting frequency device of built-in oscillator for USB interface and a method thereof are described. It is Auto detect the error of bit-rate between the USB host and the USB device, and produce tiny counting time for clocking the clock error between the USB host and the USB device by a delay lock loop. The clock error after quantification, digitization and operation outputting a quantitative code, then the oscillator adjusts the oscillation frequency according to the quantitative code. Whereby adjusting the oscillation frequency of the USB device and the frequency of the USB host to less than 1% clock error for ensuring the accuracy of data transmission.

摘要翻译： 描述了用于USB接口的内置振荡器的调整频率装置及其方法。 它是自动检测USB主机和USB设备之间比特率的错误，并产生微小的计数时间，通过延迟锁定环来计时USB主机和USB设备之间的时钟错误。 量化后的时钟误差，数字化和运算输出定量代码，然后振荡器根据定量代码调整振荡频率。 通过将USB设备的振荡频率和USB主机的频率调整到小于1％的时钟误差，以确保数据传输的准确性。

公开(公告)号：US08704354B2

公开(公告)日：2014-04-22

申请号：US13586629

申请日：2012-08-15

申请人： Jung Wei Cheng ,  Tsung-Ding Wang ,  Chien-Hsun Lee ,  Chun-Chih Chuang

发明人： Jung Wei Cheng ,  Tsung-Ding Wang ,  Chien-Hsun Lee ,  Chun-Chih Chuang

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06155 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/85 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00012

摘要： The described embodiments of forming bonding structures for package on package involves removing a portion of connectors and molding compound of the lower package. The described bonding mechanisms enable easier placement and alignment of connectors of an upper package to with connector of a lower package. As a result, the process window of the bonding process is wider. In addition, the bonding structures have smoother join profile and planar joint plane. As a result, the bonding structures are less likely to crack and also are less likely to crack. Both the yield and the form factor of the package on package structure are improved.

摘要翻译： 所形成的用于包装在包装上的粘合结构的实施例包括去除连接器的一部分和下封装的模塑料。 所描述的接合机构使得能够更容易地将上部封装的连接器放置和对准到具有较低封装的连接器。 结果，接合过程的过程窗口更宽。 此外，接合结构具有更平滑的接合轮廓和平面接合平面。 结果，接合结构不太可能破裂，也不易破裂。 包装结构上的包装的产量和形状因数均得到改善。

公开(公告)号：US20090278581A1

公开(公告)日：2009-11-12

申请号：US12504089

申请日：2009-07-16

申请人： Chih-Wei Yang ,  Chien-Hsun Lee

发明人： Chih-Wei Yang ,  Chien-Hsun Lee

IPC分类号： H03L7/06 ,  H03K3/017

CPC分类号： H03L7/0812

摘要： The provided delay lock loop delaying an input signal includes a quadrature generator, a voltage controller and a delay cell. The input signal is inputted into the quadrature generator and the delay cell. A phase-changing signal from the quadrature generator and a delay signal respectively from the delay cell are inputted into the voltage controller at the same time so that a control voltage inputted into the delay cell to control a delay time of the delay signal is generated. Also, the provided phase angle generator generates an output signal in an arbitrary phase.

摘要翻译： 提供的延迟锁定环路延迟输入信号包括正交发生器，电压控制器和延迟单元。 输入信号被输入到正交发生器和延迟单元中。 来自正交发生器的相位变化信号和来自延迟单元的延迟信号同时被输入到电压控制器中，从而产生输入到延迟单元中以控制延迟信号的延迟时间的控制电压。 此外，所提供的相位角发生器产生任意相位的输出信号。

公开(公告)号：US5234149A

公开(公告)日：1993-08-10

申请号：US938194

申请日：1992-08-28

申请人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai

发明人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai

IPC分类号： H01L21/60 ,  G01R1/04 ,  H05K3/34

CPC分类号： G01R1/04 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2924/00013 ,  H01L2924/01322 ,  Y10T29/49149

摘要： One or more metallized chip terminals of an electronic device, such as an integrated circuit chip or a laser chip, in one embodiment are temporarily bonded to one or more metallized substrate pads of a wiring substrate, as for the purpose of electrically testing the electronic device. The composition of the metallized chip terminals is suitably different from that of the metallized substrate pads. The pads and terminals are aligned and electrically connected together with a solder located between them under pressure and a temperature above the melting point of the solder. The solder is cooled, and electrical tests of the electronic device are performed by means of electrical access from testing circuitry to the chip terminals through the substrate pads. Then the solder is heated again above its melting point while being immersed in a liquid flux, whereby the liquid solder wets the metallized chip terminals but not the metallized substrate pads, and the device is gently mechanically pulled away from the wiring substrate and is cooled thereafter. This substrate can thereafter be reused for testing other electronic devices that have similarly suitably metallized terminals. In another embodiment, testing can be performed or not as may be desired; and, as for the purpose of chip operation as an integrated circuit or laser, the chip can be allowed to remain permanently bonded to the substrate in the form of a heat-sinking or heat-spreading submount, or it can be allowed to remain only temporarily bonded to the submount and subsequently pulled away from the submount for the purpose of reuse of the submount for another chip.

摘要翻译： 在一个实施例中，诸如集成电路芯片或激光芯片的电子器件（10）的一个或多个金属化布线或芯片端子（8,9）暂时地接合到布线基板的一个或多个金属化的基板焊盘 10），用于电子设备的电气测试。 金属化芯片端子的组成与金属化衬底焊盘的组成适当地不同。 焊盘和端子在压力和高于焊料熔点的温度下对齐并电连接在一起，焊料位于它们之间。 焊料被冷却，并且通过从测试电路通过衬底焊盘到芯片端子的电接入来执行电子器件的电气测试。 然后将焊料再次加热到其熔点以上，同时浸入液体焊剂中，由此液体焊料润湿金属化的芯片端子而不是金属化的衬底焊盘，并且通过机械力（F）从布线轻轻地将器件拉出 然后冷却。 该衬底此后可重新用于测试具有类似适当金属化端子的其它电子器件。 在另一个实施例中，可以根据需要进行或不执行测试; 并且，对于作为集成电路或激光器的芯片操作的目的，可以允许芯片以散热或散热底座的形式保持永久地结合到基板，或者可以仅允许该芯片保持 临时绑定到基座并随后从基座上拉出，以便重新使用另一个芯片的基座。

公开(公告)号：US5197654A

公开(公告)日：1993-03-30

申请号：US792559

申请日：1991-11-15

申请人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

发明人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

IPC分类号： H01L21/52 ,  B23K35/00 ,  B23K35/14 ,  H01L21/60 ,  H01L21/603 ,  H01S5/00 ,  H01S5/02 ,  H01S5/042

CPC分类号： H01L24/80 ,  B23K35/001 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2908 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01S5/02272 ,  H01S5/02484 ,  H01S5/0425 ,  Y10T428/12715

摘要： A device such as a laser is bonded to a submount such as diamond by a process in which the submount is successively coated with an adhesion layer such as titanium, a barrier layer such as nickel, and a gold-tin solder-metallization composite layer formed by sequential deposition on the barrier layer a number (preferably greater than seven) of multiple alternating layers of gold and tin, the last layer being gold having a thickness that is equal to approximately one-half or less than the thickness of the (next-to-last) tin layer that it contacts immediately beneath it. The bonding is performed under applied heat that is sufficient to melt the solder-metallization composite layer. Prior to the bonding, (in addition to the submount) the device advantageously is coated with gold and optionally with a similar gold-tin solder-metallization composite layer, at least at locations where it comes in contact with the gold-tin solder-metallization composite layer.

摘要翻译： 诸如激光器的装置通过其中副安装座连续地涂覆有诸如钛的粘合层，诸如镍的阻挡层和形成的金 - 锡焊料 - 金属化复合层的工艺而被结合到诸如金刚石的基座 通过在阻挡层上顺次沉积多个（优选大于7个）金和锡的多个交替层，最后一层是金，其厚度等于（下一层）的厚度的大约一半或更小， 最后）锡层，它紧挨着它。 在足以熔化焊料金属化复合层的施加的热下进行接合。 在接合之前（除了基座之外），装置有利地被镀金，并且可选地具有类似的金 - 锡焊料 - 金属化复合层，至少在与金 - 锡焊料金属化接触的位置处 复合层。

公开(公告)号：US07872509B2

公开(公告)日：2011-01-18

申请号：US12504089

申请日：2009-07-16

申请人： Chih-Wei Yang ,  Chien-Hsun Lee

发明人： Chih-Wei Yang ,  Chien-Hsun Lee

IPC分类号： H03L7/06

CPC分类号： H03L7/0812

摘要： The provided delay lock loop delaying an input signal includes a quadrature generator, a voltage controller and a delay cell. The input signal is inputted into the quadrature generator and the delay cell. A phase-changing signal from the quadrature generator and a delay signal respectively from the delay cell are inputted into the voltage controller at the same time so that a control voltage inputted into the delay cell to control a delay time of the delay signal is generated. Also, the provided phase angle generator generates an output signal in an arbitrary phase.

摘要翻译： 提供的延迟锁定环路延迟输入信号包括正交发生器，电压控制器和延迟单元。 输入信号被输入到正交发生器和延迟单元中。 来自正交发生器的相位变化信号和来自延迟单元的延迟信号同时被输入到电压控制器中，从而产生输入到延迟单元中以控制延迟信号的延迟时间的控制电压。 此外，所提供的相位角发生器产生任意相位的输出信号。