公开(公告)号：US08664751B2

公开(公告)日：2014-03-04

申请号：US13115431

申请日：2011-05-25

申请人： Yong-hoon Kim ,  Hee-Seok Lee ,  Jin-ha Jeong

发明人： Yong-hoon Kim ,  Hee-Seok Lee ,  Jin-ha Jeong

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1617 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a substrate in which a plurality of wires are formed; at least one semiconductor chip electrically connected to portions of the plurality of wires; and a shielding can mounted on the substrate, surrounding the at least one semiconductor chip, electrically connected to at least one wire of the plurality of wires and including a soft magnetic material. The semiconductor package can prevent or substantially reduce electromagnetic interference (EMI).

摘要翻译： 半导体封装包括其中形成有多根导线的基板; 至少一个半导体芯片电连接到多个导线的部分; 并且屏蔽可以安装在基板上，围绕至少一个半导体芯片，电连接到多根导线中的至少一根导线并且包括软磁性材料。 半导体封装可以防止或显着降低电磁干扰（EMI）。

公开(公告)号：US08466554B2

公开(公告)日：2013-06-18

申请号：US13028836

申请日：2011-02-16

申请人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

发明人： Ji-Yong Park ,  Hee-Seok Lee ,  Chul-Woo Kim ,  Sang-Gui Jo ,  Kwang-Jin Bae ,  Seung-Hwan Kim

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/12 ,  H01L23/053

CPC分类号： H01L24/03 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0557 ,  H01L2224/0603 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/1403 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2224/05552 ,  H01L2924/00

摘要： An electronic device includes first and second interconnections formed on a first surface of a substrate and spaced apart from each other. The electronic device includes a first insulating material layer disposed on the substrate including the first and second interconnections and including a first opening exposing a predetermined region of the first interconnection. The electronic device further includes a first pad filling the first opening and having a greater width than the first opening. The first pad covers at least a part of the second interconnection adjacent to one end of the first interconnection, and the first pad is electrically insulated from the second interconnection by the first insulating material layer.

摘要翻译： 电子设备包括形成在基板的第一表面上并彼此间隔开的第一和第二互连。 电子设备包括设置在基板上的第一绝缘材料层，包括第一和第二互连，并且包括暴露第一互连的预定区域的第一开口。 电子设备还包括填充第一开口并且具有比第一开口更大的宽度的第一垫。 第一焊盘覆盖与第一互连的一端相邻的第二互连的至少一部分，并且第一焊盘通过第一绝缘材料层与第二互连电绝缘。

公开(公告)号：US20120086109A1

公开(公告)日：2012-04-12

申请号：US13172174

申请日：2011-06-29

申请人： Yong-Hoon Kim ,  Hee-Seok Lee ,  Jin-Ha Jeong ,  Ji-Hyun Lee

发明人： Yong-Hoon Kim ,  Hee-Seok Lee ,  Jin-Ha Jeong ,  Ji-Hyun Lee

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/0233 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments relate to a semiconductor device. The semiconductor device may include a first semiconductor chip including a semiconductor substrate, a first through via that penetrates the semiconductor substrate, a second semiconductor chip stacked on one plane of the first semiconductor chip, and a shielding layer covering at least one portion of the first and/or second semiconductor chip and electrically connected to the first through via.

摘要翻译： 示例实施例涉及半导体器件。 半导体器件可以包括第一半导体芯片，其包括半导体衬底，穿透半导体衬底的第一通孔，堆叠在第一半导体芯片的一个平面上的第二半导体芯片，以及覆盖第一半导体衬底的至少一部分的屏蔽层 和/或第二半导体芯片，并且电连接到第一通孔。

公开(公告)号：US20120075268A1

公开(公告)日：2012-03-29

申请号：US13242394

申请日：2011-09-23

申请人： Ye-Chung Chung ,  Hee-seok Lee ,  Yun-Seok Choi ,  Keung-Beum Kim

发明人： Ye-Chung Chung ,  Hee-seok Lee ,  Yun-Seok Choi ,  Keung-Beum Kim

IPC分类号： G09G5/00 ,  H03L5/00

CPC分类号： H01L27/1244 ,  G02F1/13452 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2330/021 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13124 ,  H01L2224/13639 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/1426 ,  H05K1/148

摘要： An image display panel assembly includes a flexible printed circuit (FPC), an image display panel, a gate driver integrated circuit (IC) package, and a source driver IC package. The FPC is configured to receive gate and source driving signals. The image display panel is electrically connected to the FPC, and includes a gate driving signal transfer pattern along a first edge of the image display panel, a source driving signal transfer pattern along a second edge adjacent to the first end, and a plurality of pixels. The gate driver integrated circuit (IC) package is configured to receive the gate driving signal through the gate driving signal transfer pattern and provide the gate driving signal to the plurality of pixels. The source driver IC package is configured to receive the source driving signal through the source driving signal transfer pattern and provide the source driving signal to the plurality of pixels.

摘要翻译： 图像显示面板组件包括柔性印刷电路（FPC），图像显示面板，栅极驱动器集成电路（IC）封装以及源极驱动器IC封装。 FPC被配置为接收门和源驱动信号。 图像显示面板电连接到FPC，并且包括沿着图像显示面板的第一边缘的栅极驱动信号传递图案，沿着与第一端相邻的第二边缘的源极驱动信号传递图案，以及多个像素 。 栅极驱动器集成电路（IC）封装被配置为通过栅极驱动信号传输图案接收栅极驱动信号，并将栅极驱动信号提供给多个像素。 源极驱动器IC封装被配置为通过源极驱动信号传输图案接收源极驱动信号，并将源极驱动信号提供给多个像素。

公开(公告)号：US20110008048A1

公开(公告)日：2011-01-13

申请号：US12662674

申请日：2010-04-28

申请人： Yong-hoon Kim ,  Hee-Seok Lee

发明人： Yong-hoon Kim ,  Hee-Seok Lee

IPC分类号： H04B10/00 ,  H04J14/02

CPC分类号： H04J14/0283 ,  H04J14/0201

摘要： An optical system and an SSD module that maintain optimal SI, PI and EMI characteristics without a shield based on a ground voltage and an impedance match. The optical system includes a solid state drive (SSD) module and an input/output (I/O) interface. The SSD module includes a plurality of solid state memory units. The input/output (I/O) interface receives data to be written to at least one of the solid state memory units from a main memory unit, the input/output (I/O) interface transmits data written in at least one of the solid state memory units to the main memory unit. The SSD module and the I/O interface transmit and receive data using an optical medium.

摘要翻译： 一种光学系统和一个SSD模块，可以根据接地电压和阻抗匹配保持最佳的SI，PI和EMI特性，而不需要屏蔽。 光学系统包括固态驱动器（SSD）模块和输入/输出（I / O）接口。 SSD模块包括多个固态存储器单元。 输入/输出（I / O）接口从主存储器单元接收要写入至少一个固态存储器单元的数据，输入/输出（I / O）接口发送写入至少一个 固态存储器单元到主存储器单元。 SSD模块和I / O接口使用光学介质发送和接收数据。

公开(公告)号：US20100276189A1

公开(公告)日：2010-11-04

申请号：US12772385

申请日：2010-05-03

申请人： Eun seok Song ,  Hee seok Lee ,  Hyun-a Kim ,  So-young Lim

发明人： Eun seok Song ,  Hee seok Lee ,  Hyun-a Kim ,  So-young Lim

IPC分类号： H05K1/18 ,  H05K1/11

CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48233 ,  H01L2224/48235 ,  H01L2224/48237 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： In a method of multiple-bit programming of a three-dimensional memory device having arrays of memory cells that extend in horizontal and vertical directions relative to a substrate, the method comprises first programming a memory cell to be programmed to one among a first set of states. At least one neighboring memory cell that neighbors the memory cell to be programmed to one among the first set of states is then first programmed. Following the first programming of the at least one neighboring memory cell, second programming the memory cell to be programmed to one among a second set of states, wherein the second set of states has a number of states that is greater than the number of states in the first set of states.

摘要翻译： 在具有相对于衬底在水平和垂直方向上延伸的存储器单元阵列的三维存储器件的多位编程的方法中，该方法包括首先将要编程的存储器单元编程为第一组 状态。 然后，首先对与第一组状态中的一个相邻的要存储单元相邻的至少一个相邻存储单元进行编程。 在对所述至少一个相邻存储器单元进行第一编程之后，将要编程的存储器单元的第二编程为第二组状态之一，其中所述第二组状态具有大于所述状态数 第一套状态。

公开(公告)号：US20100044851A1

公开(公告)日：2010-02-25

申请号：US12461639

申请日：2009-08-19

申请人： Yun-Seok Choi ,  Hee-Seok Lee ,  Kyoung-Sei Choi

发明人： Yun-Seok Choi ,  Hee-Seok Lee ,  Kyoung-Sei Choi

IPC分类号： H01L23/31 ,  H01L21/60 ,  H01L23/488

CPC分类号： H01L21/563 ,  H01L23/295 ,  H01L23/60 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Flip chip packages and methods of manufacturing the same are provided, the flip chip packages may include a package substrate, a semiconductor chip, conductive bumps, a ground pattern and an underfilling layer. The semiconductor chip may be over the package substrate. The conductive bumps may be between the semiconductor chip and the package substrate to electrically connect the semiconductor chip and the package substrate with each other. The ground pattern may ground one of the package substrate and the semiconductor chip. The underfilling layer may be between the package substrate and the semiconductor chip to surround the conductive bumps. The underfilling layer may have a diode selectively located between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity.

摘要翻译： 提供了倒装芯片封装及其制造方法，倒装芯片封装可以包括封装衬底，半导体芯片，导电凸块，接地图案和底部填充层。 半导体芯片可以在封装衬底之上。 导电凸块可以在半导体芯片和封装基板之间，以将半导体芯片和封装基板彼此电连接。 接地图可以将封装衬底和半导体芯片之一接地。 底部填充层可以在封装衬底和半导体芯片之间以包围导电凸块。 底部填充层可以通过施加到底部填充层的静电来选择性地位于接地图案和导电凸块之间的二极管，以保护半导体芯片免受静电。

公开(公告)号：US07663221B2

公开(公告)日：2010-02-16

申请号：US11028553

申请日：2005-01-05

申请人： Kyung-Lae Jang ,  Hee-Seok Lee

发明人： Kyung-Lae Jang ,  Hee-Seok Lee

IPC分类号： H01L23/14 ,  H01L23/52 ,  H01L25/07 ,  H01L25/18 ,  H01L25/065 ,  H01L23/48 ,  H01L23/495

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T307/406 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A package circuit board having a reduced package size. The package circuit board may include a semiconductor substrate in place of a printed circuit board. The package circuit board may further include a microelectronic chip mounted on the semiconductor substrate, the microelectronic chip having at least one of active and passive elements formed on the semiconductor substrate semiconductor substrate.

摘要翻译： 具有减小的封装尺寸的封装电路板。 封装电路板可以包括代替印刷电路板的半导体衬底。 封装电路板还可以包括安装在半导体衬底上的微电子芯片，该微电子芯片具有形成在半导体衬底半导体衬底上的有源和无源元件中的至少一个。

公开(公告)号：US20100013066A1

公开(公告)日：2010-01-21

申请号：US12568224

申请日：2009-09-28

申请人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

发明人： Yong-hoon Kim ,  Hee-seok Lee ,  Yun-seok Choi

IPC分类号： H01L23/60 ,  H01L23/52

CPC分类号： H01L23/552 ,  H01L23/60 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/16 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip.

摘要翻译： 半导体封装包括主衬底，具有第一侧和第二侧的半导体芯片，设置在主衬底上并与主衬底电连接的半导体芯片的第一侧和形成在主衬底的第二侧上的导电网络 半导体芯片。

公开(公告)号：US07489035B2

公开(公告)日：2009-02-10

申请号：US11258672

申请日：2005-10-25

申请人： Eun-Seok Song ,  Hee-Seok Lee

发明人： Eun-Seok Song ,  Hee-Seok Lee

IPC分类号： H01L23/34

CPC分类号： H01L24/49 ,  H01L23/3128 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/4554

摘要： A semiconductor package features a ring-shaped silicon decoupling capacitor that reduces simultaneous switching noise. The decoupling capacitor is fabricated on a substrate from silicon using a wafer fabrication process and takes the form of an annular capacitive structure that extends around a periphery of a substrate-mounted integrated circuit (IC). The decoupling capacitor has a reduced thickness on or below a chip level and takes the place of a conventional power/ground ring. Therefore, the decoupling capacitor can be disposed within the package without increasing the thickness and the size of the package. The decoupling capacitor may be coupled to various power pins, allowing optimum wire bonding, shortened electrical connections, and reduced inductance. Bonding wires connected to the decoupling capacitor have higher specific resistance, lowering the peak of the resonance frequency and thereby reducing simultaneous switching noise.

摘要翻译： 半导体封装具有环形硅去耦电容器，可减少同时开关噪声。 去耦电容器使用晶片制造工艺从硅制造在衬底上，并且采用围绕衬底安装的集成电路（IC）的周边延伸的环形电容结构的形式。 去耦电容器在芯片级别或以下具有减小的厚度，并代替常规的电源/接地环。 因此，去耦电容器可以设置在封装内而不增加封装的厚度和尺寸。 去耦电容器可以耦合到各种电源引脚，允许最佳的引线键合，缩短的电连接和减小的电感。 连接到去耦电容器的接合线具有较高的电阻率，降低谐振频率的峰值，从而降低同时开关噪声。