公开(公告)号：US06680540B2

公开(公告)日：2004-01-20

申请号：US09799533

申请日：2001-03-07

申请人： Hiroshi Nakano ,  Takeyuki Itabashi ,  Haruo Akahoshi

发明人： Hiroshi Nakano ,  Takeyuki Itabashi ,  Haruo Akahoshi

IPC分类号： H01L2348

CPC分类号： H01L21/76849 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76807 ,  H01L21/76811 ,  H01L21/76829 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76864 ,  H01L21/76865 ,  H01L21/76874 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of the copper wiring. The wire protective film and/or barrier film is formed with a cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron.

摘要翻译： 为了防止由于铜布线的氧化和铜的扩散引起的电阻上升，提供了一种半导体器件，其包含覆盖在绝缘膜上形成的铜布线2的顶部的导线保护膜1和围绕该绝缘膜的阻挡膜 侧面和底部的铜线。 线保护膜和/或阻挡膜由含有（1）钴，（2）铬，钼，钨，铼，铊和磷中的至少一种的钴合金膜和（3）硼形成。

公开(公告)号：US06300244B1

公开(公告)日：2001-10-09

申请号：US09317955

申请日：1999-05-25

申请人： Takeyuki Itabashi ,  Toshio Haba ,  Haruo Akahoshi

发明人： Takeyuki Itabashi ,  Toshio Haba ,  Haruo Akahoshi

IPC分类号： H01L2124

CPC分类号： C23C18/54 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/53238 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45147 ,  H01L2924/00012

摘要： When a wiring conductor is formed on a semiconductor substrate, a via-hole or a trench is formed by directly performing electroless plating on a barrier layer containing a very small depressed portion such as the via-hole or the trench in an insulator layer without using a dry metallized method or a substitutive plating method. The semiconductor device is provided with an insulator layer having a via-stud on a semiconductor substrate, the via-stud being formed in a via-hole through a barrier layer formed of an inorganic compound layer or a high melting point metal layer formed on an inner surface of the via-hole, the via-stud being made of the same metal as a metal composing the barrier layer. The semiconductor device can be obtained by forming the barrier layer on the inner surface of the via-hole in the semiconductor substrate, then treating the substrate with a treatment solution containing a complex forming agent, immersing the treated substrate into an electroless plating solution, bringing a member made of the same metal as a metal formed by the electroless plating in contact with the electroless plating solution, and electrically connecting the member to the barrier layer to perform electroless plating.

摘要翻译： 当在半导体衬底上形成布线导体时，通过在不使用绝缘体层的情况下，在绝缘体层中直接进行包含诸如通孔或沟槽之类的非常小的凹陷部分的凹陷部分的阻挡层上的无电镀来形成通孔或沟槽 干式金属化方法或替代电镀方法。半导体器件在半导体衬底上设置有具有通孔的绝缘体层，该通孔形成在通孔中，该通孔穿过由无机化合物层形成的阻挡层 或形成在通孔的内表面上的高熔点金属层，所述通孔螺栓由与构成所述阻挡层的金属相同的金属制成。 半导体器件可以通过在半导体衬底的通孔的内表面上形成阻挡层，然后用含有络合物形成剂的处理溶液处理衬底，将处理的衬底浸入化学镀溶液中，从而获得 由与化学镀溶液接触的无电解电镀形成的与金属相同的金属制成的部件，将该部件电连接到阻挡层，进行无电镀。

公开(公告)号：US5712080A

公开(公告)日：1998-01-27

申请号：US801421

申请日：1997-02-18

申请人： Yuichi Satsu ,  Haruo Akahoshi ,  Mineo Kawamoto ,  Akio Takahashi ,  Masashi Miyazaki ,  Toshiaki Ishimaru

发明人： Yuichi Satsu ,  Haruo Akahoshi ,  Mineo Kawamoto ,  Akio Takahashi ,  Masashi Miyazaki ,  Toshiaki Ishimaru

IPC分类号： G03F7/004 ,  G03F7/038 ,  G03F7/085 ,  H05K3/00 ,  H05K3/06 ,  H05K3/10 ,  H05K3/18 ,  H05K3/38

CPC分类号： G03F7/085 ,  H05K3/108 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2203/1105 ,  H05K2203/124 ,  H05K3/0076 ,  H05K3/062 ,  H05K3/384 ,  Y10S430/155

摘要： A method for manufacturing printed circuit board by forming wiring pattern by chemical metal plating using a negative pattern made of a photosensitive resin composition layer as the plating resist, wherein the photosensitive resin comprises at least a linear high polymer composed of repeating units expressed by the following general formula (1); ##STR1## where, R.sub.1 is H, an alkyl group having 1-9 carbon atoms, an alkoxy group having 1-9 carbon atoms, and a carboxyalkyl group having 1-9 carbon atoms, R.sub.2 is an alkylene group having 1-9 carbon atoms, and n is the polymerized number of the repeating unit, and an organic compound expressed by the following general formula (2); ##STR2## where, R.sub.3 is H or an alkyl group having 1-6 carbon atoms, X is NH or S, and Z is N or C--Y, where Y is H, NH.sub.2, or SH.

摘要翻译： 一种印刷电路板的制造方法，其特征在于，使用由感光性树脂组合物层构成的负极图案，通过化学金属电镀形成配线图案作为电镀抗蚀剂，其特征在于，所述感光性树脂至少含有由以下所示的重复单元构成的直链状高分子 通式（1）; 具有1-9个碳原子的烷氧基，具有1-9个碳原子的羧基烷基，R2是具有1-9个碳原子的亚烷基，n是重复单元的聚合数 和由以下通式（2）表示的有机化合物。 （2）其中，R3为H或具有1-6个碳原子的烷基，X为NH或S，Z为N或C-Y，其中Y为H，NH2或SH。

公开(公告)号：US5438751A

公开(公告)日：1995-08-08

申请号：US112337

申请日：1993-08-27

申请人： Masashi Miyazaki ,  Haruo Akahoshi ,  Shozo Nohara ,  Kenzi Kikuta ,  Toshiaki Ishimaru

发明人： Masashi Miyazaki ,  Haruo Akahoshi ,  Shozo Nohara ,  Kenzi Kikuta ,  Toshiaki Ishimaru

IPC分类号： G03F7/033 ,  G03F7/30 ,  G03F7/32 ,  H05K3/00 ,  H05K3/10 ,  H05K3/18 ,  H05K3/06

CPC分类号： G03F7/322 ,  G03F7/033 ,  G03F7/30 ,  H05K3/108 ,  H05K3/184 ,  H05K2203/0783 ,  H05K2203/0793 ,  H05K3/0076 ,  Y10T29/49126 ,  Y10T29/49156

摘要： In an additive process for producing printed wiring boards, by using a developer comprising a chlorine-free organic solvent and an alkaline aqueous solution and as a resist material a copolymer of methacrylic acid and methyl methacrylate or the like, the production steps are simplified even if a substrate having a large area is used, and abolishment of chlorine-containing organic solvent as a developer becomes possible.

摘要翻译： 在制造印刷电路板的添加方法中，通过使用包含无氯有机溶剂和碱性水溶液的显影剂和作为抗蚀剂材料的甲基丙烯酸和甲基丙烯酸甲酯等的共聚物，即使制备步骤也简化 使用面积大的基板，可以取消含氯有机溶剂作为显影剂。

公开(公告)号：US08741380B2

公开(公告)日：2014-06-03

申请号：US12859802

申请日：2010-08-20

申请人： Hiroshi Yoshida ,  Haruo Akahoshi ,  Akihiro Miyauchi ,  Masahiko Ogino

发明人： Hiroshi Yoshida ,  Haruo Akahoshi ,  Akihiro Miyauchi ,  Masahiko Ogino

IPC分类号： A61M5/00 ,  A61M5/32

CPC分类号： B29C33/3842 ,  B29C33/424 ,  B81B2203/0361 ,  B81C1/00111 ,  B81C1/00206 ,  B81C99/0085 ,  B81C99/009 ,  B81C2201/034 ,  B82Y10/00 ,  B82Y40/00 ,  C23C18/1608 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1657 ,  C23C18/1689 ,  C23C18/208 ,  C23C18/42 ,  G03F7/0002 ,  H01J1/304 ,  H01J9/025 ,  Y10T428/12389 ,  Y10T428/12993

摘要： A fine metal structure having its surface furnished with microprojections of high strength, high precision and large aspect ratio; and a process for producing the fine metal structure free of defects. There is provided a fine metal structure having its surface furnished with microprojections, characterized in that the microprojections have a minimum thickness or minimum diameter ranging from 10 nanometers to 10 micrometers and that the ratio between minimum thickness or minimum diameter (D) of microprojections and height of microprojections (H), H/D, is greater than 1. There is further provided a process for producing a fine metal structure, characterized by comprising providing a substrate having a fine rugged pattern on its surface, applying a molecular electroless plating catalyst to the surface, thereafter carrying out electroless plating to thereby form a metal layer having the rugged pattern filled, and detaching the metal layer from the substrate to thereby obtain a fine metal structure furnished with a surface having undergone reversal transfer of the above rugged pattern.

摘要翻译： 精细的金属结构，其表面具有高强度，高精度和大纵横比的微喷射体; 以及没有缺陷的金属微细结构的制造方法。 提供了具有微喷射体的表面的细金属结构，其特征在于，微喷射体具有10纳米至10微米的最小厚度或最小直径，并且微喷射体的最小厚度或最小直径（D）与高度 的微喷射体（H）H / D大于1.还提供了一种制造精细金属结构的方法，其特征在于，在其表面上提供具有细凹凸图案的基板，将分子无电镀催化剂 然后进行无电解电镀，从而形成具有凹凸图案的金属层，并将金属层与基板分离，从而获得配备有经过上述凹凸图案的反转传送的表面的精细金属结构。

公开(公告)号：US08022431B2

公开(公告)日：2011-09-20

申请号：US11265258

申请日：2005-11-03

申请人： Hiroki Kaneko ,  Ikuo Hiyama ,  Toshiaki Tanaka ,  Masaya Adachi ,  Tsunenori Yamamoto ,  Haruo Akahoshi

发明人： Hiroki Kaneko ,  Ikuo Hiyama ,  Toshiaki Tanaka ,  Masaya Adachi ,  Tsunenori Yamamoto ,  Haruo Akahoshi

IPC分类号： H01L33/00

CPC分类号： G02F1/133603 ,  G02F2001/133612 ,  H01L25/0753 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： An illuminating apparatus has a reduced number of mounting spots by soldering or the like to permit an increased yield rate and a reduced cost. The illuminating apparatus has light emitting diodes, lead frames, and a transparent sealer. N light emitting diodes, N sets of lead frames mounted with the N light emitting diodes, and one set or more of lead frames each not mounted with a light emitting diode are sealed by the transparent sealer for integration into a modular illuminating apparatus. Also provided are a method for fabricating the illuminating apparatus, and a display apparatus using the illuminating apparatus.

摘要翻译： 照明装置通过焊接等减少安装点的数量以允许提高的产量和降低的成本。 照明装置具有发光二极管，引线框架和透明的封口机。 N个发光二极管，安装有N个发光二极管的N组引线框和每个未安装有发光二极管的一个或多个引线框被透明封口机密封，用于集成到模块化照明装置中。 还提供了用于制造照明装置的方法和使用该照明装置的显示装置。

公开(公告)号：US20110114368A1

公开(公告)日：2011-05-19

申请号：US13001848

申请日：2009-06-25

申请人： Hiroshi Nakano ,  Hitoshi Suzuki ,  Toshio Haba ,  Haruo Akahoshi

发明人： Hiroshi Nakano ,  Hitoshi Suzuki ,  Toshio Haba ,  Haruo Akahoshi

IPC分类号： H05K1/02 ,  H05K3/10

CPC分类号： H05K3/045 ,  H05K1/0284 ,  H05K3/107 ,  H05K3/241 ,  H05K2201/09018 ,  H05K2201/09118 ,  H05K2203/0723 ,  Y10T29/49155

摘要： A small-sized electronic circuit component comprising micro-wiring and a method for manufacturing the same are provided. The electronic circuit component is manufactured by a manufacturing method comprising the steps of forming a recessed portion which is to be a three-dimensional wiring in the surface of an insulating base material of the electronic circuit component comprising the wiring, forming a first metal layer which is to be an electroplated conductive layer on the surface of the insulating base material including the recessed portion, selectively forming a second metal layer which is to be the wiring only in the recessed portion which is to be the wiring, and removing the first metal layer formed on the surface other than in the recessed portion which is to be the wiring.

摘要翻译： 提供一种包括微型布线的小尺寸电子电路元件及其制造方法。 电子电路部件通过以下的制造方法制造，该方法包括以下步骤：在包括布线的电子电路部件的绝缘基材的表面中形成作为三维布线的凹部，形成第一金属层， 在包括凹部的绝缘基材的表面上形成电镀导电层，在作为布线的凹部中选择形成作为布线的第二金属层，除去第一金属层 形成在除了作为布线的凹部中的表面上。

公开(公告)号：US20090084684A1

公开(公告)日：2009-04-02

申请号：US12222995

申请日：2008-08-21

申请人： Toshinori Kawamura ,  Haruo Akahoshi ,  Kunio Arai

发明人： Toshinori Kawamura ,  Haruo Akahoshi ,  Kunio Arai

IPC分类号： H05K3/07

CPC分类号： H05K3/07 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K2201/0112 ,  H05K2203/0315 ,  H05K2203/0346

摘要： There is provided a method for manufacturing a printed wiring board that allows molten scattered Cu and an overhang to be selectively removed while scarcely decreasing a thickness of wires, and an electrolytic etching solution suitably used in the method. In the method for manufacturing a printed wiring board in which a via that reaches from a surface copper layer to an inner-layer copper layer of a multilayer board in which copper layers and insulating layers are alternately layered is machined by means of a laser, a process of machining the via including steps of forming a laser absorbing layer on a surface of a copper layer disposed on the surface of the multilayer board, irradiating the laser, performing an electrolytic etching and removing the laser absorbing layer is carried out in this order.

摘要翻译： 提供了一种制造印刷线路板的方法，其允许选择性地去除熔融散射的Cu和悬空，同时几乎不减少线的厚度，以及在该方法中适当使用的电解蚀刻溶液。 在其中通过激光加工其中铜层和绝缘层交替层叠的从表面铜层到达多层板的内层铜层的通孔的印刷线路板的制造方法中， 在通过包括在多层板的表面设置的铜层的表面上形成激光吸收层的步骤，照射激光，进行电解蚀刻和去除激光吸收层的步骤是按顺序进行的。

公开(公告)号：US20090057156A1

公开(公告)日：2009-03-05

申请号：US12190610

申请日：2008-08-13

申请人： Toshio Haba ,  Haruo Akahoshi ,  Hitoshi Suzuki ,  Akira Chinda

发明人： Toshio Haba ,  Haruo Akahoshi ,  Hitoshi Suzuki ,  Akira Chinda

IPC分类号： C25D5/02

CPC分类号： H05K3/423 ,  C23C18/1608 ,  C23C18/1653 ,  C23C18/1806 ,  C23C18/1844 ,  C23C18/22 ,  C23C18/31 ,  C25D3/02 ,  C25D3/38 ,  C25D5/02 ,  C25D5/04 ,  C25D5/18 ,  C25D7/123 ,  H05K3/107

摘要： It is an object of the present invention to alleviate a work for removing an unnecessary metal layer when wiring and vias are formed on a substrate by electroplating.An additive is added to a plating solution to be used for electroplating. The additive has a plating reaction suppressing capability, but has a characteristic that the plating reaction suppressing capability is reduced as the plating reaction progresses. The additive has a capability for increasing a metal deposition overpotential and has a characteristic that the metal deposition overpotential is reduced as the reaction progresses. As a result, the metal can be deposited selectively in a trench and a via formed on the substrate. When a wiring and a via are formed on the substrate, the trench and the via having a predetermined surface roughness are formed on the substrate.

摘要翻译： 本发明的目的是减轻当通过电镀在基板上形成布线和通孔时去除不需要的金属层的工作。 向用于电镀的电镀液中加入添加剂。 添加剂具有电镀反应抑制能力，但具有电镀反应抑制能力随镀层反应进行而降低的特征。 该添加剂具有增加金属沉积超电位的能力，并且具有随反应进行而使金属沉积超电势降低的特征。 结果，金属可以选择性地沉积在形成在衬底上的沟槽和通孔中。 当在衬底上形成布线和通孔时，在衬底上形成具有预定表面粗糙度的沟槽和通孔。

公开(公告)号：US20080251387A1

公开(公告)日：2008-10-16

申请号：US12137582

申请日：2008-06-12

申请人： Toshio Haba ,  Hiroshi Yoshida ,  Haruo Akahoshi ,  Hitoshi Suzuki ,  Akira Chinda

发明人： Toshio Haba ,  Hiroshi Yoshida ,  Haruo Akahoshi ,  Hitoshi Suzuki ,  Akira Chinda

IPC分类号： C25D5/02 ,  C25D7/00

CPC分类号： H05K3/241 ,  H01L21/4846 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/108 ,  H05K3/382 ,  H05K3/388 ,  H01L2924/00

摘要： It is an object of the present invention to provide a wiring board having high-density wiring with a controlled shape without masking by a resist film and a production method thereof. In the present invention, the production method of a wiring board having copper wiring on an insulating substrate includes the steps of forming a metal seed layer on the insulating substrate, the metal seed layer having a roughened shape in a portion on which the copper wiring or a bump is to be formed, and forming an electroplated film of copper or an alloy of copper through electroplating on the portion of the metal seed layer having the roughened shape. A substance for suppressing the plating reaction is added to a plating bath to provide an angle of 90 degrees or smaller between a surface of the insulating substrate and a side of the electroplated film.

摘要翻译： 本发明的目的是提供一种具有受控形状的高密度布线而不用抗蚀剂膜掩蔽的布线板及其制造方法。 在本发明中，在绝缘基板上具有铜布线的布线基板的制造方法包括以下步骤：在绝缘基板上形成金属籽晶层，金属种子层的粗糙化部分在铜布线或 形成凸起，并且通过电镀在具有粗糙形状的金属种子层的部分上形成铜或铜的合金的电镀膜。 在镀浴中加入抑制电镀反应的物质，在绝缘性基材的表面与电镀膜的一侧之间形成90度以下的角度。