公开(公告)号：US20120267778A1

公开(公告)日：2012-10-25

申请号：US13357046

申请日：2012-01-24

申请人： Hiroshi Asami

发明人： Hiroshi Asami

IPC分类号： H05K1/09 ,  H05K3/22 ,  H01L21/50 ,  H01L23/498 ,  H01L21/768

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/00013 ,  H01L2924/12042 ,  H05K1/111 ,  H05K3/28 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/099 ,  H05K2203/0315 ,  H05K2203/043 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00

摘要： A circuit board includes: an electrode portion which has a copper layer, a copper oxide layer formed thereon, and a removal portion formed by partially removing the copper oxide layer so as to partially expose the copper layer from the copper oxide layer; and a solder bump for flip chip mounting formed on the copper layer exposed by the removal portion.

摘要翻译： 电路板包括：具有铜层，形成在其上的氧化铜层的电极部分和通过部分去除氧化铜层而形成的去除部分，以从铜氧化物层部分地露出铜层; 以及在由去除部分露出的铜层上形成的用于倒装芯片安装的焊料凸块。

公开(公告)号：US08146243B2

公开(公告)日：2012-04-03

申请号：US12435185

申请日：2009-05-04

申请人： Hiroshi Asami ,  Ken Orui ,  Hidetoshi Kusano ,  Fumito Hiwatashi

发明人： Hiroshi Asami ,  Ken Orui ,  Hidetoshi Kusano ,  Fumito Hiwatashi

IPC分类号： H05K3/20 ,  H05K3/34 ,  H05K3/46

CPC分类号： H05K1/187 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/13 ,  H01L24/24 ,  H01L24/81 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/24227 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3511 ,  H05K3/205 ,  H05K3/386 ,  H05K3/4614 ,  H05K3/4617 ,  H05K2201/0394 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of manufacturing a device-incorporated substrate as well as a printed circuit board. A transfer sheet is formed having a structure that includes two layers, a metal base material and a dissolvee metal layer and a conductor pattern is formed on the dissolvee metal layer by electroplating. After the transfer sheet on which the conductor pattern is formed is adhered onto an insulating base material, the transfer sheet is removed by separating the metal base material from the dissolvee metal layer and thereafter selectively dissolving and removing the dissolvee metal layer with respect to the conductor pattern.

摘要翻译： 一种制造装置的衬底以及印刷电路板的方法。 形成具有包括两层的结构的转印片，金属基材和溶解金属层，并且通过电镀在溶解金属层上形成导体图案。 在其上形成有导体图案的转印片粘附到绝缘基材上之后，通过将金属基材与溶解金属层分离，然后相对于导体选择性地溶解和除去溶解金属层来去除转印片 模式。

公开(公告)号：US20100122838A1

公开(公告)日：2010-05-20

申请号：US12620216

申请日：2009-11-17

申请人： Hiroshi Asami ,  Osamu Yamagata

发明人： Hiroshi Asami ,  Osamu Yamagata

IPC分类号： H05K1/00 ,  H05K1/03

CPC分类号： H05K1/0203 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5383 ,  H01L23/5384 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/16195 ,  H01L2924/19105 ,  H05K1/117 ,  H05K2201/066 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2201/10371 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A mount board includes a laminated wiring section including a plurality of wiring layers formed on a surface of a substrate in a laminated manner, wherein a portion of an inner wiring layer is exposed to the outside, the inner wiring layer being any of the plurality of wiring layers excluding an uppermost wiring layer.

摘要翻译： 一种安装板包括层叠布线部分，其包括以层叠的方式形成在基板的表面上的多个布线层，其中内部布线层的一部分暴露于外部，内部布线层是多个 不包括最上面布线层的布线层。

公开(公告)号：US20090200629A1

公开(公告)日：2009-08-13

申请号：US12364072

申请日：2009-02-02

申请人： Hiroshi Asami ,  Yoshihiro Nabe ,  Akihiro Morimoto

发明人： Hiroshi Asami ,  Yoshihiro Nabe ,  Akihiro Morimoto

IPC分类号： H01L31/0203 ,  H01L21/50 ,  H01L27/146

CPC分类号： H01L27/14687 ,  H01L24/48 ,  H01L27/14618 ,  H01L31/0203 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2224/48091 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A semiconductor device which includes a semiconductor chip formed with a light-reception area, a spacer, and a transparent substrate. The spacer is bonded to the semiconductor chip via a first adhesive and surrounding the light-reception area. The transparent substrate is bonded to the spacer via a second adhesive and disposed above the light-reception area. A first projection having a predetermined height is formed on a surface of the spacer which is on a side of the semiconductor chip, and the first projection abuts on the semiconductor chip.

摘要翻译： 一种半导体器件，包括形成有光接收区域的半导体芯片，间隔物和透明基板。 间隔物通过第一粘合剂结合到半导体芯片并且围绕光接收区域。 透明基板通过第二粘合剂粘合到间隔件上并设置在光接收区域的上方。 具有预定高度的第一突起形成在半导体芯片一侧的间隔物的表面上，第一突起抵接在半导体芯片上。

公开(公告)号：US20070293038A1

公开(公告)日：2007-12-20

申请号：US11890892

申请日：2007-08-08

申请人： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

发明人： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

IPC分类号： H01L21/4763

CPC分类号： H05K3/4694 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4617 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/09536 ,  H05K2201/09881 ,  H05K2201/09972 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

公开(公告)号：US20070290343A1

公开(公告)日：2007-12-20

申请号：US11810070

申请日：2007-06-04

申请人： Yoshimichi Harada ,  Akiyoshi Aoyagi ,  Hiroshi Asami

发明人： Yoshimichi Harada ,  Akiyoshi Aoyagi ,  Hiroshi Asami

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/12 ,  H01L2224/02126 ,  H01L2224/02255 ,  H01L2224/03019 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/0555 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Herein disclosed an electronic component having a passivation layer in which an opening that exposes a part of a pad electrode is formed, an underlying metal layer formed on the pad electrode and the passivation layer, and a barrier metal layer formed on the underlying metal layer for an external connection electrode, the electronic component including a recess or/and a projection configured to be provided under the barrier metal layer outside or/and inside the opening, the underlying metal layer being formed on the recess or/and the projection and having a surface shape that follows the recess or/and the projection.

摘要翻译： 这里公开了一种具有钝化层的电子部件，其中形成有露出焊盘电极的一部分的开口，形成在焊盘电极和钝化层上的下面的金属层以及形成在下面的金属层上的阻挡金属层 外部连接电极，所述电子部件包括凹部或/和突出部，所述突起构造成设置在所述阻挡金属层的下方或/或所述开口内侧，所述下部金属层形成在所述凹部或/和所述突起上，并且具有 跟随凹部或/和突起的表面形状。

公开(公告)号：US06831357B2

公开(公告)日：2004-12-14

申请号：US10397608

申请日：2003-03-26

申请人： Yuji Nishitani ,  Tsuyoshi Ogawa ,  Hiroshi Asami ,  Akihiko Okubora

发明人： Yuji Nishitani ,  Tsuyoshi Ogawa ,  Hiroshi Asami ,  Akihiko Okubora

IPC分类号： H01L2348

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/19041 ,  H05K3/0052 ,  H05K3/20 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/467 ,  H05K3/4682 ,  H05K3/4694 ,  H05K2201/0352 ,  H05K2201/09536 ,  H05K2203/061

摘要： A circuit substrate device composed of a circuit unit 2 and a multi-layer wiring substrate 3 in which a pattern conductor of the circuit unit 2 may be prevented from being warped or inundated. The circuit substrate device includes a circuit unit 2 having a pattern conductor formed by a thin film technique, and an insulating layer, and a multi-layer wiring substrate 3 having a connecting terminal portion 14 exposed from its major surface. The circuit unit is formed on a dummy substrate. The circuit unit is connected to the multi-layer wiring substrate 3 so that the pattern conductor is connected to the connecting terminal portion 14. The dummy substrate is then removed to give a structure comprised of the circuit unit 2 formed on the multi-layer wiring substrate 3. The pattern conductor of the circuit unit 2 is freed of warping or inundations along the direction of thickness of the circuit unit 2.

公开(公告)号：US06210610B1

公开(公告)日：2001-04-03

申请号：US09101945

申请日：1998-07-17

申请人： Kiyohiro Saito ,  Hiroshi Asami

发明人： Kiyohiro Saito ,  Hiroshi Asami

IPC分类号： B29D1100

CPC分类号： B29C45/2708 ,  B29C45/2701 ,  B29C45/2703 ,  B29D11/00413 ,  B29L2011/0016 ,  Y10S425/808

摘要： A gate top member 23 is placed to a gate 22 opened toward the circumferential edge of a molding spectacle-lens cavity 13 formed between inserts 11 and 12. The plural gate top members 23 each having a different height are previously prepared, and attached with a bolt to be exchanged. In pilot production, it is checked for each of various lenses which opening configuration of the gate 22 can form a spectacle lens with defined great-precision by exchanging the gate top member 23 in order to obtain each gate opening configuration changed by exchanging the gate top member 23.

摘要翻译： 门顶构件23被放置到朝向在插入件11和12之间形成的成型眼镜镜腔13的周缘开口的门22上。预先准备了各自具有不同高度的多个门顶构件23， 螺栓要交换。 在先导生产中，通过更换栅极顶部构件23来检查各种透镜中的各个透镜的打开构造可以形成具有确定的高精度的眼镜镜片，以便获得通过更换门顶部而改变的每个开口构造 会员23。

公开(公告)号：US4120759A

公开(公告)日：1978-10-17

申请号：US832907

申请日：1977-09-13

申请人： Hiroshi Asami ,  Masao Kaji

发明人： Hiroshi Asami ,  Masao Kaji

IPC分类号： C25D21/12 ,  C25D1/00 ,  C25C1/20 ,  G05F1/10

CPC分类号： C25D21/12 ,  Y10S204/07

摘要： In the present plating method the bath contains an electrolyte solution having a uniform ion concentration. A common electrode, a plating electrode and a standard electrode are arranged in the bath. A direct current source is connected between the common electrode and the plating electrode. A further, constant, direct current source is connected between the common electrode and the standard electrode. A potentiometer device is arranged for detecting resistance changes between these electrodes due to variations in the ion concentration and in the mobility of the electrolyte solution between the electrodes. A control is responsive to the potentiometer device for regulating the plating current supplied by the direct current source as a function of the potential difference detected by the potentiometer device, whereby a constant plating current density is achieved.

摘要翻译： 在本电镀方法中，浴含有具有均匀离子浓度的电解液。 浴中配置有公共电极，电镀电极和标准电极。 在公共电极和电镀电极之间连接有直流电源。 在公共电极和标准电极之间连接另外恒定的直流电源。 布置电位器装置，用于检测电极之间的电离变化，这是由于离子浓度的变化和电极间的电解质溶液的迁移率。 控制器响应于电位器装置，用于调节由直流电源提供的电镀电流作为由电位计装置检测的电位差的函数，从而实现恒定的电镀电流密度。

公开(公告)号：US3965913A

公开(公告)日：1976-06-29

申请号：US440659

申请日：1974-02-08

申请人： Katsuyuki Tokura ,  Shuichi Maeda ,  Takeshi Endo ,  Kenji Yoichizono ,  Hiroshi Asami

发明人： Katsuyuki Tokura ,  Shuichi Maeda ,  Takeshi Endo ,  Kenji Yoichizono ,  Hiroshi Asami

IPC分类号： G07D1/00 ,  G07D11/00 ,  B65H29/14

CPC分类号： G07D11/0018 ,  G07D11/0039

摘要： A cash dispensing system capable of automatically counting and dispensing cash of the amount requested by a customer to be withdrawn is disclosed. Where an error occurs in a cash dispensing process, cash dispensing is stopped and the cash dispensing operation is repeated from the beginning. Where the error occurs a predetermined number of times, the cash dispensing operation is entirely stopped.

摘要翻译： 公开了一种能够自动计数和分配由客户要求提取的金额的现金分配系统。 如果现金分配过程发生错误，则停止现金分发，并从头开始重复现金分发操作。 在发生错误预定次数的情况下，完全停止现金分发操作。