公开(公告)号：US07526152B2

公开(公告)日：2009-04-28

申请号：US11964761

申请日：2007-12-27

Applicant: Motoo Asai ,  Hiroaki Kodama

Inventor： Motoo Asai ,  Hiroaki Kodama

IPC: G02B6/14

CPC classification number: G02B6/4204 ,  G02B6/4214 ,  G02B6/4232 ,  G02B6/43 ,  H01L31/0203 ,  H01L31/02327 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H05K1/0274 ,  H05K3/4602 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: The present invention aims to provide a substrate for mounting an IC chip, on which an optical signal passing region is formed and which can suppress a transmission loss in an optical signal and transmit an optical signal more positively with high reliability. The substrate for mounting an IC chip according to the present invention is a substrate for mounting an IC chip, in which a conductor circuit and an insulating layer are laminated in alternate fashion and in repetition on both faces of a substrate and an optical element is mounted on the substrate. Herein, the substrate for mounting an IC chip includes an optical signal passing region, and a microlens arranged on an end portion of the optical signal passing region on the opposite side from the optical element.

Abstract translation: 本发明的目的在于提供一种用于安装IC芯片的基板，其上形成有光信号通过区域，并且可以抑制光信号中的传输损耗并且以高可靠性更积极地发送光信号。 根据本发明的用于安装IC芯片的基板是用于安装IC芯片的基板，其中导体电路和绝缘层在基板的两个表面上以交替的方式并且重复地层叠并且安装有光学元件 在基板上。 这里，用于安装IC芯片的基板包括光信号通过区域和布置在与光学元件相反侧的光信号通过区域的端部上的微透镜。

公开(公告)号：US20080292852A1

公开(公告)日：2008-11-27

申请号：US12146212

申请日：2008-06-25

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: B32B15/08

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.

公开(公告)号：US20080169120A1

公开(公告)日：2008-07-17

申请号：US11778139

申请日：2007-07-16

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/03

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract translation: 片状电容器20设置在印刷电路板10的芯基板30中。 这使得可以缩短IC芯片90和芯片电容器20之间的距离并减小环路电感。 由于通过以多层方式设置第一树脂基板30a，第二树脂基板30b和第三树脂基板30c构成的芯基板30d，因此芯基板30可以获得足够的强度。

公开(公告)号：US20080158841A1

公开(公告)日：2008-07-03

申请号：US12034504

申请日：2008-02-20

Applicant: Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K7/02

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract translation: 片状电容器20设置在印刷电路板10中。 以这种方式，IC芯片90和每个片状电容器20之间的距离缩短，并且环路电感减小。 此外，芯片电容器20被容纳在具有大厚​​度的芯基板30中。 因此，印刷电路板的厚度不会变大。

公开(公告)号：US20080158838A1

公开(公告)日：2008-07-03

申请号：US12034517

申请日：2008-02-20

Applicant: Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/18

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

公开(公告)号：US07375289B2

公开(公告)日：2008-05-20

申请号：US11331268

申请日：2006-01-13

Applicant: Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

Inventor： Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/4679 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/0082 ,  H05K3/421 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/0554 ,  Y10S430/146 ,  Y10T29/49004 ,  Y10T29/49082 ,  Y10T29/49085 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A multi-layer printed wiring board includes a board covered with a conductor layer, an interlayer insulating resin layer, an etched metal film on the interlayer insulating resin layer, and a via hole. The interlayer insulating resin layer has a fibrous substrate. The via hole has an electrolytic plated film and an electrolessly plated film and connects the conductor layer of the board and the etched metal film.

Abstract translation: 多层印刷电路板包括覆盖有导体层的基板，层间绝缘树脂层，层间绝缘树脂层上的蚀刻金属膜和通孔。 层间绝缘树脂层具有纤维基材。 通孔具有电解电镀膜和无电镀膜，并且连接板的导体层和蚀刻的金属膜。

公开(公告)号：US20080041615A1

公开(公告)日：2008-02-21

申请号：US11838365

申请日：2007-08-14

Applicant: Hui ZHONG ,  Kenichi Shimada ,  Yukihiko Toyoda ,  Motoo Asai ,  Dongdong Wang ,  Koji Sekine ,  Yoshitaka Ono

Inventor： Hui ZHONG ,  Kenichi Shimada ,  Yukihiko Toyoda ,  Motoo Asai ,  Dongdong Wang ,  Koji Sekine ,  Yoshitaka Ono

IPC: H05K1/03

CPC classification number: H05K3/285 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/4602

Abstract: The present invention is to provide a multilayered printed circuit board free from cracks attributed to thermal expansion difference between a solder resist layer and another part and a multilayered printed circuit board of the present invention comprises a conductor circuit and a resin insulating layer serially formed on a substrate in an alternate fashion and in repetition and a solder resist layer formed as an outermost layer, and the solder resist layer contains an inorganic filler.

Abstract translation: 本发明是提供一种不存在由于阻焊层与另一部分之间的热膨胀差异而引起的裂纹的多层印刷电路板和本发明的多层印刷电路板，其特征在于，包括：导体电路和串联形成在所述多层印刷电路板上的树脂绝缘层 基板以重复的方式和形成为最外层的阻焊层，并且阻焊层包含无机填料。

公开(公告)号：US07307852B2

公开(公告)日：2007-12-11

申请号：US11062672

申请日：2005-02-23

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract translation: 片状电容器20设置在印刷电路板10中。 以这种方式，IC芯片90和每个片状电容器20之间的距离缩短，并且环路电感减小。 此外，芯片电容器20被容纳在具有大厚​​度的芯基板30中。 因此，印刷电路板的厚度不会变大。

公开(公告)号：US20070056767A1

公开(公告)日：2007-03-15

申请号：US11522999

申请日：2006-09-19

Applicant: Motoo Asai

Inventor： Motoo Asai

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/108 ,  H05K1/0269 ,  H05K3/067 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4661 ,  H05K2201/0989 ,  H05K2201/09918 ,  H05K2203/0307 ,  H05K2203/072 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T156/1056 ,  Y10T428/24917

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

Abstract translation: 印刷电路板是通过在基板的导体电路上层叠层间绝缘层而形成的，其中导体电路由无电解电镀膜和电解电镀膜构成，并且在至少一部分上形成有粗糙层 导体电路的表面。

公开(公告)号：US20060012967A1

公开(公告)日：2006-01-19

申请号：US10509899

申请日：2003-03-28

Applicant: Motoo Asai ,  Hiroaki Kodama ,  Toyoaki Tanaka

Inventor： Motoo Asai ,  Hiroaki Kodama ,  Toyoaki Tanaka

IPC: H05K1/18

CPC classification number: G02B6/43 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/01322 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H05K1/0274 ,  H05K3/28 ,  H05K3/4602 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An object of the present invention is to provide a substrate for mounting an IC chip which is a component for optical communication having an IC chip and an optical component integrally provided thereon, which can ensure a short distance between the IC chip and the optical component, which is excellent in electric signal transmission reliability and which can transmit optical signal through an optical path for transmitting optical signal. The substrate for mounting an IC chip of the present invention is a substrate for mounting an IC chip comprising: a substrate and, as serially built up on both faces thereof, a conductor circuit and an interlaminar insulating layer in an alternate fashion and in repetition; a solder resist layer formed as an outermost layer; and an optical element mounted thereto, wherein an optical path for transmitting optical signal, which penetrates the substrate for mounting an IC chip, is disposed.

Abstract translation: 本发明的目的是提供一种用于安装IC芯片的基板，IC芯片是用于光通信的部件，其具有一体地设置在其上的IC芯片和光学部件，其可以确保IC芯片和光学部件之间的短距离， 其电信号传输可靠性优异，可以通过用于发送光信号的光路传输光信号。 用于安装本发明的IC芯片的基板是用于安装IC芯片的基板，其包括：基板，并且在其两个表面上串联构成导体电路和层间绝缘层，并且重复; 形成为最外层的阻焊层; 以及安装在其上的光学元件，其中设置用于透射光信号的光路，其穿透用于安装IC芯片的基板。