公开(公告)号：US20060197204A1

公开(公告)日：2006-09-07

申请号：US11404135

申请日：2006-04-14

申请人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

发明人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

IPC分类号： H01L23/02

CPC分类号： H01L21/563 ,  H01L25/0655 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

摘要： In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.

公开(公告)号：US07057278B2

公开(公告)日：2006-06-06

申请号：US10741637

申请日：2003-12-18

申请人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

发明人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

IPC分类号： H01L23/34

CPC分类号： H01L21/563 ,  H01L25/0655 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

摘要： In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.

公开(公告)号：US06911733B2

公开(公告)日：2005-06-28

申请号：US10372898

申请日：2003-02-26

申请人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

发明人： Hiroshi Kikuchi ,  Norio Nakazato ,  Hideko Ando ,  Takashi Suga ,  Satoru Isomura ,  Takashi Kubo ,  Hiroyasu Sasaki ,  Masanori Fukuhara ,  Naotaka Tanaka ,  Fujiaki Nose

IPC分类号： H01L23/66 ,  H05K1/02 ,  H05K3/36 ,  H01L23/34

CPC分类号： H05K1/0243 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1903 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K3/361 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10659 ,  H05K2201/10681 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/00

摘要： A high-frequency signal from a tape-shaped line section having a surface layer signal lead and surface layer GND lead disposed on both sides thereof is directly inputted to a semiconductor chip via a signal surface layer wiring of a package substrate and through solder bump electrodes. Alternatively, a high-frequency signal from the semiconductor chip is outputted to the outside via the tape-shaped line section in reverse. Owing to the transmission of the high-frequency signal by only a microstrip line at the whole surface layer of the package substrate, the high-frequency signal can be transmitted by only the microstrip line at the surface layer without through vias or the like. Accordingly, the high-frequency signal can be transmitted without a loss in frequency characteristic, and a high-quality high-frequency signal can be transmitted with a reduction in loss at high-frequency transmission.

摘要翻译： 来自具有布置在其两侧的表面层信号引线和表面层GND引线的带状线段的高频信号经由封装衬底的信号表面层布线直接输入到半导体芯片，并通过焊料凸块电极 。 或者，来自半导体芯片的高频信号经由带状线路部分反向输出到外部。 由于仅在封装衬底的整个表面层处的微带线传输高频信号，所以高频信号可以仅通过表层的微带线传输，而不需要通过通孔等。 因此，可以不损失频率特性来发送高频信号，并且可以在高频率传输时以低损耗的方式发送高质量的高频信号。

公开(公告)号：US06800945B2

公开(公告)日：2004-10-05

申请号：US10117845

申请日：2002-04-05

申请人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

发明人： Yasuhiro Naka ,  Naotaka Tanaka ,  Ikuo Yoshida ,  Satoshi Imasu ,  Takahiro Naito

IPC分类号： H01L230602

CPC分类号： H01L23/538 ,  H01L21/563 ,  H01L23/36 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

摘要： In a multi-chip-module type semiconductor device, first and second semiconductor elements, a main component of each of the semiconductor elements being semiconductor material to form a semiconductor electric circuit in each of the semiconductor elements, are mounted on and electrically connected to a substrate adapted to be mounted onto a mother board and to be electrically connected to the mother board so that the each of the semiconductor elements is electrically connected to the mother board through the substrate.

摘要翻译： 在多芯片模块型半导体器件中，第一和第二半导体元件，每个半导体元件的主要部件是半导体材料，用于在每个半导体元件中形成半导体电路，安装在电连接到 衬底，其适于安装在母板上并与母板电连接，使得每个半导体元件通过衬底电连接到母板。

公开(公告)号：US6028364A

公开(公告)日：2000-02-22

申请号：US809233

申请日：1997-03-19

申请人： Masahiko Ogino ,  Akira Nagai ,  Shuji Eguchi ,  Toshiaki Ishii ,  Masanori Segawa ,  Haruo Akahoshi ,  Akio Takahashi ,  Takao Miwa ,  Naotaka Tanaka ,  Ichirou Anjou

发明人： Masahiko Ogino ,  Akira Nagai ,  Shuji Eguchi ,  Toshiaki Ishii ,  Masanori Segawa ,  Haruo Akahoshi ,  Akio Takahashi ,  Takao Miwa ,  Naotaka Tanaka ,  Ichirou Anjou

IPC分类号： H01L23/498 ,  H01L23/48 ,  H01L23/52 ,  H05K1/00 ,  H05K7/20

CPC分类号： H01L23/49827 ,  H01L23/49816 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351

摘要： A semiconductor device has a multi-layered wiring structure having a conductor layer to be electrically connected to a packaging substrate, the structure being provided on a circuit formation surface of a semiconductor chip; and ball-like terminals disposed in a grid array on the surface of the multi-layered wiring structure on the packaging substrate side, wherein the multi-layered wiring structure includes a buffer layer for relieving a thermal stress produced between the semiconductor chip and the packaging substrate, after packaging thereof, and multiple wiring layers. In this semiconductor device, the wiring distance is shorter than that of a conventional semiconductor device, so that an inductance component becomes smaller, to thereby increase the signal speed; the distance between a ground layer and a power supply layer is shortened, to reduce noise produced upon operation, and also a thermal stress upon packaging is relieved by the buffer layer of the multi-layered wiring structure, resulting in the improved connection reliability; and the number of terminals per unit is increased because of elimination of wire bonding.

摘要翻译： PCT No.PCT / JP95 / 00714 Sec。 371日期1997年3月19日 102（e）1997年3月19日PCT提交1995年4月12日PCT公布。 出版物WO96 / 09645 日期：1996年3月28日半导体器件具有多层布线结构，具有与封装基板电连接的导体层，该结构设置在半导体芯片的电路形成面上; 以及设置在所述多层布线结构体的所述封装基板侧的表面上的栅格阵列中的球状端子，其中所述多层布线结构包括用于缓解在所述半导体芯片和所述封装之间产生的热应力的缓冲层 基板，其包装之后，以及多个布线层。 在该半导体装置中，布线距离短于以往的半导体装置，因此电感成分变小，信号速度变高; 接地层和电源层之间的距离缩短，以减少操作时产生的噪声，并且通过多层布线结构的缓冲层减轻了包装上的热应力，从而提高了连接可靠性; 并且由于引线接合的消除，每单元的端子数量增加。

公开(公告)号：US5608265A

公开(公告)日：1997-03-04

申请号：US207697

申请日：1994-03-09

申请人： Makoto Kitano ,  Asao Nishimura ,  Akihiro Yaguchi ,  Nae Yoneda ,  Ryuji Kohno ,  Naotaka Tanaka ,  Tetsuo Kumazawa

发明人： Makoto Kitano ,  Asao Nishimura ,  Akihiro Yaguchi ,  Nae Yoneda ,  Ryuji Kohno ,  Naotaka Tanaka ,  Tetsuo Kumazawa

IPC分类号： H01L21/56 ,  H01L23/12 ,  H01L23/13 ,  H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50 ,  H01L25/10 ,  H01L25/11 ,  H01L25/16 ,  H01L25/18 ,  H05K1/18 ,  H05K3/34 ,  H01L23/48 ,  H01L23/02 ,  H01L29/40

CPC分类号： H01L23/3107 ,  H01L21/565 ,  H01L23/13 ,  H01L23/4951 ,  H01L23/49541 ,  H01L25/105 ,  H01L25/16 ,  H05K1/181 ,  H05K3/3436 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H05K2201/09472 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10818 ,  H05K2201/10931 ,  H05K3/3426 ,  H05K3/3431 ,  Y02P70/611 ,  Y02P70/613

摘要： A semiconductor device, provided in a plastic encapsulated package, having a semiconductor chip, a lead and a member for electrically connecting them together. The semiconductor device has one or more first holes respectively extending from one surface of the package to a first side of the lead which is provided inside of the package, and has one or more second holes formed which are aligned with the first holes, respectively, in a manner such that each second hole is extended from the opposing surface of the package to a corresponding location on a second side of the lead and is aligned with a corresponding, opposing first hole, in the package, extending to the first side of the lead. These holes are provided as a plurality of sets of individual pairs of aligned holes respectively extending inwardly, from opposing surfaces of the package, to opposite sides of the corresponding leads. In the device the leads or the leads with resin act as partitions thereby effecting isolation between the first and second holes of each pair aligned holes.

摘要翻译： 设置在塑料封装封装中的半导体器件具有半导体芯片，引线和用于将它们电连接在一起的部件。 半导体器件具有分别从封装的一个表面延伸到设置在封装内部的引线的第一侧的一个或多个第一孔，并且分别具有与第一孔对准的一个或多个第二孔， 以使得每个第二孔从包装的相对表面延伸到引线的第二侧上的对应位置并且与包装中的相应的相对的第一孔对准，延伸到包装的第一侧 铅。 这些孔被设置为多组对齐的对齐的孔，分别从包装的相对表面向内延伸到相应引线的相对侧。 在装置中，引线或具有树脂的引线作为隔板，从而实现每对对齐的孔的第一和第二孔之间的隔离。

公开(公告)号：US5537884A

公开(公告)日：1996-07-23

申请号：US287593

申请日：1994-08-08

申请人： Asao Nishimura ,  Naotaka Tanaka ,  Isao Hirose

发明人： Asao Nishimura ,  Naotaka Tanaka ,  Isao Hirose

IPC分类号： G01N3/00 ,  G01N3/24 ,  G01N19/04

CPC分类号： G01N3/24 ,  G01N19/04 ,  G01N2203/0066 ,  G01N2203/0091

摘要： A method for measuring an adhesion strength of a resin material which is capable of accurately and readily measuring a universal adhesion strength independent of dimensions and shapes of specimen. A delamination portion is partially formed between a resin and an adherend material. Loads in two different directions are applied to an adhering interface such that opposed shear stresses are generated. As a result, a true adhering strength can be obtained from an apparent delamination propagating strength in each case.

公开(公告)号：US08324736B2

公开(公告)日：2012-12-04

申请号：US13153860

申请日：2011-06-06

申请人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

发明人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC分类号： H01L23/528

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/90 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05553 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.

摘要翻译： 形成从半导体衬底的第二表面到达焊盘的通硅。 贯穿硅通孔中的穿透空间由直径小于第一孔直径的第一孔和第二孔形成。 第一孔由半导体衬底的第二表面到层间绝缘膜的中间形成。 此外，形成从第一孔的底部到达垫的第二孔。 然后，形成在半导体衬底的第一表面上的层间绝缘膜具有反映第一孔的底表面和半导体衬底的第一表面之间的台阶差的台阶形状。 更具体地说，第一孔的底表面和垫之间的层间绝缘膜的厚度小于其它部分的厚度。

公开(公告)号：US20120048332A1

公开(公告)日：2012-03-01

申请号：US13217666

申请日：2011-08-25

申请人： Shigenori Shimizu ,  Hiroyuki Izawa ,  Keisuke Ookubo ,  Shigeaki Funyu ,  Yutaka Okada ,  Keiko Funyu ,  Naotaka Tanaka

发明人： Shigenori Shimizu ,  Hiroyuki Izawa ,  Keisuke Ookubo ,  Shigeaki Funyu ,  Yutaka Okada ,  Keiko Funyu ,  Naotaka Tanaka

IPC分类号： H01L31/05 ,  H01L31/18 ,  C09J133/00 ,  C09J163/02 ,  C09J171/10

CPC分类号： C08L7/00 ,  C08L33/00 ,  C08L71/12 ,  C09J163/00 ,  H01L31/022425 ,  H01L31/0504 ,  Y02E10/50

摘要： There are provided an adhesive film for a solar cell electrode providing a solar cell capable of reducing adverse effects on photovoltaic cells caused by heating or pressure and having sufficient solar cell characteristics, and a method for manufacturing a solar cell module using the same. The adhesive film for a solar cell electrode is an adhesive film used for electrical connection between photovoltaic cell surface electrodes and wiring members, wherein the adhesive film contains a crystalline epoxy resin, a curing agent and a film forming material.

摘要翻译： 提供了一种用于太阳能电池电极的粘合膜，其提供能够减少由加热或压力引起的并且具有足够的太阳能电池特性的对光伏电池的不利影响的太阳能电池，以及使用该太阳能电池的太阳能电池模块的制造方法。 用于太阳能电池电极的粘合膜是用于光伏电池表面电极和布线构件之间的电连接的粘合膜，其中粘合剂膜含有结晶环氧树脂，固化剂和成膜材料。

公开(公告)号：US07973415B2

公开(公告)日：2011-07-05

申请号：US12133828

申请日：2008-06-05

申请人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

发明人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC分类号： H01L29/41

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/90 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05553 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.

摘要翻译： 形成从半导体衬底的第二表面到达焊盘的通硅。 贯穿硅通孔中的穿透空间由直径小于第一孔直径的第一孔和第二孔形成。 第一孔由半导体衬底的第二表面到层间绝缘膜的中间形成。 此外，形成从第一孔的底部到达垫的第二孔。 然后，形成在半导体衬底的第一表面上的层间绝缘膜具有反映第一孔的底表面和半导体衬底的第一表面之间的台阶差的台阶形状。 更具体地说，第一孔的底表面和垫之间的层间绝缘膜的厚度小于其他部分的厚度。