公开(公告)号：US20110052118A1

公开(公告)日：2011-03-03

申请号：US12866180

申请日：2009-01-14

Applicant: Yasunobu Matsuoka

Inventor： Yasunobu Matsuoka

IPC: G02B6/13 ,  G02B6/12 ,  B05D5/06

CPC classification number: G02B6/43 ,  G02B6/12002 ,  G02B6/132 ,  H01L25/167 ,  H01L2224/16225 ,  H05K1/0274 ,  H05K2201/09918 ,  H05K2201/2054

Abstract: The fabrication of an optical wiring board is performed in the following manner: A core member 13 for a mirror 22 is pattern-formed on a clad layer 11, and simultaneously, using the core member 13, each alignment mark pattern 14 is formed at any position on the clad layer 11. Further, with positioning in reference to each alignment mark 14, the core pattern 13 is subjected to physical cutting to form a bevel part and a concave part 23. Then, a metallic reflective film 18 is coated on the surface of the bevel part. Thereafter, with positioning in reference to each alignment mark 14, an optical wiring core pattern 20 is formed on the clad layer 11 adjacently to the mirror 22.

Abstract translation: 光线路板的制造以如下方式进行：用于反射镜22的芯构件13在包层11上图案形成，同时使用芯构件13，每个对准标记图案14形成在任何 位置。此外，通过相对于每个对准标记14进行定位，对芯图案13进行物理切割以形成斜面部分和凹部23.然后，在金属反射膜18上涂覆金属反射膜18 斜面部分的表面。 此后，通过相对于每个对准标记14进行定位，在包层11上与反射镜22相邻地形成光布线芯图案20。

公开(公告)号：US07884286B2

公开(公告)日：2011-02-08

申请号：US12034586

申请日：2008-02-20

Applicant: Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H05K1/16

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.

公开(公告)号：US07880308B2

公开(公告)日：2011-02-01

申请号：US11602323

申请日：2006-11-21

Applicant: Atsushi Yoshimura ,  Yoshiaki Sugizaki

Inventor： Atsushi Yoshimura ,  Yoshiaki Sugizaki

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L25/0657 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06586 ,  H05K1/0269 ,  H05K3/4015 ,  H05K3/4046 ,  H05K3/462 ,  H05K3/4638 ,  H05K2201/097 ,  H05K2201/09918 ,  H05K2203/0126 ,  H05K2203/049 ,  H05K2203/166

Abstract: There is disclosed a semiconductor device comprising at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being connected between the major surfaces, and a plurality of connecting portions being provided adjacent to each other while connected to each wiring on the major surfaces opposing each other, at least one of the connecting portions provided on the same major surface being formed smaller than the adjacent other connecting portion, the connecting portions being provided at positions opposing each other one to one on the major surface, the connecting portions being connected so that the wirings are connected between the major surfaces, one connecting portion of a pair of the connecting portions connected one to one being formed smaller than the other connecting portion.

Abstract translation: 公开了包括至少两个基板的半导体器件，在每个基板中设置至少一个布线，所述基板被堆叠，使得它们的一侧的主表面彼此相对，并且布线连接在主表面之间 并且多个连接部分彼此相邻设置，同时连接到彼此相对的主表面上的每个布线，设置在相同主表面上的至少一个连接部分形成为小于相邻的另一个连接部分， 连接部分设置在主表面上彼此相对的位置处，连接部分连接成使得布线连接在主表面之间，一对连接的一对连接部分的一个连接部分形成较小 比另一个连接部分。

公开(公告)号：US20100300733A1

公开(公告)日：2010-12-02

申请号：US12458780

申请日：2009-07-22

Applicant: Yong Suk Kim ,  Byeung Gyu Chang ,  Won Hee Yoo ,  Yong Soo Oh

Inventor： Yong Suk Kim ,  Byeung Gyu Chang ,  Won Hee Yoo ,  Yong Soo Oh

IPC: H05K1/09 ,  B05D5/12 ,  B32B38/00

CPC classification number: H05K3/28 ,  C04B37/006 ,  C04B2237/125 ,  C04B2237/365 ,  C04B2237/62 ,  H05K1/0269 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/108 ,  H05K3/388 ,  H05K3/4629 ,  H05K2201/0112 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2203/1383 ,  H05K2203/166

Abstract: The present invention relates to a multilayer ceramic board and manufacturing method thereof. The multilayer ceramic board includes: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias; diffused reflection preventing patterns which expose the vias provided on each of the uppermost ceramic layer and the lowermost ceramic layer, and are disposed on each of a top surface and a bottom surface of the ceramic stacked structure; and contact pads which are electrically connected to the vias exposed by the diffused reflection preventing patterns.

Abstract translation: 本发明涉及一种多层陶瓷板及其制造方法。 多层陶瓷板包括：陶瓷层叠结构，其中多个陶瓷层通过通孔彼此堆叠并彼此互连; 扩散反射防止图案，其暴露设置在最上层陶瓷层和最下层陶瓷层中的每一个上的通孔，并且设置在陶瓷堆叠结构的顶表面和底表面中的每一个上; 以及电连接到由扩散反射防止图案暴露的通孔的接触焊盘。

公开(公告)号：US20100263207A1

公开(公告)日：2010-10-21

申请号：US12743843

申请日：2008-11-25

Applicant: Kimmo Paananen

Inventor： Kimmo Paananen

IPC: H05K3/36

CPC classification number: H05K3/0097 ,  H05K1/0269 ,  H05K2201/09145 ,  H05K2201/09918 ,  H05K2201/209 ,  H05K2203/0165 ,  H05K2203/166 ,  H05K2203/167 ,  Y10T29/49124

Abstract: The invention relates to a method for connecting at least two printed circuit board modules to form a printed circuit board panel by means of a virtual panel. The method for connecting printed circuit board modules uses positioning tags and counterparts thereof, which align the printed circuit board modules to a target location on the printed circuit board panel.

Abstract translation: 本发明涉及一种用于连接至少两个印刷电路板模块以通过虚拟面板形成印刷电路板面板的方法。 用于连接印刷电路板模块的方法使用定位标签及其对应物，其将印刷电路板模块对准印刷电路板面板上的目标位置。

公开(公告)号：US20100242259A1

公开(公告)日：2010-09-30

申请号：US12795613

申请日：2010-06-07

Applicant: Kumiko Kaneko

Inventor： Kumiko Kaneko

IPC: G01R31/28

CPC classification number: G01R31/2818 ,  H05K1/0268 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09254 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/166 ,  Y10T29/49004

Abstract: An electronic module capable of easily determining connection reliability of an ACF connection portion is provided. Electrode wirings of a board serving as an electronic parts of a display panel are connected with ACF bonding wirings of an FPC through an ACF to make electrical connection between the FPC and the board. Two branch portions branched from each of the ACF bonding wirings extend to an edge of the FPC. Low resistance measurement of the connection portion can be performed using the electrode wiring of the board and the branch portions, so whether or not the ACF connection portion is faulty can be determined.

Abstract translation: 提供了能够容易地确定ACF连接部的连接可靠性的电子模块。 用作显示面板的电子部件的板的电极布线通过ACF与FPC的ACF接合布线连接，以在FPC和板之间进行电连接。 从每个ACF接合布线分支的两个分支部分延伸到FPC的边缘。 可以使用电路板和分支部分的电极布线来实现连接部分的低电阻测量，因此可以确定ACF连接部分是否有故障。

公开(公告)号：US07738257B2

公开(公告)日：2010-06-15

申请号：US11610385

申请日：2006-12-13

Applicant: Islam Salama ,  Yongki Min ,  Huankiat Seh

Inventor： Islam Salama ,  Yongki Min ,  Huankiat Seh

IPC: H05K1/18

CPC classification number: H05K1/162 ,  H05K1/0269 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09718 ,  H05K2201/09918 ,  H05K2203/0353 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A microelectronic device, a method of fabricating the device, and a system including the device. The device includes: a substrate including a polymer build-up layer, and a passive structure embedded in the substrate. The passive structure includes a top conductive layer overlying the polymer build-up layer, a dielectric layer overlying the top conductive layer, and a bottom conductive layer overlying the dielectric layer. The device further includes a conductive via extending through the polymer build-up layer and electrically insulated from the bottom conductive layer, an insulation material insulating the conductive via from the bottom conductive layer, and a bridging interconnect disposed at a side of the top conductive layer facing away from the dielectric layer, the bridging interconnect electrically connecting the conductive via to the top conductive layer.

Abstract translation: 微电子器件，制造该器件的方法以及包括该器件的系统。 该装置包括：包含聚合物累积层的基底和嵌入基底中的被动结构。 被动结构包括覆盖聚合物积聚层的顶部导电层，覆盖顶部导电层的电介质层和覆盖在电介质层上的底部导电层。 该器件还包括延伸穿过聚合物积聚层并与底部导电层电绝缘的导电通孔，将导电通孔与底部导电层绝缘的绝缘材料以及布置在顶部导电层侧面的桥接互连 背离电介质层，桥接互连将导电通孔电连接到顶部导电层。

公开(公告)号：US20100058584A1

公开(公告)日：2010-03-11

申请号：US12208972

申请日：2008-09-11

Applicant: Anthony Faraci ,  Gary N. Sortino

Inventor： Anthony Faraci ,  Gary N. Sortino

IPC: H05K3/36

CPC classification number: H05K3/4638 ,  H05K1/0269 ,  H05K3/00 ,  H05K3/4691 ,  H05K2201/09918 ,  H05K2203/06 ,  H05K2203/065 ,  H05K2203/101 ,  H05K2203/107 ,  H05K2203/1476 ,  H05K2203/166 ,  Y10T29/49126 ,  Y10T29/49213 ,  Y10T29/53087 ,  Y10T29/5317

Abstract: The present invention relates to a pin-less registration and inductive heating system involving the use of a pre-alignment station for imaging an initial position of a laminate element, an imaging and computer operation control system for determining a required correction factor between an alignment of the laminate element at the pre-alignment station and a preferred stack orientation for the laminate element, and an alignment and transfer system for securely gripping, transferring, and repositioning a laminate element from a top position to the preferred stack orientation employing a preferred four-axis orientation.

Abstract translation: 本发明涉及一种无针对配准和感应加热系统，其涉及使用用于对层压元件的初始位置进行成像的预对准工位，成像和计算机操作控制系统，用于确定所需的校正因子， 预对准工位的叠层元件以及用于层压元件的优选堆叠方向，以及用于使用优选的四层结构将层压元件从顶部位置牢固地夹紧，转移和重新定位到优选堆叠方向的对准和传送系统， 轴方向。

公开(公告)号：US07667160B2

公开(公告)日：2010-02-23

申请号：US11356246

申请日：2006-02-17

Applicant: Yasuji Hiramatsu

Inventor： Yasuji Hiramatsu

IPC: B23K26/38 ,  B23K26/03

CPC classification number: B23K26/066 ,  B23K26/03 ,  B23K26/032 ,  B23K26/04 ,  B23K26/0622 ,  B23K26/064 ,  B23K26/0643 ,  B23K26/0648 ,  B23K26/0665 ,  B23K26/067 ,  B23K26/0673 ,  B23K26/08 ,  B23K26/082 ,  B23K26/0853 ,  B23K26/382 ,  B23K26/389 ,  B23K26/40 ,  B23K2101/42 ,  B23K2103/16 ,  B23K2103/42 ,  B23K2103/50 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0026 ,  H05K3/0035 ,  H05K3/4644 ,  H05K3/4679 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10113

Abstract: There is provided a laser processing apparatus, a multilayer printed wiring board manufacturing apparatus, and a manufacturing method to form via holes of ultra-fine diameter. The laser beam from the CO2 laser oscillator (60) is converted to the shortened wavelength beam by a tellurium crystal (94) to control diffraction of the laser beam. Simultaneously, when the laser beam is condensed, a limit value of the condensation limit is reduced. Thereby, the spot diameter of laser beam is reduced and a hole for via hole is bored on the interlayer insulation resin on a substrate (10). Therefore, even when the laser beam output is raised to form a deeper hole, the hole diameter is not widened and thereby a hole for a small diameter via hole can be formed.

公开(公告)号：US07656089B2

公开(公告)日：2010-02-02

申请号：US11294360

申请日：2005-12-06

Applicant: Bu-Kyeong Mo ,  Jong-Bong Ha ,  Seung-Hak Kim

Inventor： Bu-Kyeong Mo ,  Jong-Bong Ha ,  Seung-Hak Kim

IPC: H01J17/49 ,  H05K1/00

CPC classification number: H05K3/361 ,  H05K1/0269 ,  H05K2201/0187 ,  H05K2201/09918 ,  H05K2203/161 ,  H05K2203/166

Abstract: A Tape Carrier Package (TCP) that is attachable to and detachable from a connector of a Printed circuit Board Assembly (PBA) of a plasma display apparatus that includes a plurality of electrodes, and a plasma display device including the same. The TCP includes an input portion that is attachable to and detachable from the PBA, an output portion that is attachable to and detachable from one of the plurality of electrodes of the plasma display apparatus, and at least one alignment mark, at least a portion of the alignment mark corresponding to or abutting an edge of the input portion.

Abstract translation: 一种可附接到包括多个电极的等离子体显示装置的印刷电路板组件（PBA）的连接器并可拆卸的带载封装（TCP）以及包括该等离子体显示装置的等离子体显示装置。 TCP包括可附接到PBA和可从PBA拆卸的输入部分，可连接到等离子体显示装置的多个电极中的一个电极并可拆卸的输出部分，以及至少一个对准标记，至少一部分 所述对准标记对应于或邻接所述输入部分的边缘。