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公开(公告)号:US10000847B2
公开(公告)日:2018-06-19
申请号:US14863063
申请日:2015-09-23
发明人: Preetham Rao , Subramani Iyer , Kartik Shah , Mehran Behdjat
IPC分类号: H05B3/68 , C23C16/00 , C23C16/458 , H01L21/687 , H01L21/67
CPC分类号: C23C16/4583 , C23C16/4581 , H01L21/67098 , H01L21/68785
摘要: Embodiments described herein include a susceptor for semiconductor processing including an oriented graphite plate that may have a thickness of at least 1 mm. The susceptor may have a support member, and the oriented graphite plate may be disposed on the support member. The support member may have a center thermal conduit and an edge thermal conduit, and may be substantially solid between the center thermal conduit and the edge thermal conduit.
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公开(公告)号:US09997405B2
公开(公告)日:2018-06-12
申请号:US14866621
申请日:2015-09-25
发明人: Anand Chandrashekar , Esther Jeng , Raashina Humayun , Michal Danek , Juwen Gao , Deqi Wang
IPC分类号: H01L21/44 , H01L21/768 , H01L21/285 , H01L21/321 , H01L21/324 , H01L27/11524 , H01L27/11556 , C23C16/00 , C23C16/04 , C23C16/50
CPC分类号: H01L21/76879 , C23C16/00 , C23C16/045 , C23C16/50 , H01L21/28556 , H01L21/321 , H01L21/324 , H01L21/76856 , H01L21/76861 , H01L21/76876 , H01L21/76898 , H01L27/11524 , H01L27/11556 , H01L2924/0002 , H01L2924/00
摘要: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.
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公开(公告)号:US09991208B2
公开(公告)日:2018-06-05
申请号:US15260629
申请日:2016-09-09
申请人: SILTRONIC AG
发明人: Reinhard Schauer , Christian Hager
IPC分类号: C23C16/00 , H01L23/544 , H01L21/02 , H01L21/68 , H01L21/687 , H01L29/16 , C23C16/24 , C30B25/12 , C23C16/458 , C30B25/20 , C30B29/06
CPC分类号: H01L23/544 , C23C16/24 , C23C16/4585 , C30B25/12 , C30B25/20 , C30B29/06 , H01L21/02381 , H01L21/02428 , H01L21/02532 , H01L21/02634 , H01L21/68 , H01L21/68735 , H01L21/68785 , H01L29/16 , H01L2223/54426 , H01L2223/54493
摘要: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.
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公开(公告)号:US09982343B2
公开(公告)日:2018-05-29
申请号:US13715295
申请日:2012-12-14
发明人: Chien-Teh Kao , Hyman W. H. Lam
IPC分类号: C23C16/00 , H01L21/00 , C23C16/455 , H01J37/32 , C23C16/44 , C23C16/509
CPC分类号: C23C16/455 , C23C16/4408 , C23C16/45565 , C23C16/45574 , C23C16/5096 , H01J37/32357 , H01J37/3244 , H01J37/32449
摘要: Apparatus for providing plasma to a process chamber may include an electrode; a first ground plate disposed beneath the electrode defining a cavity therebetween; an insulator disposed between the electrode and first ground plate to prevent direct contact therebetween; a second ground plate disposed beneath the first ground plate defining a first channel; a plurality of first through holes through the first ground plate to fluidly couple the channel and cavity; a first gas inlet coupled to the first channel; a third ground plate disposed beneath the second ground plate defining a second channel; a plurality of conduits through the ground plates to fluidly couple the cavity to an area beneath the third ground plate; a plurality of gas outlet holes through the third ground plate to fluidly couple the second channel to the area beneath the third ground plate; and a second gas inlet coupled to the second channel.
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公开(公告)号:US09967965B2
公开(公告)日:2018-05-08
申请号:US13627696
申请日:2012-09-26
发明人: Ali Shajii , Richard Gottscho , Souheil Benzerrouk , Andrew Cowe , Siddharth P. Nagarkatti , William Entley
IPC分类号: C23C16/00 , H01L21/306 , H05H1/46 , H01J37/32 , H05H1/50
CPC分类号: H05H1/46 , H01J37/32082 , H01J37/321 , H01J37/32422 , H01J37/32449 , H01J37/3266 , H01J37/32669 , H01J37/32816 , H01J2237/334 , H05H1/50 , H05H2001/4682
摘要: A processing chamber including multiple plasma sources in a process chamber top. Each one of the plasma sources is a ring plasma source including a primary winding and multiple ferrites. A plasma processing system is also described. A method of plasma processing is also described.
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公开(公告)号:US09966256B2
公开(公告)日:2018-05-08
申请号:US14844193
申请日:2015-09-03
IPC分类号: C23C16/00 , H01L21/02 , C23C16/455 , C23C16/44 , C23C16/52 , C30B1/02 , C30B1/04 , C30B29/06 , C30B29/08 , C30B29/52
CPC分类号: H01L21/02532 , C23C16/02 , C23C16/22 , C23C16/24 , C30B1/026 , C30B1/04 , C30B29/08 , C30B29/52 , H01L21/02592 , H01L21/0262 , H01L21/02667 , H01L21/02669
摘要: There is provided a method of forming a film on a surface to be processed of a workpiece, the method including: accommodating the workpiece with a single-crystallized substance formed on the surface to be processed, into a processing chamber; supplying a crystallization suppressing process gas into the processing chamber such that a crystallization of the single-crystallized substance formed on the surface to be processed is suppressed; and supplying a source gas into the processing chamber to form an amorphous film on the surface to be processed of the workpiece.
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公开(公告)号:US09951420B2
公开(公告)日:2018-04-24
申请号:US14537247
申请日:2014-11-10
申请人: SOL VOLTAICS AB
发明人: Greg Alcott
IPC分类号: C23C16/00 , C23C16/455 , C23C16/46 , C23C16/52 , C23C16/448 , C23C14/22 , C30B25/16 , C30B29/60
CPC分类号: C23C16/455 , C23C14/228 , C23C16/4481 , C23C16/46 , C23C16/463 , C23C16/52 , C30B25/165 , C30B29/60
摘要: A nanoparticles aerosol generator is disclosed. The nanoparticles aerosol generator includes an evaporation chamber having a wall, a container containing a source material, and a heating device configured to heat the source material. The nanoparticles aerosol generator also includes a carrier gas source configured to blow a carrier gas toward the source material to generate a nanoparticles aerosol with nanoparticles of the source material suspended therein. The nanoparticles aerosol generator further includes a dilution gas source configured to supply a dilution gas into the chamber to flow substantially along the wall within the chamber and to dilute the nanoparticles aerosol.
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公开(公告)号:US09947515B2
公开(公告)日:2018-04-17
申请号:US14204840
申请日:2014-03-11
发明人: Merritt Funk , Jianping Zhao , Lee Chen , Toshihiko Iwao , Toshihisa Nozawa , Zhiying Chen , Peter Ventzek
IPC分类号: C23C16/00 , C23F1/00 , H01L21/306 , H01J37/32 , H01L21/67
CPC分类号: H01J37/32229 , H01J37/32211 , H01J37/32238 , H01L21/67017 , H01L21/67069
摘要: A processing system is disclosed, having a power transmission element with an interior cavity that propagates electromagnetic energy proximate to a continuous slit in the interior cavity. The continuous slit forms an opening between the interior cavity and a substrate processing chamber. The electromagnetic energy may generate an alternating charge in the continuous slit that enables the generation of an electric field that may propagate into the processing chamber. The electric field may interact with process gas in the processing chamber to generate plasma for treating the substrate. The interior cavity may be isolated from the process chamber by a dielectric component that covers the continuous slit. The power transmission element may be used to control plasma density within the process chamber, either by itself or in combination with other plasma sources.
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79.
公开(公告)号:US09932674B2
公开(公告)日:2018-04-03
申请号:US13467324
申请日:2012-05-09
IPC分类号: C23C16/00 , H01L21/306 , C23C16/54 , H01J37/32 , C23C16/455
CPC分类号: C23C16/54 , C23C16/4554 , H01J37/321
摘要: A film deposition apparatus includes a vacuum chamber into which first and second gases are sequentially supplied for a plural times, a rotation table including a first surface having a receiving area and rotating the receiving area inside the vacuum chamber, a first part supplying the first gas to a first region, a second part supplying the second gas to a second region separated from the first region in a peripheral direction of the rotation table via a separation region, a plasma gas part supplying a plasma generation gas into a plasma region inside the vacuum chamber, an antenna facing the first surface of the rotation table and generating plasma from the plasma generation gas inside a plasma space by inductive coupling, and a faraday shield being grounded and provided between the antenna and the plasma space and including slits aligned in a direction perpendicularly intersecting the antenna.
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公开(公告)号:US09920427B2
公开(公告)日:2018-03-20
申请号:US14751378
申请日:2015-06-26
发明人: Motoki Fujii , Fumiki Aiso , Hajime Nagano , Ryota Fujitsuka
IPC分类号: C23C16/00 , C23C16/458 , H01L21/02 , C23C16/40 , C23C16/455
CPC分类号: C23C16/4584 , C23C16/402 , C23C16/45551 , H01L21/02164 , H01L21/0228
摘要: A semiconductor manufacturing apparatus according to an embodiment comprises a reaction chamber in which a semiconductor substrate is capable of being accommodated when a deposited film is to be formed on a surface of the semiconductor substrate. A first supplier supplies a source gas to a first area in the reaction chamber. A second supplier supplies an oxidation gas to a second area in the reaction chamber. A third supplier supplies a hydrogen gas to a third area between the first area and the second area in the reaction chamber. A stage moves the semiconductor substrate to any one of the first to third areas.
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