公开(公告)号：US10087421B2

公开(公告)日：2018-10-02

申请号：US13883371

申请日：2011-11-09

申请人： Eiji Kobayashi ,  Tamaki Wada ,  Yasutaka Fujita ,  Norihiro Yoshinaga ,  Masako Doi ,  Yasuhiro Fujimoto ,  Takumi Teratani

发明人： Eiji Kobayashi ,  Tamaki Wada ,  Yasutaka Fujita ,  Norihiro Yoshinaga ,  Masako Doi ,  Yasuhiro Fujimoto ,  Takumi Teratani

IPC分类号： C12N5/071 ,  C07H3/04 ,  C12N5/0775 ,  A01N1/02 ,  A61K9/00 ,  A61K47/26 ,  A61K47/36 ,  A61K35/28 ,  C08B31/04 ,  C08B37/02

摘要： The present invention provides a mammalian stem cell suspension containing mammalian stem cells and at least one polysaccharide such as trehalose, and the like; a mammalian stem cell aggregation inhibitor containing polysaccharide such as trehalose, and the like; a method of suppressing aggregation of mammalian stem cells, containing suspending the mammalian stem cells in an aqueous physiological solution containing polysaccharide; an inhibitor of a decrease in the survival rate of mammalian stem cells containing polysaccharide such as trehalose and the like; a method of suppressing a decrease in the survival rate of mammalian stem cells, containing suspending the mammalian stem cells in an aqueous physiological solution containing polysaccharides, and the like.

公开(公告)号：US20110269268A1

公开(公告)日：2011-11-03

申请号：US13179468

申请日：2011-07-08

申请人： NOBUYASU MUTO ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

发明人： NOBUYASU MUTO ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

IPC分类号： H01L21/60

CPC分类号： H01L24/85 ,  H01L23/5388 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/78 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/78301 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： The degree of freedom of the chip layout in a semiconductor device is improved, and improvement in packaging density is aimed at.Since it becomes possible to form the wire of two directions on the pad of a memory chip by performing the over-bonding of reverse bonding by ball bonding, an effect equivalent to continuation stitch bonding of wedge bonding can be produced by ball bonding. Hereby, the degree of freedom of a chip layout and the degree of freedom of the lead layout of substrate 3 can be improved, and the packaging density on a substrate in a chip lamination type semiconductor device (memory card) can be improved.

摘要翻译： 提高了半导体器件中的芯片布局的自由度，并且旨在提高封装密度。 由于可以通过通过球接合进行反向接合的过粘结而在存储芯片的焊盘上形成两个方向的线，因此可以通过球接合产生与楔形接合的连续接合接合相当的效果。 因此，可以提高芯片布局的自由度和基板3的引线布局的自由度，并且可以提高芯片层叠型半导体器件（存储卡）中的基板上的封装密度。

公开(公告)号：US06750080B2

公开(公告)日：2004-06-15

申请号：US10372136

申请日：2003-02-25

申请人： Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Tomoko Higashino ,  Takafumi Nishita ,  Hiroshi Ohno

发明人： Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Tomoko Higashino ,  Takafumi Nishita ,  Hiroshi Ohno

IPC分类号： H01L2144

CPC分类号： H01L24/48 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/85181 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/01026 ,  H01L2224/48227 ,  H01L2924/3512 ,  H01L2924/00012

摘要： Two semiconductor chips are bonded to each other with the rear surfaces of the respective semiconductor chips faced to each other, so that two longer sides of the semiconductor chips may confront the side of leads, and supporting leads are bonded and fixed onto the circuit forming surface of one of the semiconductor chips. The semiconductor chips are further bonded to each other in a state where the positions of the respective semiconductor chips are staggered relative to each other so that electrodes of one semiconductor chip may lie outside the other longer side of the other semiconductor chip, and that electrodes of the second semiconductor chip may lie outside the other longer side of the first semiconductor chip.

摘要翻译： 两个半导体芯片彼此接合，各半导体芯片的后表面彼此面对，使得半导体芯片的两个较长的侧面可以面对引线的侧面，并且支撑引线被接合并固定到电路形成表面 的其中一个半导体芯片。 半导体芯片在各半导体芯片的位置相对于彼此交错的状态下进一步接合，使得一个半导体芯片的电极可以位于另一半导体芯片的另一个较长侧的外侧，并且， 第二半导体芯片可以位于第一半导体芯片的另一长边的外侧。

公开(公告)号：US06410987B1

公开(公告)日：2002-06-25

申请号：US09450676

申请日：1999-11-30

申请人： Kouichi Kanemoto ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Mikako Kimura

发明人： Kouichi Kanemoto ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Mikako Kimura

IPC分类号： H01L2348

CPC分类号： H01L21/6836 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2221/68327 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06562 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01028 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A first semiconductor chip (2) is bonded and secured to a second semiconductor chip (3) with a back surface of the first semiconductor chip (2) and a circuit forming surface (3X) of the second semiconductor chip (3) facing each other, and an inner portion of a support lead (6) is bonded and secured to the circuit forming surface (3X) of the second semiconductor chip (3). Such a configuration makes it possible to provide a semiconductor with a reduced thickness.

公开(公告)号：US06392295B1

公开(公告)日：2002-05-21

申请号：US09421274

申请日：1999-10-20

申请人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

发明人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

IPC分类号： H01L2348

CPC分类号： H01L24/06 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48647 ,  H01L2224/4866 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/4876 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85447 ,  H01L2224/8546 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A LOC type semiconductor device comprises a semiconductor chip having a main surface in which semiconductor elements and a plurality of bonding pads are formed, and a back surface opposite the main surface; a plurality of leads each having an inner part and an outer part, and including a plurality of first leads having inner end portions extended on the main surface of the semiconductor chip and a plurality of second leads having inner end portions terminating near the semiconductor chip; bonding wires electrically connecting the bonding pads to bonding portions of the inner parts of the first and the second leads; and a sealing member sealing the semiconductor chip therein. A first bending portion is formed in the inner part of each second lead to prevent the sealing member from transformation by forming the sealing member in satisfactory resin balance between an upper portion and a lower portion of the sealing member.

公开(公告)号：US08530278B2

公开(公告)日：2013-09-10

申请号：US13179468

申请日：2011-07-08

申请人： Nobuyasu Muto ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

发明人： Nobuyasu Muto ,  Naoki Kawanabe ,  Hiroshi Ono ,  Tamaki Wada

IPC分类号： H01L25/065 ,  H01L25/10 ,  H01L21/60

CPC分类号： H01L24/85 ,  H01L23/5388 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/743 ,  H01L24/78 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/78301 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/838 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： The degree of freedom of the chip layout in a semiconductor device is improved, and improvement in packaging density is aimed at.Since it becomes possible to form the wire of two directions on the pad of a memory chip by performing the over-bonding of reverse bonding by ball bonding, an effect equivalent to continuation stitch bonding of wedge bonding can be produced by ball bonding. Hereby, the degree of freedom of a chip layout and the degree of freedom of the lead layout of substrate 3 can be improved, and the packaging density on a substrate in a chip lamination type semiconductor device (memory card) can be improved.

摘要翻译： 提高了半导体器件中的芯片布局的自由度，并且旨在提高封装密度。 由于可以通过通过球接合进行反向接合的过粘结而在存储芯片的焊盘上形成两个方向的线，因此可以通过球接合产生与楔形接合的连续接合接合相当的效果。 因此，可以提高芯片布局的自由度和基板3的引线布局的自由度，并且可以提高芯片层叠型半导体器件（存储卡）中的基板上的封装密度。

公开(公告)号：US07467464B2

公开(公告)日：2008-12-23

申请号：US11987621

申请日：2007-12-03

申请人： Takahiro Osawa ,  Yoichi Kawata ,  Atsushi Fujishima ,  Tamaki Wada ,  Kenichi Imura

发明人： Takahiro Osawa ,  Yoichi Kawata ,  Atsushi Fujishima ,  Tamaki Wada ,  Kenichi Imura

IPC分类号： H05K3/30

CPC分类号： G06K19/07732 ,  B29C45/14647 ,  G06K19/077 ,  G06K19/07745 ,  H01L23/04 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/5388 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/3511 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49158 ,  Y10T29/49222 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A method for manufacturing a multi media card comprises the steps of: providing a substrate, mounting a first flash memory chip and a controller chip for controlling the flash memory chip over a front surface of the substrate, molding the first flash memory chip and the controller chip by a resin, providing a case having a main surface and a back surface, wherein the back surface of the case has a first recess and a second recess, and, covering the resin and the front surface of the substrate by the case. The depth of the first recess is deeper than the depth of the second recess. The resin is fitted in the first recess. An edge portion of the substrate is fitted in the second recess. The substrate warps so that a central portion of the substrate projects in a direction away from the case.

摘要翻译： 制造多媒体卡的方法包括以下步骤：提供基板，安装第一闪存芯片和用于控制闪存芯片超过基板前表面的控制器芯片，模制第一闪存芯片和控制器 提供具有主表面和后表面的壳体，其中壳体的后表面具有第一凹部和第二凹部，并且通过壳体覆盖树脂和基板的前表面。 第一凹部的深度比第二凹部的深度更深。 树脂安装在第一凹槽中。 衬底的边缘部分装配在第二凹部中。 基板翘曲，使得基板的中心部分沿远离壳体的方向突出。

公开(公告)号：US06501183B2

公开(公告)日：2002-12-31

申请号：US09915375

申请日：2001-07-27

申请人： Kouichi Kanemoto ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Mikako Kimura

发明人： Kouichi Kanemoto ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Mikako Kimura

IPC分类号： H01L2348

CPC分类号： H01L21/6836 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2221/68327 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06562 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01028 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A first semiconductor chip (2) is bonded and secured to a second semiconductor chip (3) with a back surface of the first semiconductor chip (2) and a circuit forming surface (3X) of the second semiconductor chip (3) facing each other, and an inner portion of a support lead (6) is bonded and secured to the circuit forming surface (3X) of the second semiconductor chip (3). Such a configuration makes it possible to provide a semiconductor with a reduced thickness.

摘要翻译： 第一半导体芯片（2）被接合并固定到具有第一半导体芯片（2）的背面的第二半导体芯片（3）和第二半导体芯片（3）的彼此面对的电路形成表面（3X） ，并且支撑引线（6）的内部部分被接合并固定到第二半导体芯片（3）的电路形成表面（3X）。 这种构造使得可以提供具有减小的厚度的半导体。

公开(公告)号：US6064112A

公开(公告)日：2000-05-16

申请号：US47350

申请日：1998-03-25

申请人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda ,  Kunihiro Tsubosaki ,  Asao Nishimura

发明人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda ,  Kunihiro Tsubosaki ,  Asao Nishimura

IPC分类号： H01L23/50 ,  H01L23/48 ,  H01L23/495 ,  H01L25/10 ,  H01L25/18 ,  H01L25/11

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73215 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351

摘要： A semiconductor device in which inner leads among a plurality of leads are arranged on a circuit formation face of a semiconductor chip encapsulated by a resin encapsulating body and bonding pads formed on the circuit formation face of the chip and the inner leads are electrically connected. An adhesive is selectively applied only to the inner leads on the outermost sides arranged on both ends of the chip among the plurality of inner leads. The circuit formation face of the chip and the inner leads of the selected leads are joined with the adhesive Each of the selected leads has a step on the main face of the semiconductor chip and the leads except for the selected leads have almost straight shapes without being processed to have steps.

摘要翻译： 一种半导体器件，其中多个引线中的内部引线布置在由树脂封装体封装的半导体芯片的电路形成面上，并且形成在芯片的电路形成面上的接合焊盘和内部引线电连接。 粘合剂仅选择性地仅施加在布置在多个内引线中的芯片两端的最外侧的内引线上。 芯片的电路形成面和所选引线的内引线与粘合剂接合每个所选择的引线在半导体芯片的主面上具有台阶，除了所选择的引线之外的引线具有几乎直的形状，而不是 加工成有步骤。

公开(公告)号：US5723903A

公开(公告)日：1998-03-03

申请号：US487216

申请日：1995-06-07

申请人： Masachika Masuda ,  Tamaki Wada

发明人： Masachika Masuda ,  Tamaki Wada

IPC分类号： H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L25/10 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L24/49 ,  H01L23/3107 ,  H01L23/49506 ,  H01L23/49555 ,  H01L23/49582 ,  H01L25/105 ,  H05K3/3426 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85439 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/145 ,  H05K1/181 ,  H05K3/3421 ,  Y02P70/613

摘要： Ends of inner leads are disposed in the vicinity of a peripheral end of a semiconductor chip and a portion of an insulating film tape is affixed to a main surface of the semiconductor chip by an adhesive while other portions of the insulating film tape are affixed to portions of the inner leads by an adhesive. Electrode pads provided in the main surface of the semiconductor chip are electrically connected to the ends of the corresponding inner leads by bonding wires, and the semiconductor chip, the inner leads, the electrode pads, the insulating film tape and the bonding wares are sealed by a resin molding. The thickness of the insulating film tape is smaller than a height from the main surface of the semiconductor chip to an apex of the bonding wire. Surfaces of the ends of the inner leads connected to the bonding wires are positioned lower than the main surface of the semiconductor chip and the inner leads are positioned between the main surface and an opposite surface of the semiconductor chip.

摘要翻译： 内引线的端部设置在半导体芯片的周缘附近，绝缘膜带的一部分通过粘合剂固定在半导体芯片的主表面上，绝缘膜带的其它部分固定到部分 的内引线。 设置在半导体芯片的主表面上的电极焊盘通过接合线电连接到相应的内引线的端部，并且半导体芯片，内引线，电极焊盘，绝缘膜带和焊接件被 树脂成型。 绝缘膜带的厚度小于从半导体芯片的主表面到接合线的顶点的高度。 连接到接合线的内部引线的端部的表面位于比半导体芯片的主表面低的位置，内部引线位于半导体芯片的主表面和相对表面之间。