公开(公告)号：US20050213308A1

公开(公告)日：2005-09-29

申请号：US11085342

申请日：2005-03-21

Applicant: Takeshi Suzuki ,  Toshiyuki Ilmura ,  Kazushige Osumi ,  Shinichi Tsuyuki

Inventor： Takeshi Suzuki ,  Toshiyuki Ilmura ,  Kazushige Osumi ,  Shinichi Tsuyuki

IPC: H01L25/18 ,  H01L23/50 ,  H01L25/04 ,  H01L25/16 ,  H05K1/00 ,  H05K1/02 ,  H05K1/05 ,  H05K1/14 ,  H05K3/28 ,  H05K3/34 ,  H05K7/06

CPC classification number: H05K1/141 ,  H01L25/16 ,  H01L25/165 ,  H01L2224/48091 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/0218 ,  H05K1/056 ,  H05K3/284 ,  H05K3/3405 ,  H05K3/3421 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/1034 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A hybrid integrated circuit device of the present invention includes: a circuit board having a front surface subjected to an insulation process; a conductive pattern formed on the front surface of the circuit board; a circuit element placed at a desired position on the conductive pattern and electrically connected to the conductive pattern; and a plurality of leads fixed to the conductive pattern and led to the outside. End portions of the leads which are led to the outside extend approximately parallel to the circuit board in a plane different from that of the front surface of the circuit board.

Abstract translation: 本发明的混合集成电路器件包括：具有经过绝缘处理的正面的电路板; 形成在所述电路板的前表面上的导电图案; 电路元件放置在导电图案上的期望位置并电连接到导电图案; 以及多个引线固定到导电图案并被引导到外部。 引导到外部的引线的端部在与电路板的前表面的平面不同的平面中大致平行于电路板延伸。

公开(公告)号：US20040238956A1

公开(公告)日：2004-12-02

申请号：US10449353

申请日：2003-05-30

Inventor： Masood Murtuza ,  Muthiah Venkateswaran ,  Satyendra S. Chauhan

IPC: H01L021/00 ,  H01L021/84 ,  H01L023/48 ,  H01L021/44 ,  H01L029/40 ,  H01L023/52

CPC classification number: H01L23/49838 ,  H01L24/81 ,  H01L2224/10165 ,  H01L2224/16 ,  H01L2224/81136 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/09772 ,  H05K2201/10674 ,  H05K2203/0182 ,  Y02P70/613

Abstract: In one embodiment, an integrated circuit package includes a die associated with an integrated circuit and a die pad. The die has a bottom surface, and the pad has a top surface opposite the bottom surface of the die. Two or more bump pad traces are each coupled to the top surface of the pad, and one or more other traces are each coupled to the top surface of the pad in a corresponding inter-bump pad region between adjacent bump pad traces. A number of solder bumps each couple the die to the pad at a corresponding bump pad trace to provide electrical connectivity between circuitry associated with the die and circuitry associated with the die pad. Each inter-bump pad region is free from any solder mask material deposited to control collapse of the die towards the pad during a reflow process for bonding the die to the pad using the bumps, a supporting structure that contacts the die during the reflow process having been used instead.

Abstract translation: 在一个实施例中，集成电路封装包括与集成电路和管芯焊盘相关的管芯。 模具具有底表面，并且垫具有与模具的底表面相对的顶表面。 两个或更多个凸块焊盘迹线各自耦合到焊盘的顶表面，并且一个或多个其它迹线各自在相邻焊盘迹线之间的对应的凸块间焊盘区域中耦合到焊盘的顶表面。 多个焊料凸块每个在相应的凸块焊盘迹线上将焊盘耦合到焊盘，以提供与管芯相关联的电路与与管芯焊盘相关联的电路之间的电连接。 每个凸块间焊盘区域没有任何沉积的焊料掩模材料，以在回流过程期间控制裸片朝向衬垫的塌陷，用于使用凸块将裸片焊接到衬垫上，在回流过程中与裸片接触的支撑结构具有 被改为使用

公开(公告)号：US20040108135A1

公开(公告)日：2004-06-10

申请号：US10682780

申请日：2003-10-09

Inventor： Takeshi Ashida

IPC: H01L023/488

CPC classification number: H01L23/50 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11822 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/111 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/09772 ,  H05K2201/0989 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a circuit board including a pad for mounting a ball grid array and a wiring, a mounting structure of the ball grid array, an electro-optic device, and an electronic device, the circuit board includes a pad for mounting the ball grid array, a wiring for connecting the pad and an external terminal, and a soldering resist having an opening portion exposing the pad and the wiring.

Abstract translation: 在包括用于安装球栅阵列的焊盘和布线的电路板，球栅阵列的安装结构，电光器件和电子器件中，电路板包括用于安装球栅阵列的焊盘， 用于连接焊盘和外部端子的布线，以及具有露出焊盘和布线的开口部分的焊接抗蚀剂。

公开(公告)号：US06665181B2

公开(公告)日：2003-12-16

申请号：US10096509

申请日：2002-03-13

Applicant: Atsuko Tanaka ,  Masuo Ohnishi

Inventor： Atsuko Tanaka ,  Masuo Ohnishi

IPC: H05K720

CPC classification number: H05K1/0272 ,  G06F1/203 ,  H01L2924/0002 ,  H05K1/0209 ,  H05K2201/064 ,  H05K2201/09072 ,  H05K2201/09772 ,  H05K2201/09781 ,  H01L2924/00

Abstract: A fan housing of a fan unit includes a housing wall standing from the surface of a printed circuit board. The printed circuit board serves to establish the fan housing in cooperation with the housing wall. The fan housing further includes a ceiling wall connected to the housing wall. The ceiling wall extends along a datum plane parallel to the surface of the printed circuit board. A high speed airflow can be generated within the fan housing. The air flow promotes the heat radiation from the printed circuit board. An electrically conductive wiring pattern extending over the surface of the printed circuit board may further promote the heat radiation from the printed circuit board.

Abstract translation: 风扇单元的风扇壳体包括从印刷电路板的表面竖立的壳体壁。 印刷电路板用于与壳体壁一起建立风扇壳体。 风扇壳体还包括连接到壳体壁的顶壁。 顶壁沿平行于印刷电路板表面的基准平面延伸。 风扇外壳内可能产生高速气流。 空气流促进来自印刷电路板的热辐射。 在印刷电路板的表面上延伸的导电布线图形可以进一步促进来自印刷电路板的热辐射。

公开(公告)号：US20030173662A1

公开(公告)日：2003-09-18

申请号：US10366928

申请日：2003-02-14

Inventor： Takumi Oikawa

IPC: H01L023/12

CPC classification number: H05K3/305 ,  H05K3/3421 ,  H05K3/3442 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10636 ,  H05K2201/10689 ,  H05K2201/10727 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613

Abstract: Electronic equipment is composed of a circuit board with a surface-printed circuit layer, an electronic part with a terminal, an under-fill provided between the electronic part and the surface-printed circuit layer. The terminal is electrically connected to the surface-printed circuit layer so that the electronic part is mounted on the circuit boarding an area, in which the circuit board faces the bottom face of the electronic part except for the terminal. The under-fill directly contacts the electronic part and the surface-printed circuit layer so that the under-fill fixes the electronic part to the circuit board.

Abstract translation: 电子设备由具有表面印刷电路层的电路板，具有端子的电子部件，设置在电子部件和表面印刷电路层之间的填充物构成。 端子电连接到表面印刷电路层，使得电子部件安装在电路板上的电路板上，电路板面向电子部件的除了端子之外的底面。 底部填充物直接接触电子部件和表面印刷电路层，从而将电子零件固定在电路板上。

公开(公告)号：US06418032B2

公开(公告)日：2002-07-09

申请号：US09800582

申请日：2001-03-08

Applicant: Masayuki Hirata ,  Osamu Ueno

Inventor： Masayuki Hirata ,  Osamu Ueno

IPC: H05K111

CPC classification number: H05K9/0039 ,  H05K1/0225 ,  H05K1/0233 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/1006 ,  H05K2201/10689

Abstract: A printed wiring board in which noise components at a high frequency side of a power supply voltage can be eliminated, and undesired radiation noisewhich is newly generated can be suppressed, such that noise can be greatly reduced overall. The printed wiring board includes a first signal layer, a GND layer, a power source layer and a second signal layer. A sub-power source layer is provided on a same layer as a main power source layer. The sub-power source layer is formed in a substantially oval shape at a predetermined position in a substantially oval opening in the main power source layer, such that it is not in direct contact with the main power source layer. Power supply voltage is supplied from the main power source layer through an L-type filter.

Abstract translation: 可以抑制能够消除电源电压的高频侧的噪声成分的新印刷布线板，并且可以抑制新生成的不期望的放射线，使得整体上可以大大降低噪声。 印刷电路板包括第一信号层，GND层，电源层和第二信号层。 子电源层设置在与主电源层相同的层上。 子电源层在主电源层中的大致椭圆形的开口中的预定位置处形成为大致椭圆形状，使得它不与主电源层直接接触。 电源电压由主电源层通过L型滤波器供电。

公开(公告)号：US5973927A

公开(公告)日：1999-10-26

申请号：US885902

申请日：1997-06-30

Applicant: Shinji Tanaka

Inventor： Shinji Tanaka

IPC: H01L21/60 ,  H01L23/36 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H05K3/36 ,  H05K7/02

CPC classification number: H05K1/0218 ,  H01L23/36 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/50 ,  H05K1/0239 ,  H05K1/0243 ,  H01L2224/32 ,  H01L2924/3011 ,  H05K2201/09772 ,  H05K2201/10666 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/2036 ,  H05K3/3452 ,  H05K3/363

Abstract: A mounting structure for an integrated circuit device comprises a first substrate, a second substrate and an insulator. The first substrate contains conductive wiring electrically connected to the integrated circuit device. The first substrate is mounted on the second substrate which have a ground pattern. The insulator is provided between the conductive wiring and the ground pattern.

Abstract translation: 集成电路器件的安装结构包括第一衬底，第二衬底和绝缘体。 第一基板包括电连接到集成电路器件的导电布线。 第一基板安装在具有接地图案的第二基板上。 绝缘体设置在导电布线和接地图案之间。

公开(公告)号：US5742009A

公开(公告)日：1998-04-21

申请号：US541213

申请日：1995-10-12

Applicant: Ahmad Hamzehdoost ,  Chin-Ching Huang

Inventor： Ahmad Hamzehdoost ,  Chin-Ching Huang

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/16

CPC classification number: H05K1/0248 ,  H05K1/111 ,  H05K2201/09263 ,  H05K2201/09772 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/4913

Abstract: A printed circuit board layout is provided for minimizing signal delays caused by mismatch in length of the inner leads of a package lead frame. This is accomplished by the provision of a unique conductive trace pattern formed preferably on the top surface or else on a lower surface of an electrically-insulated, heat-conducting printed circuit board. The conductive trace pattern includes a plurality of U-shaped metallized traces. Each of the plurality of U-shaped traces have a varying length so that certain ones adjacent the inner leads at the center of the package lead frame are longer than certain ones adjacent the inner leads at the corners of the package lead frame. The conductive trace pattern and the outer leads of the package lead frame also serve to transfer heat away from a molded-plastic body encapsulating an integrated-circuit die and the package lead frame and distribute the same on the printed circuit board.

Abstract translation: 提供印刷电路板布局以最小化由引线框架的内引线的长度不匹配引起的信号延迟。 这通过提供优选地形成在电绝缘的导热印刷电路板的顶表面上或在下表面上形成的唯一导电迹线图来实现。 导电迹线图案包括多个U形金属化迹线。 多个U形迹线中的每一个具有变化的长度，使得与封装引线框架的中心处的内部引线相邻的某些相对于封装引线框架的拐角处的内部引线的某些相对较长。 封装引线框架的导电迹线图案和外部引线还用于将热量从封装集成电路管芯和封装引线框架的模制塑料体传递到印刷电路板上。

公开(公告)号：US5624750A

公开(公告)日：1997-04-29

申请号：US450455

申请日：1995-05-25

Applicant: Jose A. Martinez ,  Louis E. Gates, Jr.

Inventor： Jose A. Martinez ,  Louis E. Gates, Jr.

IPC: B29C65/34 ,  C09J5/06 ,  H05B3/36 ,  H05K1/02 ,  H05K1/16 ,  H05K3/30 ,  C09J7/02

CPC classification number: B29C66/472 ,  B29C65/346 ,  B29C65/348 ,  B29C65/4885 ,  B29C65/5057 ,  B29C66/1122 ,  C09J5/06 ,  H05B3/36 ,  H05K1/0212 ,  H05K3/305 ,  B29L2031/3425 ,  H05B2203/003 ,  H05B2203/014 ,  H05B2203/017 ,  H05K1/0203 ,  H05K1/167 ,  H05K2201/0129 ,  H05K2201/0209 ,  H05K2201/09772 ,  H05K2201/10727 ,  H05K2203/1115 ,  H05K2203/176 ,  Y02P70/613 ,  Y10T428/2804 ,  Y10T428/2848

Abstract: A heater assembly and a method for securing and removing an object, such as a ceramic package to and from a surface, such as the surface of circuit module or printed wiring board, for example. The heater assembly includes a heater element such as a foil (film or wire) element, embedded or sandwiched between two layers of adhesive, such as thermoplastic adhesive. The layers of adhesive may contain a dielectric filler material with relatively high thermal conductivity to enhance heat transfer capabilities through the heater assembly. Two heater electrodes protrude from the heater assembly and are not encapsulated by the layers of adhesive and are accessible so that voltage may be applied to the heater element. During use, the heater assembly is disposed between the base of the object and the surface to which it is to be secured. A predetermined low voltage is applied to exposed heater electrodes to activate the heater element, whereupon heat generated by the heater element softens the layers of adhesive. When the voltage is removed, the layers of adhesive solidify and bond the object firmly to the surface. When bonding a ceramic package to a circuit board, for example, the use of layers of adhesive containing dielectric filler material having a relatively high thermal conductivity enhances heat transfer from the package to the circuit board, or to a heat sink upon which it typically mounted. If the object needs to be removed for repair or replacement, voltage is reapplied to the heater electrodes, whereupon the layers of adhesive soften and the object is removed.

Abstract translation: 一种加热器组件和用于将物体（例如陶瓷封装）固定和移除到诸如电路模块或印刷电路板的表面之类的表面的方法。 加热器组件包括诸如箔（膜或线）元件的加热器元件，其嵌入或夹在两层粘合剂之间，例如热塑性粘合剂。 粘合剂层可以包含具有相对高导热性的介电填料，以增强通过加热器组件的传热能力。 两个加热器电极从加热器组件突出并且不被粘合剂层包封，并且是可接近的，使得可以将电压施加到加热器元件。 在使用期间，加热器组件设置在物体的基部和要固定的物体的表面之间。 将预定的低电压施加到暴露的加热器电极以激活加热器元件，由此由加热器元件产生的热量使粘合剂层软化。 当去除电压时，粘合剂层固化并将物体牢固地粘结在表面上。 当将陶瓷封装件接合到电路板时，例如，使用具有相对较高热导率的介电填充材料的粘合剂层可以增强从封装到电路板的热传递，或增加到通常安装在其上的散热器 。 如果物体需要去除以进行修理或更换，则将电压重新施加到加热器电极，由此粘合剂层软化并且物体被去除。

公开(公告)号：US5459642A

公开(公告)日：1995-10-17

申请号：US253980

申请日：1994-06-03

Applicant: D. Joe Stoddard

Inventor： D. Joe Stoddard

IPC: H01G2/06 ,  H01G4/252 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34

CPC classification number: H05K3/3442 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0792 ,  H05K2201/09772 ,  H05K2201/10636 ,  H05K3/0094 ,  Y02P70/611 ,  Y02P70/613

Abstract: A capacitor mounting structure for printed circuit boards wherein the capacitor includes first and second terminals which are connected to first and second conductor planes in the printed circuit board. Three vias are mounted in the printed circuit board in a position to be aligned with the middle of the capacitor. A first conductor pad is mounted underneath one end of the capacitor and includes spaced apart extension portions which electrically attach to the first and third via. A second conductor pad is mounted under the other end of the capacitor and includes a central extension portion which attaches to the second or middle via. In this manner, the region available for generation of parasitic inductance is minimized thereby increasing the operating efficiency of the capacitor.

Abstract translation: 一种用于印刷电路板的电容器安装结构，其中电容器包括连接到印刷电路板中的第一和第二导体平面的第一和第二端子。 三个通孔安装在印刷电路板中与电容器中间对准的位置。 第一导体焊盘安装在电容器的一端下方，并且包括电连接到第一和第三通孔的间隔开的延伸部分。 第二导体焊盘安装在电容器的另一端下方，并且包括连接到第二或中间通孔的中心延伸部分。 以这种方式，可用于产生寄生电感的区域被最小化，从而提高了电容器的工作效率。