公开(公告)号：US20200075561A1

公开(公告)日：2020-03-05

申请号：US16298421

申请日：2019-03-11

申请人： JI HWANG KIM ,  JONGBO SHIM ,  WON IL LEE ,  JANGWOO LEE ,  YOUNG KUN JEE

发明人： JI HWANG KIM ,  JONGBO SHIM ,  WON IL LEE ,  JANGWOO LEE ,  YOUNG KUN JEE

IPC分类号： H01L25/10 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538

摘要： A semiconductor package includes a first substrate, a first semiconductor chip mounted on the first substrate, an interposer substrate and a chip package stacked on the first semiconductor chip, and a first molding layer encapsulating the first semiconductor chip and the chip package. The chip package includes a second semiconductor chip on the interposer substrate. The interposer substrate has a base layer consisting of silicon, a conductive pattern on a top surface of the base layer, and a through-electrode extending through the base layer and connected to the conductive pattern.

公开(公告)号：US20160056113A1

公开(公告)日：2016-02-25

申请号：US14712382

申请日：2015-05-14

申请人： Yeong-Kwon KO ,  Tae-Hyeong KIM ,  Ji-Hwang KIM ,  Sun-Kyoung SEO ,  Tae-Je CHO

发明人： Yeong-Kwon KO ,  Tae-Hyeong KIM ,  Ji-Hwang KIM ,  Sun-Kyoung SEO ,  Tae-Je CHO

IPC分类号： H01L23/544 ,  H01L25/065 ,  H01L23/48

CPC分类号： H01L23/544 ,  B23K26/53 ,  H01L21/76898 ,  H01L25/0657 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2223/5448 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2225/06593

摘要： Semiconductor devices and methods for manufacturing a semiconductor device include a first semiconductor substrate in which a first scribe line region and a first chip region are defined, a first alignment mark inside the first semiconductor substrate and in the first scribe line region so as to be spaced apart from an upper side of the first semiconductor substrate, a second semiconductor substrate on the first semiconductor substrate and in which a second scribe line region and a second chip region are defined, and a second alignment mark inside the second semiconductor substrate and in the second scribe line region so as to be spaced apart from an upper side of the second semiconductor substrate, wherein the second semiconductor substrate is on the first semiconductor substrate so that positions of the first alignment mark and the second alignment mark correspond to each other.

摘要翻译： 用于制造半导体器件的半导体器件和方法包括其中限定第一划线区域和第一芯片区域的第一半导体衬底，第一半导体衬底内部和第一划线区域中的第一对准标记，以便间隔开 除了第一半导体衬底的上侧之外，在第一半导体衬底上限定第二划线区域和第二芯片区域的第二半导体衬底以及第二半导体衬底内部的第二对准标记 切割线区域与第二半导体衬底的上侧隔开，其中第二半导体衬底位于第一半导体衬底上，使得第一对准标记和第二对准标记的位置彼此对应。

公开(公告)号：US20140327150A1

公开(公告)日：2014-11-06

申请号：US14333509

申请日：2014-07-16

申请人： Deok-young JUNG ,  Pil-kyu KANG ,  Byung-lyul PARK ,  Ji-soon PARK ,  Seong-min SON ,  Jin-ho AN ,  Ji-hwang KIM

发明人： Deok-young JUNG ,  Pil-kyu KANG ,  Byung-lyul PARK ,  Ji-soon PARK ,  Seong-min SON ,  Jin-ho AN ,  Ji-hwang KIM

IPC分类号： H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/561 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/9202 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/16145 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.

摘要翻译： 半导体器件包括：基板，包括彼此相对的第一表面和第二表面;延伸穿过基板的通孔电极。 通孔电极具有互连金属层和围绕互连金属层的侧表面的阻挡金属层。 通孔电极的一端在第二表面上方突出。 间隔绝缘层可以设置在通孔电极的外侧壁上。 通孔电极焊盘连接到通孔电极并且在基本平行于第二表面的间隔绝缘层上延伸。 在第二表面上层叠第一氧化硅层和氮化硅层。 第一氧化硅层的厚度大于氮化硅层的厚度。

公开(公告)号：US20120235305A1

公开(公告)日：2012-09-20

申请号：US13420995

申请日：2012-03-15

申请人： Ji-Hwang KIM ,  Sunpil Youn ,  Sangwon Kim ,  Kwang-chul Choi ,  Tae Hong Min

发明人： Ji-Hwang KIM ,  Sunpil Youn ,  Sangwon Kim ,  Kwang-chul Choi ,  Tae Hong Min

IPC分类号： H01L23/522

CPC分类号： H01L21/76898 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49816 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.

摘要翻译： 半导体器件包括具有第一侧和第二侧的基板，使得第一和第二面彼此面对，贯穿基板的通孔塞，绝缘膜衬垫和防污染膜。 绝缘膜衬垫位于通孔插塞和衬底之间，并且绝缘膜衬套相对于第二侧具有凹陷表面。 防污染膜覆盖第二面，防污染膜位于凹陷表面上，并且在通孔插塞和基底之间。

公开(公告)号：US10192855B2

公开(公告)日：2019-01-29

申请号：US14841736

申请日：2015-09-01

申请人： Sunkyoung Seo ,  Chajea Jo ,  Ji Hwang Kim ,  Taeje Cho

发明人： Sunkyoung Seo ,  Chajea Jo ,  Ji Hwang Kim ,  Taeje Cho

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L25/10 ,  H01L23/367 ,  H01L23/13 ,  H01L23/36 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/18

摘要： A semiconductor package is provided. The semiconductor package include a lower semiconductor package including a lower package substrate and a lower semiconductor chip mounted thereon, and an upper semiconductor package provided on the lower semiconductor package to include an upper package substrate and an upper semiconductor chip mounted thereon. The upper package substrate include an upper heat-dissipation pattern, the lower semiconductor chip include a first via connected to the upper heat-dissipation pattern through the lower semiconductor chip, and the first via may provide a pathway for dissipating heat generated in the lower semiconductor chip.

公开(公告)号：US20160133613A1

公开(公告)日：2016-05-12

申请号：US14841736

申请日：2015-09-01

申请人： SUNKYOUNG SEO ,  CHAJEA JO ,  JI HWANG KIM ,  Taeje CHO

发明人： SUNKYOUNG SEO ,  CHAJEA JO ,  JI HWANG KIM ,  Taeje CHO

IPC分类号： H01L25/10 ,  H01L23/367 ,  H01L23/31

CPC分类号： H01L25/105 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/14519 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A semiconductor package is provided. The semiconductor package include a lower semiconductor package including a lower package substrate and a lower semiconductor chip mounted thereon, and an upper semiconductor package provided on the lower semiconductor package to include an upper package substrate and an upper semiconductor chip mounted thereon. The upper package substrate include an upper heat-dissipation pattern, the lower semiconductor chip include a first via connected to the upper heat-dissipation pattern through the lower semiconductor chip, and the first via may provide a pathway for dissipating heat generated in the lower semiconductor chip.

摘要翻译： 提供半导体封装。 半导体封装包括下半导体封装，其包括下封装衬底和安装在其上的下半导体芯片，以及设置在下半导体封装上的上半导体封装，以包括安装在其上的上封装衬底和上半导体芯片。 上封装衬底包括上部散热图案，下半导体芯片包括通过下半导体芯片连接到上部散热图案的第一通孔，并且第一通孔可以提供用于耗散在下半导体中产生的热的路径 芯片。

公开(公告)号：US20120228780A1

公开(公告)日：2012-09-13

申请号：US13422745

申请日：2012-03-16

申请人： Ji Hwang Kim ,  Kwang-Chul Choi ,  Sangwon Kim ,  Tae Hong Min

发明人： Ji Hwang Kim ,  Kwang-Chul Choi ,  Sangwon Kim ,  Tae Hong Min

IPC分类号： H01L23/522

CPC分类号： H01L23/36 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/48 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/525 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/0519 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.

摘要翻译： 提供了一种包括贯通插头的半导体器件及其制造方法。 在半导体器件中，由于在具有突出部和凹部的凸凹结构体的保护膜上配置重新配置的布线图形，因此能够防止漏电流的可靠性提高。 在制造半导体器件的方法中，由于通过使用选择性蚀刻工艺去除保护膜和绝缘膜衬套来暴露通孔结构的端面，所以通孔结构的损坏最小化，从而防止了铜污染 基质。

公开(公告)号：US09893018B2

公开(公告)日：2018-02-13

申请号：US14712382

申请日：2015-05-14

申请人： Yeong-Kwon Ko ,  Tae-Hyeong Kim ,  Ji-Hwang Kim ,  Sun-Kyoung Seo ,  Tae-Je Cho

发明人： Yeong-Kwon Ko ,  Tae-Hyeong Kim ,  Ji-Hwang Kim ,  Sun-Kyoung Seo ,  Tae-Je Cho

IPC分类号： H01L23/544 ,  H01L25/065 ,  B23K26/00 ,  H01L21/768

CPC分类号： H01L23/544 ,  B23K26/53 ,  H01L21/76898 ,  H01L25/0657 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2223/5448 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2225/06593

摘要： Semiconductor devices and methods for manufacturing a semiconductor device include a first semiconductor substrate in which a first scribe line region and a first chip region are defined, a first alignment mark inside the first semiconductor substrate and in the first scribe line region so as to be spaced apart from an upper side of the first semiconductor substrate, a second semiconductor substrate on the first semiconductor substrate and in which a second scribe line region and a second chip region are defined, and a second alignment mark inside the second semiconductor substrate and in the second scribe line region so as to be spaced apart from an upper side of the second semiconductor substrate, wherein the second semiconductor substrate is on the first semiconductor substrate so that positions of the first alignment mark and the second alignment mark correspond to each other.

公开(公告)号：US20180040548A1

公开(公告)日：2018-02-08

申请号：US15468294

申请日：2017-03-24

申请人： JI-HWANG KIM ,  JONG-BO SHIM ,  CHA-JEA JO ,  WON-IL LEE

发明人： JI-HWANG KIM ,  JONG-BO SHIM ,  CHA-JEA JO ,  WON-IL LEE

IPC分类号： H01L23/498 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31

CPC分类号： H01L23/49838 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/09 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06586

摘要： A semiconductor package includes a substrate, a rewiring layer, a plurality of semiconductor chip stack structures, and a second semiconductor chip. The rewiring layer is disposed on an upper surface of the substrate. The rewiring layer includes a concave portion. The semiconductor chip stack structures include a plurality of first semiconductor chips. The first semiconductor chips are disposed on the rewiring layer. The first semiconductor chips are spaced apart from each other in a horizontal direction. The second semiconductor chip is disposed within the concave portion. The second semiconductor chip is configured to electrically connect each of the plurality of semiconductor chip stack structures to each other.

公开(公告)号：US09449930B2

公开(公告)日：2016-09-20

申请号：US14813084

申请日：2015-07-29

申请人： Tae-Hyeong Kim ,  Yeong-Kwon Ko ,  Ji-Hwang Kim ,  Sun-Kyoung Seo ,  Tae-Je Cho

发明人： Tae-Hyeong Kim ,  Yeong-Kwon Ko ,  Ji-Hwang Kim ,  Sun-Kyoung Seo ,  Tae-Je Cho

IPC分类号： H01L23/04 ,  H01L23/48 ,  H01L23/52 ,  H01L21/44 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00

CPC分类号： H01L24/06 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/034 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06 ,  H01L2224/0605 ,  H01L2224/06181 ,  H01L2224/065 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/119 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1405 ,  H01L2224/14181 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2224/05624 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/0347 ,  H01L2224/113 ,  H01L2924/00

摘要： A semiconductor device, a semiconductor package, and a package stack structure include a semiconductor substrate, a first bonding pad disposed on a first surface of the semiconductor substrate, and a first pillar disposed on the first bonding pad. An upper surface of the first pillar has a concave shape. Side surfaces of the first pillar are substantially planar.

摘要翻译： 半导体器件，半导体封装和封装堆叠结构包括半导体衬底，设置在半导体衬底的第一表面上的第一焊盘和设置在第一焊盘上的第一柱。 第一支柱的上表面具有凹形。 第一柱的侧表面基本上是平面的。