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    Thermally enhanced semiconductor device having exposed backside and method for making the same
    3.
    发明授权
    Thermally enhanced semiconductor device having exposed backside and method for making the same 失效
    具有暴露背面的热增强型半导体器件及其制造方法

    公开(公告)号：US5450283A

    公开(公告)日：1995-09-12

    申请号：US179892

    申请日：1994-01-10

    申请人： Paul T. Lin ,  Michael B. McShane

    发明人： Paul T. Lin ,  Michael B. McShane

    IPC分类号： H01L21/56 ,  H01L21/68 ,  H01L23/12 ,  H01L23/28 ,  H01L23/31 ,  H01L23/498 ,  H05K7/20

    CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01014 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/18161

    摘要： A thermally enhanced semiconductor device (10) having an exposed backside (22) is described. In one embodiment, a PC board substrate (12) is provided having a pattern of conductive traces (14) on both upper and lower surfaces of the substrate. Electrical continuity is maintained between the two surfaces with conductive vias (16). A semiconductor die (18) is flip-mounted to the upper surface of the substrate. Solder bumps (26) electrically connect the die to the conductive traces, and an underfill (28) couples the active side (20) of the die to the upper surface of the substrate. A package body (40) is formed around the perimeter (24) of the die leaving the inactive backside exposed for enhanced thermal dissipation. The inactive backside can also be coupled to a heat sink for increased thermal dissipation. A plurality of solder balls (42) electrically connected to the conductive traces is attached to the lower surface of the substrate.

    摘要翻译： 描述具有暴露背面（22）的热增强半导体器件（10）。 在一个实施例中，提供在基板的上表面和下表面上具有导电迹线（14）图案的PC板基板（12）。 在具有导电通孔（16）的两个表面之间保持电连续性。 半导体管芯（18）被翻转安装到衬底的上表面。 焊接凸块（26）将管芯电连接到导电迹线，底部填充物（28）将管芯的有效侧（20）连接到衬底的上表面。 围绕模具的周边（24）形成包装体（40），留下非活性背面，以增强散热。 不活动的背面还可以耦合到散热器以增加散热。 电连接到导电迹线的多个焊球（42）附接到基板的下表面。

    Method of transferring solder balls onto a semiconductor device
    4.
    发明授权
    Method of transferring solder balls onto a semiconductor device 失效
    将焊球转移到半导体器件上的方法

    公开(公告)号：US5219117A

    公开(公告)日：1993-06-15

    申请号：US786629

    申请日：1991-11-01

    申请人： Paul T. Lin

    发明人： Paul T. Lin

    IPC分类号： B23K35/02 ,  H01L21/60 ,  H01L23/485 ,  H05K3/34

    CPC分类号： H05K3/3478 ,  B23K35/0244 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K2201/10734 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/043

    摘要： Solder balls are transferred onto a semiconductor device (50), for example a flip chip semiconductor device, without using solder evaporation techniques. In one form, pre-formed solder balls (36) are placed in recesses (32) formed in a transfer substrate (30). A semiconductor die (12) having a plurality of bond pads (14) is positioned with respect to the transfer substrate so that the solder balls are aligned to, and in contact with, the bond pads. The solder balls are then reflowed to form a metallurgical bond to the bond pads. One embodiment of the invention utilizes a transfer substrate made of silicon so that the coefficient of thermal expansion of the transfer substrate will closely match that of the semiconductor die, thereby minimizing solder ball alignment variances. Use of silicon as a transfer substrate material also allows the recesses to easily be made non-wettable by conventional silicon oxidation techniques.

    摘要翻译： 将焊球转移到半导体器件（50）上，例如倒装芯片半导体器件，而不使用焊料蒸发技术。 在一种形式中，预形成的焊球（36）被放置在形成在转印衬底（30）中的凹槽（32）中。 具有多个接合焊盘（14）的半导体管芯（12）相对于转移衬底定位，使得焊球与接合焊盘对准并与其接触。 然后将焊球回流以形成与接合焊盘的冶金结合。 本发明的一个实施例使用由硅制成的转移衬底，使得转印衬底的热膨胀系数将与半导体管芯的热膨胀系数相匹配，从而最小化焊球对准方差。 使用硅作为转移衬底材料也允许凹陷容易地被常规的硅氧化技术制成不可润湿的。

    Multiple electronic devices within a single carrier structure
    5.
    发明授权
    Multiple electronic devices within a single carrier structure 失效
    单个载体结构内的多个电子设备

    公开(公告)号：US5036381A

    公开(公告)日：1991-07-30

    申请号：US538629

    申请日：1990-06-15

    申请人： Paul T. Lin

    发明人： Paul T. Lin

    IPC分类号： H01L21/48 ,  H01L21/56

    CPC分类号： H01L21/4842 ,  H01L21/565 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/14 ,  H01L2924/181

    摘要： The disclosed invention comprises multiple semiconductor devices within a single carrier structure. In accordance with one embodiment of the invention, a plurality of semiconductor die are coupled to the leads of a leadframe and are encapsulated by individual package bodies. A carrier structure is formed which encircles all of the die and encapsulates portions of the distal ends of the leads. The extreme distal portions of the leads extend through the carrier to form contact points which are used to access the semiconductor die. By having multiple devices within a single carrier, productivity is improved and costs associated with leadframe and carrier structure materials are reduced.

    摘要翻译： 所公开的发明包括在单载波结构内的多个半导体器件。 根据本发明的一个实施例，多个半导体管芯耦合到引线框架的引线并被单个封装体封装。 形成一个载体结构，其包围所有的管芯并且封装引线的远端部分。 引线的极端部分延伸穿过载体以形成用于接近半导体管芯的接触点。 通过在单个载体内具有多个装置，提高了生产效率并降低了与引线框和载体结构材料相关的成本。

    Direct-chip-attach (DCA) multiple chip module (MCM) with repair-chip ready site to simplify assembling and testing process
    10.
    发明授权
    Direct-chip-attach (DCA) multiple chip module (MCM) with repair-chip ready site to simplify assembling and testing process 有权
    直接芯片连接（DCA）多芯片模块（MCM）具有修复芯片就绪现场，简化了组装和测试过程

    公开(公告)号：US06301121B1

    公开(公告)日：2001-10-09

    申请号：US09287218

    申请日：1999-04-05

    申请人： Paul T. Lin

    发明人： Paul T. Lin

    IPC分类号： H05K702

    CPC分类号： H01L23/5382 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/0292 ,  H05K1/0298 ,  H05K2201/10545 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00014

    摘要： The present invention comprises a single-substrate multiple chip module (MCM) assembly. The MCM assembly includes a repair-package-site ready MCM board having a top surface and a bottom surface, the top surface further includes a plurality of chip connection trace lines include a chip-select line. The MCM assembly further includes a plurality of bare integrated circuit (IC) chips mounted directly on the top surface of the MCM board each chip connected to the plurality of chip connection trace lines on the top surface. The repair-package-site ready MCM board further includes at least a repair-package-site disposed on the bottom surface having a plurality of connection terminals arranged according to a standard repair packaged-chip footprint. Each of the connection terminals is connected to a via connector disposed in the MCM board for electrically connecting to the conductive trace lines on the top surface. The MCM assembly further includes a chip-select jumper means for disconnecting the chip select line for one of the bare IC chips as a disconnected chip and to connect to one of the repair-package-site provided for mounting a repair packaged-chip onto the bottom surface.

    摘要翻译： 本发明包括单片多芯片模块（MCM）组件。 MCM组件包括具有顶表面和底表面的修复包装现场准备的MCM板，顶表面还包括多个芯片连接迹线，包括芯片选择线。 MCM组件还包括直接安装在MCM板的顶表面上的多个裸芯片集成电路芯片，每个芯片连接到顶表面上的多个芯片连接迹线。 修理包装现场准备的MCM板还包括至少设置在底表面上的修理包装部位，其具有根据标准修复封装芯片占用面排列的多个连接端子。 每个连接端子连接到设置在MCM板中的通孔连接器，用于电连接到顶表面上的导电迹线。 MCM组件还包括芯片选择跳线装置，用于断开作为断开的芯片的裸IC芯片之一的芯片选择线，并连接到用于将修复封装芯片安装到所述修复包装部位上的一个 底面。