公开(公告)号：US08664760B2

公开(公告)日：2014-03-04

申请号：US13343582

申请日：2012-01-04

Applicant: Chen-Hua Yu ,  Shin-Puu Jeng ,  Shang-Yun Hou ,  Cheng-Chieh Hsieh ,  Kuo-Ching Hsu ,  Ying-Ching Shih ,  Po-Hao Tsai ,  Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chen-Hua Yu ,  Shin-Puu Jeng ,  Shang-Yun Hou ,  Cheng-Chieh Hsieh ,  Kuo-Ching Hsu ,  Ying-Ching Shih ,  Po-Hao Tsai ,  Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/11 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/04 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10145 ,  H01L2224/10156 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11831 ,  H01L2224/13017 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/13578 ,  H01L2224/13686 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/3651 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/049 ,  H01L2924/053 ,  H01L2924/00

Abstract: A device includes a top dielectric layer having a top surface. A metal pillar has a portion over the top surface of the top dielectric layer. A non-wetting layer is formed on a sidewall of the metal pillar, wherein the non-wetting layer is not wettable to the molten solder. A solder region is disposed over and electrically coupled to the metal pillar.

公开(公告)号：US20130233601A1

公开(公告)日：2013-09-12

申请号：US13412958

申请日：2012-03-06

Applicant: Chin-Fu KAO ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

Inventor： Chin-Fu KAO ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

IPC: H05K1/09 ,  H05K1/00

CPC classification number: H01L24/14 ,  H01L22/32 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14515 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

Abstract: A surface metal wiring structure for a substrate includes one or more functional μbumps formed of a first metal and an electrical test pad formed of a second metal for receiving an electrical test probe and electrically connected to the one or more functional μbumps. The surface metal wiring structure also includes a plurality of sacrificial μbumps formed of the first metal that are electrically connected to the electrical test pads, where the sacrificial μbumps are positioned closer to the electrical test pad than the one or more functional μbumps.

Abstract translation: 用于基板的表面金属布线结构包括由第一金属形成的一个或多个功能性微片和由用于接收电测试探针的第二金属形成的电测试焊盘，并电连接到所述一个或多个功能性微波。 表面金属布线结构还包括多个由第一金属形成的牺牲片，其电连接到电测试焊盘，其中牺牲微片比一个或多个功能性微片更靠近电测试垫定位。

公开(公告)号：US20130119382A1

公开(公告)日：2013-05-16

申请号：US13297845

申请日：2011-11-16

Applicant: Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L23/544 ,  H01L21/28

CPC classification number: H01L22/32

Abstract: A system and method for plating a contact is provided. An embodiment comprises forming protective layers over a contact and a test pad, and then selectively removing the protective layer over the contact without removing the protective layer over the test pad. With the protective layer still on the test pad, a conductive layer may be plated onto the contact without plating it onto the test pad. After the contact has been plated, the protective layer over the contact may be removed.

Abstract translation: 提供了一种用于电镀触点的系统和方法。 一个实施例包括在触点和测试垫上形成保护层，然后在触头上选择性地去除保护层，而不需要在测试垫上移除保护层。 在保护层仍在测试焊盘上的情况下，可以将导电层电镀到触点上，而不将其覆盖在测试焊盘上。 接触电镀后，触点上的保护层可以被去除。

公开(公告)号：US20120306073A1

公开(公告)日：2012-12-06

申请号：US13343582

申请日：2012-01-04

Applicant: Chen-Hua Yu ,  Shin-Puu Jeng ,  Shang-Yun Hou ,  Cheng-Chieh Hsieh ,  Kuo-Ching Hsu ,  Ying-Ching Shih ,  Po-Hoa Tsai ,  Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chen-Hua Yu ,  Shin-Puu Jeng ,  Shang-Yun Hou ,  Cheng-Chieh Hsieh ,  Kuo-Ching Hsu ,  Ying-Ching Shih ,  Po-Hoa Tsai ,  Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L23/485 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/04 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10145 ,  H01L2224/10156 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11831 ,  H01L2224/13017 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/13578 ,  H01L2224/13686 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/3651 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/049 ,  H01L2924/053 ,  H01L2924/00

Abstract: A device includes a top dielectric layer having a top surface. A metal pillar has a portion over the top surface of the top dielectric layer. A non-wetting layer is formed on a sidewall of the metal pillar, wherein the non-wetting layer is not wettable to the molten solder. A solder region is disposed over and electrically coupled to the metal pillar.

Abstract translation: 一种器件包括具有顶表面的顶部电介质层。 金属柱在顶部介电层的顶表面上具有一部分。 在金属柱的侧壁上形成非润湿层，其中非润湿层不能熔化到熔融焊料上。 焊接区域设置在金属柱上并电耦合到金属柱。

公开(公告)号：US08759118B2

公开(公告)日：2014-06-24

申请号：US13297845

申请日：2011-11-16

Applicant: Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L21/66 ,  H01L23/58

CPC classification number: H01L22/32

Abstract: A system and method for plating a contact is provided. An embodiment comprises forming protective layers over a contact and a test pad, and then selectively removing the protective layer over the contact without removing the protective layer over the test pad. With the protective layer still on the test pad, a conductive layer may be plated onto the contact without plating it onto the test pad. After the contact has been plated, the protective layer over the contact may be removed.

Abstract translation: 提供了一种用于电镀触点的系统和方法。 一个实施例包括在触点和测试垫上形成保护层，然后在触头上选择性地去除保护层，而不需要在测试垫上移除保护层。 在保护层仍在测试焊盘上的情况下，可以将导电层电镀到触点上，而不将其覆盖在测试焊盘上。 接触电镀后，触点上的保护层可以被去除。

公开(公告)号：US08953336B2

公开(公告)日：2015-02-10

申请号：US13412958

申请日：2012-03-06

Applicant: Chin-Fu Kao ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

Inventor： Chin-Fu Kao ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

IPC: H05K7/10

CPC classification number: H01L24/14 ,  H01L22/32 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14515 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

Abstract: A surface metal wiring structure for a substrate includes one or more functional μbumps formed of a first metal and an electrical test pad formed of a second metal for receiving an electrical test probe and electrically connected to the one or more functional μbumps. The surface metal wiring structure also includes a plurality of sacrificial μbumps formed of the first metal that are electrically connected to the electrical test pads, where the sacrificial μbumps are positioned closer to the electrical test pad than the one or more functional μbumps.

Abstract translation: 用于基板的表面金属布线结构包括由第一金属形成的一个或多个功能性μ凸块和由用于接收电测试探针并电连接到所述一个或多个功能性μ凸起的第二金属形成的电测试垫。 表面金属布线结构还包括由第一金属形成的多个牺牲μ凸块，其电连接到电测试焊盘，其中牺牲μ凸块位于比一个或多个功能性μ凸块更靠近电测试垫的位置。

公开(公告)号：US08536573B2

公开(公告)日：2013-09-17

申请号：US13310448

申请日：2011-12-02

Applicant: Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L23/58 ,  H01L23/48

CPC classification number: H01L22/32 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/11464 ,  H01L2224/11825 ,  H01L2224/13006 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2224/05552

Abstract: A system and method for plating a contact connected to a test pad is provided. An embodiment comprises inserting a blocking material into vias between the contact and the test pad. In another embodiment a blocking structure may be inserted between the contact and the test pad. In yet another embodiment a blocking layer may be inserted into a contact stack. Once the blocking material, the blocking structure, or the blocking layer have been formed, the contact may be plated, with the blocking material, the blocking structure, or the blocking layer reducing or preventing degradation of the test pad due to galvanic effects.

Abstract translation: 提供了一种用于电镀连接到测试垫的触点的系统和方法。 一个实施例包括将阻塞材料插入到接触件和测试垫之间的通孔中。 在另一个实施例中，阻挡结构可以插入在接触件和测试垫之间。 在另一个实施例中，阻挡层可以插入到触点叠层中。 一旦已经形成了阻挡材料，阻挡结构或阻挡层，则可以用阻挡材料，阻挡结构或阻挡层电镀接触，从而降低或防止由于电偶效应导致的测试焊盘的劣化。

公开(公告)号：US20130140563A1

公开(公告)日：2013-06-06

申请号：US13310448

申请日：2011-12-02

Applicant: Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

Inventor： Chin-Fu Kao ,  Cheng-Lin Huang ,  Jing-Cheng Lin

IPC: H01L23/522

CPC classification number: H01L22/32 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/11464 ,  H01L2224/11825 ,  H01L2224/13006 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2224/05552

Abstract: A system and method for plating a contact connected to a test pad is provided. An embodiment comprises inserting a blocking material into vias between the contact and the test pad. In another embodiment a blocking structure may be inserted between the contact and the test pad. In yet another embodiment a blocking layer may be inserted into a contact stack. Once the blocking material, the blocking structure, or the blocking layer have been formed, the contact may be plated, with the blocking material, the blocking structure, or the blocking layer reducing or preventing degradation of the test pad due to galvanic effects.

公开(公告)号：US08962392B2

公开(公告)日：2015-02-24

申请号：US13418868

申请日：2012-03-13

Applicant: Chin-Fu Kao ,  Jing-Cheng Lin ,  Jui-Pin Hung ,  Szu Wei Lu

Inventor： Chin-Fu Kao ,  Jing-Cheng Lin ,  Jui-Pin Hung ,  Szu Wei Lu

IPC: H01L21/50 ,  H01L21/56

CPC classification number: H01L21/563 ,  H01L21/568 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0655 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/12042 ,  H01L2924/157 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method includes bonding a carrier over a top die. The method further includes curing an underfill disposed between a substrate and the top die. The method further includes applying a force over the carrier during the curing. The method further includes removing the carrier from the top die.

Abstract translation: 一种方法包括将载体粘合在顶模上。 该方法还包括固化设置在基底和顶模之间的底部填充物。 该方法还包括在固化期间在载体上施加力。 该方法还包括从顶模移除载体。

公开(公告)号：US09064879B2

公开(公告)日：2015-06-23

申请号：US13228244

申请日：2011-09-08

Applicant: Jui-Pin Hung ,  Jing-Cheng Lin ,  Nai-Wei Liu ,  Chin-Chuan Chang ,  Chen-Hua Yu ,  Shin-Puu Jeng ,  Chin-Fu Kao ,  Yi-Chao Mao ,  Szu Wei Lu

Inventor： Jui-Pin Hung ,  Jing-Cheng Lin ,  Nai-Wei Liu ,  Chin-Chuan Chang ,  Chen-Hua Yu ,  Shin-Puu Jeng ,  Chin-Fu Kao ,  Yi-Chao Mao ,  Szu Wei Lu

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/56 ,  H01L23/14 ,  H01L23/498 ,  H01L23/538 ,  H01L21/683 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05099 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11002 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Packaging methods and structures for semiconductor devices that utilize a novel die attach film are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a carrier wafer and forming a die attach film (DAF) that includes a polymer over the carrier wafer. A plurality of dies is attached to the DAF, and the plurality of dies is packaged. At least the carrier wafer is removed from the packaged dies, and the packaged dies are singulated.

Abstract translation: 公开了利用新颖的芯片附着膜的半导体器件的封装方法和结构。 在一个实施例中，封装半导体器件的方法包括提供载体晶片并且在载体晶片上形成包括聚合物的管芯附着膜（DAF）。 多个模具附接到DAF，并且多个管芯被封装。 至少载体晶片从封装的管芯移除，并且封装的管芯被切割。