公开(公告)号：US20100096754A1

公开(公告)日：2010-04-22

申请号：US12588477

申请日：2009-10-16

申请人： Jonggi Lee ,  SunWon Kang ,  Young Lyong Kim ,  Jongho Lee ,  Chul-Yong Jang ,  Minill Kim ,  Eunchul Ahn ,  Kwang Yong Lee ,  Seungduk Baek ,  Ji-Seok Hong

发明人： Jonggi Lee ,  SunWon Kang ,  Young Lyong Kim ,  Jongho Lee ,  Chul-Yong Jang ,  Minill Kim ,  Eunchul Ahn ,  Kwang Yong Lee ,  Seungduk Baek ,  Ji-Seok Hong

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L24/13 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/06 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/1191 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2924/00

摘要： Provided is a semiconductor package, a semiconductor module and a method for fabricating the semiconductor package. The method provides a substrate including a bonding pad. The method forms a dielectric layer for exposing the bonding pad on the substrate. The method forms a redistribution line which is electrically connected to the bonding pad, on the dielectric layer. The method forms an external terminal which is electrically connected to the bonding pad without using a solder mask which limits a position of the external terminal, on the redistribution line.

摘要翻译： 提供半导体封装，半导体模块和制造半导体封装的方法。 该方法提供了包括接合焊盘的衬底。 该方法形成用于使衬底上的焊盘露出的介电层。 该方法形成在电介质层上电连接到接合焊盘的再分配线。 该方法形成外部端子，该外部端子电连接到接合焊盘，而不使用在再分配线上限制外部端子的位置的焊接掩模。

公开(公告)号：US08815731B2

公开(公告)日：2014-08-26

申请号：US13174959

申请日：2011-07-01

申请人： Young Lyong Kim ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/116 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17051 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.

摘要翻译： 半导体封装及其制造方法。 所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘， 将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。 第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

公开(公告)号：US20120001329A1

公开(公告)日：2012-01-05

申请号：US13174959

申请日：2011-07-01

申请人： Young Lyong KIM ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

发明人： Young Lyong KIM ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/116 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17051 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.

摘要翻译： 半导体封装及其制造方法。 所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘， 将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。 第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

公开(公告)号：US08053881B2

公开(公告)日：2011-11-08

申请号：US12586565

申请日：2009-09-24

申请人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

IPC分类号： H01L23/02

CPC分类号： H01L23/49827 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected.

摘要翻译： 半导体封装包括包括至少一个第一半导体芯片的第一封装; 包括外部连接端子和至少一个第二半导体芯片的第二封装，所述第二封装堆叠在所述第一封装上; 以及设置在第一和第二封装之间并且连接到外部连接端子以将第一和第二封装彼此电连接的插入器。 插入器包括具有暴露端部的中间连接器，第二封装经由外部连接端子电连接到该外部端部，以及比第一封装电连接到的暴露端部低的突出端部。

公开(公告)号：US20100072593A1

公开(公告)日：2010-03-25

申请号：US12586565

申请日：2009-09-24

申请人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

IPC分类号： H01L23/495

CPC分类号： H01L23/49827 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected.

摘要翻译： 半导体封装包括包括至少一个第一半导体芯片的第一封装; 包括外部连接端子和至少一个第二半导体芯片的第二封装，所述第二封装堆叠在所述第一封装上; 以及设置在第一和第二封装之间并且连接到外部连接端子以将第一和第二封装彼此电连接的插入器。 插入器包括具有暴露端部的中间连接器，第二封装经由外部连接端子电连接到该外部端部，以及比第一封装电连接到的暴露端部低的突出端部。

公开(公告)号：US20120091579A1

公开(公告)日：2012-04-19

申请号：US13204188

申请日：2011-08-05

申请人： Jin-Woo Park ,  Eunchul Ahn

发明人： Jin-Woo Park ,  Eunchul Ahn

IPC分类号： H01L23/498 ,  H01L23/488

CPC分类号： H01L23/49816 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2732 ,  H01L2224/29012 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83855 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/05552

摘要： A semiconductor package includes a wiring board including an upper connection pad provided on a first surface and a lower connection pad provided on a second surface opposite to the first surface, a semiconductor chip having a bonding pad area in which a bonding pad is provided and an adhesive area except the bonding pad area, and being mounted on the first surface of the wiring board in a flip-chip manner such that the bonding pad is electrically connected to the upper connection pad, a first molding layer provided between the adhesive area of the semiconductor chip and the first surface of the wiring board, and a second molding layer provided between the bonding pad area of the semiconductor chip and the first area of the wiring board while covering the first surface of the wiring board and the semiconductor chip. The first molding layer has a lower modulus than the second molding layer.

摘要翻译： 一种半导体封装，包括：布线板，包括设置在第一表面上的上连接焊盘和设置在与第一表面相对的第二表面上的下连接焊盘;半导体芯片，具有焊盘区域，其中提供焊盘， 粘合区域，并且以倒装芯片方式安装在布线板的第一表面上，使得焊盘与上连接焊盘电连接;第一模制层，设置在焊接区域的粘合区域之间， 半导体芯片和布线板的第一表面，以及第二模塑层，其设置在半导体芯片的焊盘区域和布线板的第一区域之间，同时覆盖布线板和半导体芯片的第一表面。 第一成型层的模量比第二成型层低。

公开(公告)号：US20110215444A1

公开(公告)日：2011-09-08

申请号：US13042855

申请日：2011-03-08

申请人： Jin-Woo PARK ,  Hwan-Sik Lim ,  Eunchul Ahn

发明人： Jin-Woo PARK ,  Hwan-Sik Lim ,  Eunchul Ahn

IPC分类号： H01L23/58 ,  H01L23/48

CPC分类号： H01L21/50 ,  H01L21/563 ,  H01L23/48 ,  H01L23/58 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/00012

摘要： A package substrate, a semiconductor package having the same, and a method for fabricating the semiconductor package. The semiconductor package includes a semiconductor chip, a package substrate, and a molding layer. The package substrate provides a region mounted with the semiconductor chip. The molding layer is configured to mold the semiconductor chip. The package substrate includes a first opening portion that provides an open region connected electrically to the semiconductor chip and extends beyond sides of the semiconductor chip to be electrically connected to the semiconductor chip.

摘要翻译： 封装基板，具有该封装基板的半导体封装以及半导体封装的制造方法。 半导体封装包括半导体芯片，封装基板和模制层。 封装衬底提供安装有半导体芯片的区域。 模制层被配置成模制半导体芯片。 封装基板包括第一开口部分，该第一开口部分提供与半导体芯片电连接的开放区域，并且延伸超过半导体芯片的两侧以与半导体芯片电连接。

公开(公告)号：US08497569B2

公开(公告)日：2013-07-30

申请号：US13042855

申请日：2011-03-08

申请人： Jin-Woo Park ,  Hwan-Sik Lim ,  Eunchul Ahn

发明人： Jin-Woo Park ,  Hwan-Sik Lim ,  Eunchul Ahn

IPC分类号： H01L21/311

CPC分类号： H01L21/50 ,  H01L21/563 ,  H01L23/48 ,  H01L23/58 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/00012

摘要： A package substrate, a semiconductor package having the same, and a method for fabricating the semiconductor package. The semiconductor package includes a semiconductor chip, a package substrate, and a molding layer. The package substrate provides a region mounted with the semiconductor chip. The molding layer is configured to mold the semiconductor chip. The package substrate includes a first opening portion that provides an open region connected electrically to the semiconductor chip and extends beyond sides of the semiconductor chip to be electrically connected to the semiconductor chip.

摘要翻译： 封装基板，具有该封装基板的半导体封装以及半导体封装的制造方法。 半导体封装包括半导体芯片，封装基板和模制层。 封装衬底提供安装有半导体芯片的区域。 模制层被配置成模制半导体芯片。 封装基板包括第一开口部分，该第一开口部分提供与半导体芯片电连接的开放区域，并且延伸超过半导体芯片的两侧以与半导体芯片电连接。

公开(公告)号：US20110186220A1

公开(公告)日：2011-08-04

申请号：US13009390

申请日：2011-01-19

申请人： Eunchul Ahn ,  Yun-Rae Cho ,  TaeSung Yoon ,  Youngmin Lee

发明人： Eunchul Ahn ,  Yun-Rae Cho ,  TaeSung Yoon ,  Youngmin Lee

IPC分类号： B32B37/00

CPC分类号： B32B37/00 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/48095 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/14 ,  Y10T156/1089 ,  Y10T428/24174 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/4554

摘要： Provided is an apparatus for manufacturing a bonding structure, a bonding structure, and a method of fabricating the same. The bonding structure includes a pad including an upper surface with a first area, a ball adhered to the upper surface of the pad, and a wire extending from the ball. An adhesion surface of the ball adhered to the pad may have substantially the same shape as that of the upper surface of the pad.

摘要翻译： 提供一种用于制造接合结构的装置，接合结构及其制造方法。 接合结构包括：垫，其包括具有第一区域的上表面，粘附到垫的上表面的球体，以及从球体延伸的丝线。 粘附到垫的球的粘合表面可以具有与垫的上表面基本相同的形状。

公开(公告)号：US20100190333A1

公开(公告)日：2010-07-29

申请号：US12691780

申请日：2010-01-22

申请人： Myeong-Soon PARK ,  Eunchul Ahn ,  Hyunsoo Chung ,  Seokho Kim ,  Do-Yeon Choi ,  Jinho Chun

发明人： Myeong-Soon PARK ,  Eunchul Ahn ,  Hyunsoo Chung ,  Seokho Kim ,  Do-Yeon Choi ,  Jinho Chun

IPC分类号： H01L21/60

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13006 ,  H01L2224/13014 ,  H01L2224/13076 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A method of forming a connection terminal may include preparing a substrate, forming a first conductor of a tube shape having an opened upper portion on the substrate, forming a second conductor on the first conductor, and annealing the second conductor so that a portion of the second conductor extends in an internal space of the first conductor through the opened upper portion.

摘要翻译： 形成连接端子的方法可以包括：准备衬底，在衬底上形成具有开口上部的管状第一导体，在第一导体上形成第二导体，并使第二导体退火， 第二导体通过开口的上部在第一导体的内部空间中延伸。