公开(公告)号：US20100096754A1

公开(公告)日：2010-04-22

申请号：US12588477

申请日：2009-10-16

申请人： Jonggi Lee ,  SunWon Kang ,  Young Lyong Kim ,  Jongho Lee ,  Chul-Yong Jang ,  Minill Kim ,  Eunchul Ahn ,  Kwang Yong Lee ,  Seungduk Baek ,  Ji-Seok Hong

发明人： Jonggi Lee ,  SunWon Kang ,  Young Lyong Kim ,  Jongho Lee ,  Chul-Yong Jang ,  Minill Kim ,  Eunchul Ahn ,  Kwang Yong Lee ,  Seungduk Baek ,  Ji-Seok Hong

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L24/13 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/06 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/1191 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2924/00

摘要： Provided is a semiconductor package, a semiconductor module and a method for fabricating the semiconductor package. The method provides a substrate including a bonding pad. The method forms a dielectric layer for exposing the bonding pad on the substrate. The method forms a redistribution line which is electrically connected to the bonding pad, on the dielectric layer. The method forms an external terminal which is electrically connected to the bonding pad without using a solder mask which limits a position of the external terminal, on the redistribution line.

摘要翻译： 提供半导体封装，半导体模块和制造半导体封装的方法。 该方法提供了包括接合焊盘的衬底。 该方法形成用于使衬底上的焊盘露出的介电层。 该方法形成在电介质层上电连接到接合焊盘的再分配线。 该方法形成外部端子，该外部端子电连接到接合焊盘，而不使用在再分配线上限制外部端子的位置的焊接掩模。

公开(公告)号：US08053881B2

公开(公告)日：2011-11-08

申请号：US12586565

申请日：2009-09-24

申请人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

IPC分类号： H01L23/02

CPC分类号： H01L23/49827 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected.

摘要翻译： 半导体封装包括包括至少一个第一半导体芯片的第一封装; 包括外部连接端子和至少一个第二半导体芯片的第二封装，所述第二封装堆叠在所述第一封装上; 以及设置在第一和第二封装之间并且连接到外部连接端子以将第一和第二封装彼此电连接的插入器。 插入器包括具有暴露端部的中间连接器，第二封装经由外部连接端子电连接到该外部端部，以及比第一封装电连接到的暴露端部低的突出端部。

公开(公告)号：US08815731B2

公开(公告)日：2014-08-26

申请号：US13174959

申请日：2011-07-01

申请人： Young Lyong Kim ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/116 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17051 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.

摘要翻译： 半导体封装及其制造方法。 所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘， 将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。 第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

公开(公告)号：US20120001329A1

公开(公告)日：2012-01-05

申请号：US13174959

申请日：2011-07-01

申请人： Young Lyong KIM ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

发明人： Young Lyong KIM ,  Hyeongseob Kim ,  Jongho Lee ,  Eunchul Ahn

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/116 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14517 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17051 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.

摘要翻译： 半导体封装及其制造方法。 所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘， 将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。 第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

公开(公告)号：US20100072593A1

公开(公告)日：2010-03-25

申请号：US12586565

申请日：2009-09-24

申请人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

发明人： Young Lyong Kim ,  Jongho Lee ,  Cheul-Joong Youn ,  Eunchul Ahn

IPC分类号： H01L23/495

CPC分类号： H01L23/49827 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected.

摘要翻译： 半导体封装包括包括至少一个第一半导体芯片的第一封装; 包括外部连接端子和至少一个第二半导体芯片的第二封装，所述第二封装堆叠在所述第一封装上; 以及设置在第一和第二封装之间并且连接到外部连接端子以将第一和第二封装彼此电连接的插入器。 插入器包括具有暴露端部的中间连接器，第二封装经由外部连接端子电连接到该外部端部，以及比第一封装电连接到的暴露端部低的突出端部。

公开(公告)号：US08970046B2

公开(公告)日：2015-03-03

申请号：US13546163

申请日：2012-07-11

申请人： Young Lyong Kim ,  Taehoon Kim ,  Jongho Lee ,  Chul-Yong Jang

发明人： Young Lyong Kim ,  Taehoon Kim ,  Jongho Lee ,  Chul-Yong Jang

IPC分类号： H01L25/07 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L21/76802 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24146 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/92144 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips.

摘要翻译： 半导体封装可以包括：衬底，其包括衬底连接端子，堆叠在衬底上并具有芯片连接端子的至少一个半导体芯片，覆盖衬底和至少一个半导体芯片的至少一部分的第一绝缘层和/ 或穿透第一绝缘层的互连以将衬底连接端子连接到芯片连接端子。 半导体封装可以包括堆叠的半导体芯片，半导体芯片的边缘部分构成阶梯结构，并且每个半导体芯片包括芯片连接端子; 至少一个绝缘层，至少覆盖半导体芯片的边缘部分; 和/或穿透至少一个绝缘层的互连以连接到每个半导体芯片的芯片连接端子。

公开(公告)号：US20130020720A1

公开(公告)日：2013-01-24

申请号：US13546163

申请日：2012-07-11

申请人： Young Lyong Kim ,  Taehoon Kim ,  Jongho Lee ,  Chul-Yong Jang

发明人： Young Lyong Kim ,  Taehoon Kim ,  Jongho Lee ,  Chul-Yong Jang

IPC分类号： H01L25/07

CPC分类号： H01L21/76802 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24146 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/92144 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips.

公开(公告)号：US08680685B2

公开(公告)日：2014-03-25

申请号：US12788901

申请日：2010-05-27

申请人： Hwan-Sik Lim ,  Sunwon Kang ,  Jongho Lee

发明人： Hwan-Sik Lim ,  Sunwon Kang ,  Jongho Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/0603 ,  H01L2224/06515 ,  H01L2224/13025 ,  H01L2224/13028 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.

公开(公告)号：US08246334B2

公开(公告)日：2012-08-21

申请号：US13221639

申请日：2011-08-30

申请人： Jongho Lee

发明人： Jongho Lee

IPC分类号： B29C45/22

CPC分类号： B29C45/1635 ,  B29C45/27 ,  B29L2031/3005 ,  B60R13/0243

摘要： A first mold has a core passage, and first and second cavities in fluid communication with each other at the core passage. A second mold has first and second nozzles therein that inject first and second resins to the first and second cavities, respectively. The core member is slidable within the core passage to provide or block the fluid communication between the cavities, and has a third nozzle therein to inject a third resin to the core passage. The first and second resins are injected into the cavities. The core member is moved to block the fluid communication between the cavities, before injecting the first and second resins is completed. The third resin is injected while moving the core member to provide the fluid communication, after injecting the first and second resins is completed. The molds are separated, thereby yielding a single molded product, such as a vehicle door trim.

摘要翻译： 第一模具具有芯通道，并且在芯通道处彼此流体连通的第一和第二空腔。 第二模具在其中具有分别将第一和第二树脂注入到第一和第二空腔中的第一和第二喷嘴。 芯构件可在芯通道内滑动以提供或阻挡空腔之间的流体连通，并且其中具有第三喷嘴以将第三树脂注入到芯通道。 将第一和第二树脂注入到空腔中。 在完成注入第一和第二树脂之前，移动芯构件以阻止空腔之间的流体连通。 在移动芯部件以提供流体连通时注入第三树脂，在完成注入第一和第二树脂之后。 模具被分离，从而产生单个模制产品，例如车门装饰件。

公开(公告)号：US20110137196A1

公开(公告)日：2011-06-09

申请号：US12674709

申请日：2008-02-26

申请人： Shinji Kakei ,  Jongho Lee ,  Yasuhiro Kagamihara

发明人： Shinji Kakei ,  Jongho Lee ,  Yasuhiro Kagamihara

IPC分类号： A61B5/0488 ,  A61B5/11

CPC分类号： A61B5/0488 ,  A61B5/1124 ,  A61B5/4076 ,  A61B5/4082 ,  A61B5/4088 ,  A61B5/4528

摘要： The system of the present invention includes (a) means for displaying image information including a target image and a cursor image for tracking the target image; (b) means used when the subject moves the cursor image; (c) means for detecting the state of tracking the target image by the cursor image; (d) means for detecting the muscle active state of the subject using the means (b); (e) means for analyzing the tracking state detected by the means (c) and the muscle active state detected by the means (d); and (f) means for evaluating the motor function of the subject by using results of analysis obtained by the means (e) as indexes.

摘要翻译： 本发明的系统包括：（a）用于显示包括目标图像和用于跟踪目标图像的光标图像的图像信息的装置; （b）当被摄体移动光标图像时使用的装置; （c）用于通过光标图像检测跟踪目标图像的状态的装置; （d）使用装置（b）检测受试者的肌肉活动状态的装置; （e）用于分析由装置（c）检测到的跟踪状态和由装置（d）检测到的肌肉活动状态的装置; 和（f）通过使用方法（e）作为指标获得的分析结果来评价受试者的运动功能的装置。