公开(公告)号：US08492197B2

公开(公告)日：2013-07-23

申请号：US12858163

申请日：2010-08-17

申请人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

发明人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

IPC分类号： H01L21/50

CPC分类号： H01L24/09 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1155 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11903 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/17104 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48158 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2924/01014 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device.

摘要翻译： 半导体器件具有形成在第一衬底上的第一衬底和第一导电柱。 第二导电柱形成在第一基板上，与第一导电柱交替。 第二导电柱相对于第一导电柱垂直偏移。 第一BOT互连位点形成在第二基底上。 第二BOT互连位置形成在第二衬底上与第一互连位置交替。 第二互连站点相对于第一互连站点垂直偏移。 第一衬底安装到第二衬底，使得第一导电柱与第一互连位置对准并电连接，并且第二导电柱与第二互连位置对准并电连接到第二互连位置。 底部填充材料沉积在第一和第二基底之间。 第一基板可以是倒装芯片型半导体器件。

公开(公告)号：US20100201001A1

公开(公告)日：2010-08-12

申请号：US12686575

申请日：2010-01-13

申请人： Tatsuhiko ASAKAWA

发明人： Tatsuhiko ASAKAWA

IPC分类号： H01L23/522 ,  H01L21/283

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/11515 ,  H01L2224/1155 ,  H01L2224/1182 ,  H01L2224/11848 ,  H01L2224/13008 ,  H01L2224/13012 ,  H01L2224/1319 ,  H01L2224/13566 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13666 ,  H01L2224/1401 ,  H01L2224/14151 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method for manufacturing a semiconductor device includes: a) preparing a structure including a semiconductor substrate, an electrode provided on a first surface of the semiconductor substrate, and an insulation film provided on the first surface and having an opening positioned on a first part of the electrode; b) forming a first metal layer from an upper surface of the first part of the electrode to an upper surface of the insulation film; c) forming a resin layer on a first part of the first metal layer, which is positioned on the first part of the electrode, and on the insulation film after the step b); d) removing at least a second part of the resin layer, which is positioned on the first part of the first metal layer, in a manner to leave a first part of the resin layer so as to form a resin protrusion; and e) forming a second metal layer, which is electrically connected with the electrode, from an upper surface of the first metal layer to an upper surface of the resin protrusion.

摘要翻译： 一种制造半导体器件的方法包括：a）制备包括半导体衬底，设置在半导体衬底的第一表面上的电极和设置在第一表面上的绝缘膜的结构，并且具有位于第一部分的第一部分上的开口 电极; b）从所述电极的第一部分的上表面到所述绝缘膜的上表面形成第一金属层; c）在位于电极的第一部分上的第一金属层的第一部分和在步骤b）之后的绝缘膜上形成树脂层; d）以留下树脂层的第一部分的方式去除位于第一金属层的第一部分上的树脂层的至少第二部分，以形成树脂突起; 以及e）形成与所述电极电连接的第二金属层，从所述第一金属层的上表面到所述树脂突起的上表面。

公开(公告)号：US20090286173A1

公开(公告)日：2009-11-19

申请号：US12465847

申请日：2009-05-14

申请人： Kazuya Ushirokawa ,  Shozo Ochi

发明人： Kazuya Ushirokawa ,  Shozo Ochi

IPC分类号： G03F7/20 ,  A61N5/00

CPC分类号： G03F7/70791 ,  B23K26/032 ,  B23K26/066 ,  G03F7/70291 ,  H01L2224/11 ,  H01L2224/1155 ,  H01L2224/11554

摘要： An electronic component forming apparatus for forming an electronic component by radiating light to a photosensitive conductive resin provided on a forming work material, comprising radiation device for radiating light to the forming work material, detection device for detecting reflecting light reflected from the forming work material, and control device for controlling the radiating light responsive to an amount of the light detected by the detection device.

摘要翻译： 一种电子部件形成装置，用于通过将光照射到设置在成形加工材料上的感光性导电性树脂上而形成电子部件，所述电子部件形成装置包括：向成形加工材料照射光的放射线装置;检测从成形加工材料反射的反射光的检测装置; 以及用于响应于由检测装置检测到的光量来控制辐射光的控制装置。

公开(公告)号：US20130234324A1

公开(公告)日：2013-09-12

申请号：US13870928

申请日：2013-04-25

申请人： STATS CHIPPAC, LTD.

发明人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

IPC分类号： H01L23/00

CPC分类号： H01L24/09 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1155 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11903 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/17104 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48158 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2924/01014 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device.

摘要翻译： 半导体器件具有形成在第一衬底上的第一衬底和第一导电柱。 第二导电柱形成在第一基板上，与第一导电柱交替。 第二导电柱相对于第一导电柱垂直偏移。 第一BOT互连位点形成在第二基底上。 第二BOT互连位置形成在第二衬底上与第一互连位置交替。 第二互连站点相对于第一互连站点垂直偏移。 第一衬底安装到第二衬底，使得第一导电柱与第一互连位置对准并电连接，并且第二导电柱与第二互连位置对准并电连接到第二互连位置。 底部填充材料沉积在第一和第二基底之间。 第一基板可以是倒装芯片型半导体器件。

公开(公告)号：US20120043672A1

公开(公告)日：2012-02-23

申请号：US12858163

申请日：2010-08-17

申请人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

发明人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/09 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1155 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11903 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/17104 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48158 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2924/01014 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device.

摘要翻译： 半导体器件具有形成在第一衬底上的第一衬底和第一导电柱。 第二导电柱形成在第一基板上，与第一导电柱交替。 第二导电柱相对于第一导电柱垂直偏移。 第一BOT互连位点形成在第二基底上。 第二BOT互连位置形成在第二衬底上与第一互连位置交替。 第二互连站点相对于第一互连站点垂直偏移。 第一衬底安装到第二衬底，使得第一导电柱与第一互连位置对准并电连接，并且第二导电柱与第二互连位置对准并电连接到第二互连位置。 底部填充材料沉积在第一和第二基底之间。 第一基板可以是倒装芯片型半导体器件。

公开(公告)号：US08008182B2

公开(公告)日：2011-08-30

申请号：US12686575

申请日：2010-01-13

申请人： Tatsuhiko Asakawa

发明人： Tatsuhiko Asakawa

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/11515 ,  H01L2224/1155 ,  H01L2224/1182 ,  H01L2224/11848 ,  H01L2224/13008 ,  H01L2224/13012 ,  H01L2224/1319 ,  H01L2224/13566 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13666 ,  H01L2224/1401 ,  H01L2224/14151 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method for manufacturing a semiconductor device includes: a) preparing a structure including a semiconductor substrate, an electrode provided on a first surface of the semiconductor substrate, and an insulation film provided on the first surface and having an opening positioned on a first part of the electrode; b) forming a first metal layer from an upper surface of the first part of the electrode to an upper surface of the insulation film; c) forming a resin layer on a first part of the first metal layer, which is positioned on the first part of the electrode, and on the insulation film after the step b); d) removing at least a second part of the resin layer, which is positioned on the first part of the first metal layer, in a manner to leave a first part of the resin layer so as to form a resin protrusion; and e) forming a second metal layer, which is electrically connected with the electrode, from an upper surface of the first metal layer to an upper surface of the resin protrusion.

摘要翻译： 一种制造半导体器件的方法包括：a）制备包括半导体衬底，设置在半导体衬底的第一表面上的电极和设置在第一表面上的绝缘膜的结构，并且具有位于第一部分的第一部分上的开口 电极; b）从所述电极的第一部分的上表面到所述绝缘膜的上表面形成第一金属层; c）在位于电极的第一部分上的第一金属层的第一部分和在步骤b）之后的绝缘膜上形成树脂层; d）以留下树脂层的第一部分的方式去除位于第一金属层的第一部分上的树脂层的至少第二部分，以形成树脂突起; 以及e）形成与所述电极电连接的第二金属层，从所述第一金属层的上表面到所述树脂突起的上表面。

公开(公告)号：US08896133B2

公开(公告)日：2014-11-25

申请号：US13870928

申请日：2013-04-25

申请人： STATS ChipPAC, Ltd.

发明人： SungWon Cho ,  KiYoun Jang ,  YongHee Kang ,  Hyung Sang Park

IPC分类号： H01L23/48 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56

CPC分类号： H01L24/09 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1155 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11903 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/17104 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48158 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2924/01014 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device.

摘要翻译： 半导体器件具有形成在第一衬底上的第一衬底和第一导电柱。 第二导电柱形成在第一基板上，与第一导电柱交替。 第二导电柱相对于第一导电柱垂直偏移。 第一BOT互连位点形成在第二基底上。 第二BOT互连位置形成在第二衬底上与第一互连位置交替。 第二互连站点相对于第一互连站点垂直偏移。 第一衬底安装到第二衬底，使得第一导电柱与第一互连位置对准并电连接，并且第二导电柱与第二互连位置对准并电连接到第二互连位置。 底部填充材料沉积在第一和第二基底之间。 第一基板可以是倒装芯片型半导体器件。

公开(公告)号：US08067305B2

公开(公告)日：2011-11-29

申请号：US12231457

申请日：2008-09-03

申请人： Arthur W. Zafiropoulo ,  Andrew M. Hawryluk

发明人： Arthur W. Zafiropoulo ,  Andrew M. Hawryluk

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  B33Y80/00 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11442 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/11515 ,  H01L2224/1155 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Provided are methods for forming an electrically conductive structure of a desired three-dimensional shape on a substantially planar surface of a substrate, e.g., a semiconductor wafer. Typically, the particulate matter is deposited in a layer-by-layer manner and adhered to selected regions on the substrate surface. The particulate matter may be deposited to produce a mold for forming the structure and/or to produce the structure itself. A three-dimensional printer with associated electronic data may be used without the need of a lithographic mask or reticle.

摘要翻译： 提供了在基板（例如半导体晶片）的基本平坦的表面上形成所需三维形状的导电结构的方法。 通常，颗粒物质以层叠的方式沉积并粘附到基底表面上的选定区域。 可以沉积颗粒物质以产生用于形成结构的模具和/或产生结构本身。 可以使用具有相关联的电子数据的三维打印机，而不需要光刻掩模或掩模版。

公开(公告)号：US20090230172A1

公开(公告)日：2009-09-17

申请号：US12063264

申请日：2007-06-04

申请人： Toshinori Ogashiwa ,  Masayuki Miyairi

发明人： Toshinori Ogashiwa ,  Masayuki Miyairi

IPC分类号： B23K20/10 ,  B23K1/20

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05669 ,  H01L2224/1132 ,  H01L2224/11416 ,  H01L2224/11505 ,  H01L2224/1155 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13364 ,  H01L2224/13369 ,  H01L2224/16245 ,  H01L2224/27505 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/75252 ,  H01L2224/81048 ,  H01L2224/81097 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81464 ,  H01L2224/8184 ,  H01L2224/83048 ,  H01L2224/83191 ,  H01L2224/83207 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/351 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/743 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01203 ,  H01L2224/80097 ,  H01L2924/20108 ,  H01L2924/20103

摘要： The present invention provides a bonding method in which a bonded portion having a sufficient bonding strength can be obtained at a relatively low temperature, for example, in die bonding a semiconductor chip. A metal paste 20 was applied to a semiconductor chip 10, the metal paste 20 consisting of metal powder of one or more kinds selected from gold powder, silver powder, platinum powder, and palladium powder having a purity not lower than 99.9 wt % and an average particle diameter of 0.005 μm to 1.0 μm and an organic solvent. After being applied, the metal paste 20 was dried in a vacuum in a dryer. The chip was heated at 230° C. for 30 minutes to sinter the metal paste, by which a metal powder sintered compact 21 was formed. Next, a nickel plate 30 was placed on the semiconductor chip 10, and bonded to the semiconductor chip 10 by heating and pressurization.

摘要翻译： 本发明提供一种接合方法，其中例如在半导体芯片的芯片接合中，可以在较低的温度下获得具有足够的接合强度的接合部分。 将金属膏20涂布在半导体芯片10上，将由金粉末，银粉末，铂粉末和纯度为99.9重量％以上的钯粉末中的一种或多种金属粉末组成的金属膏20和 平均粒径为0.005μm〜1.0μm，有机溶剂。 施加后，将金属膏20在干燥器中真空干燥。 将芯片在230℃下加热30分钟以烧结金属糊料，由此形成金属粉末烧结体21。 接下来，将镍板30放置在半导体芯片10上，并通过加热加压与半导体芯片10接合。

公开(公告)号：US20160233184A1

公开(公告)日：2016-08-11

申请号：US15024552

申请日：2014-09-19

申请人： NITTO DENKO CORPORATION

发明人： Hiroyuki Hanazono ,  Naohide Takamoto ,  Akihiro Fukui

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L21/48 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/11019 ,  H01L2224/11502 ,  H01L2224/11515 ,  H01L2224/1155 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16227 ,  H01L2224/27003 ,  H01L2224/27334 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29371 ,  H01L2224/29387 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/83

摘要： A method for manufacturing a semiconductor includes: a Step A of preparing a chip with sheet-shaped resin composition in which a sheet-shaped resin composition is pasted onto a semiconductor chip, a Step B of preparing an adherend, a Step C of pasting the chip with sheet-shaped resin composition onto the adherend so that the sheet-shaped resin composition serves as a pasting surface, a Step D of heating the sheet-shaped resin composition to semi-cure the sheet-shaped resin composition after the Step C, and a Step E of heating the sheet-shaped resin composition at a higher temperature than in the Step D to cure the sheet-shaped resin composition after the Step D.

摘要翻译： 半导体的制造方法包括：将片状树脂组合物贴合在半导体芯片上的片状树脂组合物的制备工序A，制造被粘物的工序B，粘贴 将片状树脂组合物与片状树脂组合物贴合在被粘物上，使得片状树脂组合物作为糊状表面，在步骤C之后加热片状树脂组合物以使片状树脂组合物半固化的步骤D， 以及步骤E，其在比步骤D更高的温度下加热片状树脂组合物，以在步骤D之后固化片状树脂组合物。