公开(公告)号：US20170033075A1

公开(公告)日：2017-02-02

申请号：US15294508

申请日：2016-10-14

Applicant: Advanced Semiconductor, Inc.

Inventor： Min-Fong SHU ,  Yi-Hsiu TSENG ,  Kuan-Neng CHEN ,  Shu-Chiao KUO

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/564 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/1182 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13618 ,  H01L2224/13623 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13663 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13676 ,  H01L2224/13678 ,  H01L2224/13687 ,  H01L2224/1607 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/16501 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81096 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81395 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81418 ,  H01L2224/81423 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81466 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/81898 ,  H01L2224/83104 ,  H01L2224/83193 ,  H01L2224/92125 ,  H01L2924/00015 ,  H01L2924/15311 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2224/8109 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/053

Abstract: A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.

Abstract translation: 一种接合结构的制造方法包括：（a）提供基板，其中所述基板包括顶表面和邻近所述基板顶表面设置的至少一个接合焊盘，至少一个接合焊盘，其具有倾斜表面，其具有第一 坡; （b）提供半导体元件，其中所述半导体元件包括至少一个支柱，并且至少一个支柱具有具有第二斜率的侧壁，其中所述第一斜率的绝对值小于所述第二斜率的绝对值; 和（c）将至少一个柱结合到所述至少一个接合焊盘中相应的一个焊盘的倾斜表面的一部分上。

公开(公告)号：US11694960B2

公开(公告)日：2023-07-04

申请号：US17410716

申请日：2021-08-24

Applicant: Intel Corporation

Inventor： Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H05K1/18 ,  H01L23/532 ,  H01L25/18 ,  H05K3/34

CPC classification number: H01L23/5381 ,  H01L23/538 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/53238 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/27 ,  H01L24/33 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H05K1/185 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/171 ,  H01L2224/1703 ,  H01L2224/2746 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33505 ,  H01L2224/73204 ,  H01L2224/8147 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/81463 ,  H01L2224/81466 ,  H01L2224/81472 ,  H01L2224/81479 ,  H01L2224/81481 ,  H01L2224/81484 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/0103 ,  H01L2924/0105 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/0496 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/10363 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/81455 ,  H01L2924/00014 ,  H01L2224/81481 ,  H01L2924/00014 ,  H01L2224/81487 ,  H01L2924/04953 ,  H01L2224/81487 ,  H01L2924/04941 ,  H01L2224/81466 ,  H01L2924/01074 ,  H01L2224/81463 ,  H01L2924/01072 ,  H01L2224/81479 ,  H01L2924/00014 ,  H01L2224/8147 ,  H01L2924/00014 ,  H01L2224/81472 ,  H01L2924/00014 ,  H01L2224/81484 ,  H01L2924/00014 ,  H01L2224/81487 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2224/81487 ,  H01L2924/0481 ,  H01L2924/01029 ,  H01L2224/81487 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2224/171 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.

公开(公告)号：US20160194531A1

公开(公告)日：2016-07-07

申请号：US14916490

申请日：2014-09-09

Applicant: DEXERIALS CORPORATION

Inventor： Masaharu AOKI ,  Shiyuki KANISAWA ,  Hidetsugu NAMIKI ,  Taichi KOYAMA ,  Akira ISHIGAMI

IPC: C09J133/20 ,  C09J9/02 ,  H01L33/62

CPC classification number: C09J133/20 ,  C08F220/18 ,  C08L33/066 ,  C08L33/068 ,  C08L2205/22 ,  C09J9/02 ,  C09J133/066 ,  C09J163/00 ,  H01B1/22 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29316 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/2936 ,  H01L2224/29371 ,  H01L2224/29387 ,  H01L2224/29388 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/294 ,  H01L2224/32225 ,  H01L2224/81424 ,  H01L2224/81487 ,  H01L2224/81903 ,  H01L2224/83424 ,  H01L2224/83487 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2933/0066 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/01006 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2924/0544 ,  H01L2924/0105 ,  C08F2220/1825 ,  C08F2220/1808 ,  C08F220/44 ,  C08F220/06 ,  C08F220/20 ,  C08K5/151

Abstract: This adhesive contains an epoxy compound, a cationic catalyst, and an acrylic resin that includes acrylic acid and an acrylic acid ester having a hydroxyl group. The acrylic acid in the acrylic resin reacts with the epoxy compound, creating a link between the acrylic resin island part and the epoxy compound sea part, and strengthening the anchoring effect with respect to the epoxy compound sea part by roughening the surface of an oxide film. Furthermore, the hydroxyl-group-containing acrylic acid ester in the acrylic resin becomes electrostatically adhesive to wiring due to the polarity of the hydroxyl group. Excellent adhesive strength can be obtained by adhering, in this way, the entire cured product composed of the acrylic resin island part and the epoxy compound sea part to the oxide film.

Abstract translation: 该粘合剂包含环氧化合物，阳离子催化剂和丙烯酸树脂，其包括丙烯酸和具有羟基的丙烯酸酯。 丙烯酸树脂中的丙烯酸与环氧化合物反应，产生丙烯酸树脂岛部分和环氧化合物海部之间的连接，并通过使氧化膜的表面粗糙化来增强相对于环氧化合物海部的锚固效果 。 此外，由于羟基的极性，丙烯酸树脂中的含羟基的丙烯酸酯与布线成为静电粘合剂。 通过将由丙烯酸树脂岛部和环氧化合物海部构成的整个固化物以这种方式粘附到氧化膜，可以获得良好的粘合强度。

公开(公告)号：US12132002B2

公开(公告)日：2024-10-29

申请号：US18139862

申请日：2023-04-26

Applicant: Intel Corporation

Inventor： Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/532 ,  H01L25/065 ,  H01L25/18 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01L23/5381 ,  H01L23/53238 ,  H01L23/538 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/27 ,  H01L24/33 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H05K1/185 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2224/171 ,  H01L2224/2746 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33505 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/81463 ,  H01L2224/81466 ,  H01L2224/8147 ,  H01L2224/81472 ,  H01L2224/81479 ,  H01L2224/81481 ,  H01L2224/81484 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/0496 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/10363 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/81455 ,  H01L2924/00014 ,  H01L2224/81481 ,  H01L2924/00014 ,  H01L2224/81487 ,  H01L2924/04953 ,  H01L2224/81487 ,  H01L2924/04941 ,  H01L2224/81466 ,  H01L2924/01074 ,  H01L2224/81463 ,  H01L2924/01072 ,  H01L2224/81479 ,  H01L2924/00014 ,  H01L2224/8147 ,  H01L2924/00014 ,  H01L2224/81472 ,  H01L2924/00014 ,  H01L2224/81484 ,  H01L2924/00014 ,  H01L2224/81487 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2224/81487 ,  H01L2924/0481 ,  H01L2924/01029 ,  H01L2224/81487 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2224/171 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.

公开(公告)号：US09496238B2

公开(公告)日：2016-11-15

申请号：US14622494

申请日：2015-02-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Min-Fong Shu ,  Yi-Hsiu Tseng ,  Kuan-Neng Chen ,  Shu-Chiao Kuo

IPC: H01L23/31 ,  H01L23/49 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/564 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/1182 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13618 ,  H01L2224/13623 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13663 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13676 ,  H01L2224/13678 ,  H01L2224/13687 ,  H01L2224/1607 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/16501 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81096 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81395 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81418 ,  H01L2224/81423 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81466 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/81898 ,  H01L2224/83104 ,  H01L2224/83193 ,  H01L2224/92125 ,  H01L2924/00015 ,  H01L2924/15311 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2224/8109 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/053

Abstract: A bonding structure includes a substrate having a top surface and including at least one bonding pad. Each bonding pad is disposed adjacent to the top surface of the substrate and has a sloped surface. A semiconductor element includes at least one pillar. Each pillar is bonded to a portion of the sloped surface of a corresponding bonding pad, and a gap is formed between a sidewall of the pillar and the sloped surface of the corresponding bonding pad.

Abstract translation: 接合结构包括具有顶表面并且包括至少一个接合焊盘的基板。 每个接合焊盘设置成与衬底的顶表面相邻并且具有倾斜的表面。 半导体元件包括至少一个支柱。 每个支柱结合到对应的焊盘的倾斜表面的一部分，并且在柱的侧壁和相应的焊盘的倾斜表面之间形成间隙。

公开(公告)号：US20190013271A1

公开(公告)日：2019-01-10

申请号：US16129577

申请日：2018-09-12

Applicant: INTEL CORPORATION

Inventor： Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/482 ,  H01L25/18 ,  H01L23/532

CPC classification number: H01L23/5381 ,  H01L23/4821 ,  H01L23/53238 ,  H01L23/538 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/27 ,  H01L24/33 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2224/171 ,  H01L2224/2746 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33505 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/81463 ,  H01L2224/81466 ,  H01L2224/8147 ,  H01L2224/81472 ,  H01L2224/81479 ,  H01L2224/81481 ,  H01L2224/81484 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/0496 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/3436 ,  H05K2201/10363 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2924/0481 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.

公开(公告)号：US09640485B2

公开(公告)日：2017-05-02

申请号：US14836906

申请日：2015-08-26

Applicant: INTEL CORPORATION

Inventor： Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/482 ,  H01L25/065 ,  H05K1/18 ,  H01L23/532 ,  H01L25/18 ,  H05K3/34

CPC classification number: H01L23/5381 ,  H01L23/4821 ,  H01L23/53238 ,  H01L23/538 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/27 ,  H01L24/33 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2224/171 ,  H01L2224/2746 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33505 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/81463 ,  H01L2224/81466 ,  H01L2224/8147 ,  H01L2224/81472 ,  H01L2224/81479 ,  H01L2224/81481 ,  H01L2224/81484 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/3436 ,  H05K2201/10363 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/01072 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2924/0481 ,  H01L2924/0496 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.

公开(公告)号：US20140353827A1

公开(公告)日：2014-12-04

申请号：US13903828

申请日：2013-05-28

Applicant: Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

Inventor： Yueli Liu ,  Qinglei Zhang ,  Amanda E. Schuckman ,  Rui Zhang

IPC: H01L23/00

CPC classification number: H01L23/5381 ,  H01L23/4821 ,  H01L23/53238 ,  H01L23/538 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/26 ,  H01L24/27 ,  H01L24/33 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2224/171 ,  H01L2224/2746 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33505 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/81463 ,  H01L2224/81466 ,  H01L2224/8147 ,  H01L2224/81472 ,  H01L2224/81479 ,  H01L2224/81481 ,  H01L2224/81484 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/3436 ,  H05K2201/10363 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/01072 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2924/0481 ,  H01L2924/0496 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for layered interconnect structures for bridge interconnection in integrated circuit assemblies. In one embodiment, an apparatus may include a substrate and a bridge embedded in the substrate. The bridge may be configured to route electrical signals between two dies. An interconnect structure, electrically coupled with the bridge, may include a via structure including a first conductive material, a barrier layer including a second conductive material disposed on the via structure, and a solderable material including a third conductive material disposed on the barrier layer. The first conductive material, the second conductive material, and the third conductive material may have different chemical composition. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例涉及用于集成电路组件中的桥互连的分层互连结构的技术和配置。 在一个实施例中，装置可以包括衬底和嵌入衬底中的桥。 桥可以被配置为在两个管芯之间布置电信号。 与电桥电耦合的互连结构可以包括通孔结构，其包括第一导电材料，包含布置在通孔结构上的第二导电材料的阻挡层，以及包含布置在阻挡层上的第三导电材料的可焊材料。 第一导电材料，第二导电材料和第三导电材料可以具有不同的化学组成。 可以描述和/或要求保护其他实施例。

公开(公告)号：US09994743B2

公开(公告)日：2018-06-12

申请号：US14916490

申请日：2014-09-09

Applicant: DEXERIALS CORPORATION

Inventor： Masaharu Aoki ,  Shiyuki Kanisawa ,  Hidetsugu Namiki ,  Taichi Koyama ,  Akira Ishigami

IPC: H01L21/12 ,  C09J133/20 ,  C09J163/00 ,  H01L23/00 ,  H01L33/62 ,  H01B1/22 ,  C09J133/06 ,  C09J9/02 ,  C08F220/18

CPC classification number: C09J133/20 ,  C08F220/18 ,  C08L33/066 ,  C08L33/068 ,  C08L2205/22 ,  C09J9/02 ,  C09J133/066 ,  C09J163/00 ,  H01B1/22 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29316 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/2936 ,  H01L2224/29371 ,  H01L2224/29387 ,  H01L2224/29388 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/294 ,  H01L2224/32225 ,  H01L2224/81424 ,  H01L2224/81487 ,  H01L2224/81903 ,  H01L2224/83424 ,  H01L2224/83487 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2933/0066 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/01006 ,  H01L2924/0543 ,  H01L2924/01049 ,  H01L2924/0544 ,  H01L2924/0105 ,  C08F2220/1825 ,  C08F2220/1808 ,  C08F220/44 ,  C08F220/06 ,  C08F220/20 ,  C08K5/151

Abstract: This adhesive contains an epoxy compound, a cationic catalyst, and an acrylic resin that includes acrylic acid and an acrylic acid ester having a hydroxyl group. The acrylic acid in the acrylic resin reacts with the epoxy compound, creating a link between the acrylic resin island part and the epoxy compound sea part, and strengthening the anchoring effect with respect to the epoxy compound sea part by roughening the surface of an oxide film. Furthermore, the hydroxyl-group-containing acrylic acid ester in the acrylic resin becomes electrostatically adhesive to wiring due to the polarity of the hydroxyl group. Excellent adhesive strength can be obtained by adhering, in this way, the entire cured product composed of the acrylic resin island part and the epoxy compound sea part to the oxide film.

公开(公告)号：US09984993B2

公开(公告)日：2018-05-29

申请号：US15294508

申请日：2016-10-14

Applicant: Advanced Semiconductor, Inc.

Inventor： Min-Fong Shu ,  Yi-Hsiu Tseng ,  Kuan-Neng Chen ,  Shu-Chiao Kuo

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/564 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/1182 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13618 ,  H01L2224/13623 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13663 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13676 ,  H01L2224/13678 ,  H01L2224/13687 ,  H01L2224/1607 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/16501 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81096 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81395 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81418 ,  H01L2224/81423 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81466 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/81898 ,  H01L2224/83104 ,  H01L2224/83193 ,  H01L2224/92125 ,  H01L2924/00015 ,  H01L2924/15311 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2224/8109 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/053

Abstract: A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.