公开(公告)号：US20120211901A1

公开(公告)日：2012-08-23

申请号：US13355792

申请日：2012-01-23

申请人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

发明人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/48 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/26175 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/29019 ,  H01L2224/29036 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32502 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/13064 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0132 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.

摘要翻译： 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后，形成与所述第一金属和所述第二金属合金的层，以将半导体芯片与半导体芯片安装区域接合。

公开(公告)号：US08728867B2

公开(公告)日：2014-05-20

申请号：US13355792

申请日：2012-01-23

申请人： Kozo Shimizu ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

发明人： Kozo Shimizu ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

IPC分类号： H01L21/44

CPC分类号： H01L23/48 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/26175 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/29019 ,  H01L2224/29036 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32502 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/13064 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0132 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.

摘要翻译： 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后，形成与所述第一金属和所述第二金属合金的层，以将半导体芯片与半导体芯片安装区域接合。

公开(公告)号：US20120199991A1

公开(公告)日：2012-08-09

申请号：US13331090

申请日：2011-12-20

申请人： Keishiro OKAMOTO ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

发明人： Keishiro OKAMOTO ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

IPC分类号： H01L23/29 ,  H01L21/56

CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/3142 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/13064 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer.

摘要翻译： 半导体器件包括：半导体芯片，其包括具有载流子迁移层和载流子供给层的氮化物半导体层叠结构; 在所述半导体芯片上的第一树脂层，所述第一树脂层包含偶联剂; 在第一树脂层上的第二树脂层，第二树脂层包括表面活性剂; 以及用第一树脂层和第二树脂层密封半导体芯片的密封树脂层。

公开(公告)号：US08492784B2

公开(公告)日：2013-07-23

申请号：US13331090

申请日：2011-12-20

申请人： Keishiro Okamoto ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

发明人： Keishiro Okamoto ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

IPC分类号： H01L33/00

CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/3142 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/13064 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer.

摘要翻译： 半导体器件包括：半导体芯片，其包括具有载流子迁移层和载流子供给层的氮化物半导体层叠结构; 在所述半导体芯片上的第一树脂层，所述第一树脂层包含偶联剂; 在第一树脂层上的第二树脂层，第二树脂层包括表面活性剂; 以及用第一树脂层和第二树脂层密封半导体芯片的密封树脂层。

公开(公告)号：US20120217626A1

公开(公告)日：2012-08-30

申请号：US13353666

申请日：2012-01-19

申请人： Taiji SAKAI ,  Kazukiyo Joshin ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keishiro Okamoto

发明人： Taiji SAKAI ,  Kazukiyo Joshin ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keishiro Okamoto

IPC分类号： H01L23/495 ,  H01L21/58

CPC分类号： H03F1/3247 ,  H01L21/4825 ,  H01L23/49524 ,  H01L23/49558 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L24/84 ,  H01L2224/40245 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/181 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/204 ,  H03F2200/451 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099 ,  H01L2224/84

摘要： A method for manufacturing a semiconductor device, includes: placing a seal layer including a connection conductive film on the surface so that the connection conductive film is in contact with an electrode of a semiconductor element and a lead; electrically coupling the electrode and the lead through the connection conductive film; and sealing the semiconductor element by the seal layer.

摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：将具有连接导电膜的密封层放置在所述表面上，使得所述连接导电膜与半导体元件的电极和引线接触; 通过连接导电膜电连接电极和引线; 并通过密封层密封半导体元件。

公开(公告)号：US20120091522A1

公开(公告)日：2012-04-19

申请号：US13276521

申请日：2011-10-19

申请人： Shirou OZAKI ,  Masahito Kanamura ,  Norikazu Nakamura ,  Toyoo Miyajima ,  Masayuki Takeda ,  Keiji Watanabe ,  Toshihide Kikkawa ,  Kenji Imanishi ,  Toshihiro Ohki ,  Tadahiro Imada

发明人： Shirou OZAKI ,  Masahito Kanamura ,  Norikazu Nakamura ,  Toyoo Miyajima ,  Masayuki Takeda ,  Keiji Watanabe ,  Toshihide Kikkawa ,  Kenji Imanishi ,  Toshihiro Ohki ,  Tadahiro Imada

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/772

CPC分类号： H01L29/517 ,  H01L21/0228 ,  H01L23/291 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.

摘要翻译： 半导体器件包括形成在衬底上的第一半导体层，形成在第一半导体层上的第二半导体层，形成在第二半导体层上的源电极和漏电极，形成在第二半导体层上的绝缘膜，栅极 形成在绝缘膜上的电极，以及覆盖绝缘膜的保护膜，保护膜通过热CVD，热ALD或真空气相沉积形成。

公开(公告)号：US08716209B2

公开(公告)日：2014-05-06

申请号：US12560193

申请日：2009-09-15

申请人： Yasushi Kobayashi ,  Kouta Yoshikawa ,  Yoshihiro Nakata ,  Tadahiro Imada ,  Shirou Ozaki

发明人： Yasushi Kobayashi ,  Kouta Yoshikawa ,  Yoshihiro Nakata ,  Tadahiro Imada ,  Shirou Ozaki

IPC分类号： H01L21/306 ,  C11D11/00 ,  H01L21/3105

CPC分类号： C11D11/0047 ,  C11D3/042 ,  C11D3/044 ,  C11D3/162 ,  C11D3/2075 ,  C11D3/30 ,  C11D3/3742 ,  C11D7/08 ,  C11D7/265 ,  C11D7/3209 ,  H01L21/02063 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76826 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2924/14 ,  H01L2924/00

摘要： The invention provides an agent for post-etch treating a silicon dielectric film, including: at least one nitrogen-containing substance selected from the group consisting of ammonium bases and amine compounds; an acid; and at least one silicon-containing compound containing silicon, carbon and hydrogen. According to the present invention, it becomes possible to suppress an increase in the dielectric constant of a silicon dielectric film caused by etching.

摘要翻译： 本发明提供了一种用于蚀刻后处理硅介电膜的试剂，包括：至少一种选自铵基和胺化合物的含氮物质; 酸; 和含有硅，碳和氢的至少一种含硅化合物。 根据本发明，可以抑制由蚀刻引起的硅电介质膜的介电常数的增加。

公开(公告)号：US08449787B2

公开(公告)日：2013-05-28

申请号：US12035832

申请日：2008-02-22

申请人： Tadahiro Imada ,  Yoshihiro Nakata ,  Koji Nozaki

发明人： Tadahiro Imada ,  Yoshihiro Nakata ,  Koji Nozaki

IPC分类号： C03C15/00

CPC分类号： H01L21/67086 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/6708 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76825

摘要： A wet etching method that includes forming an insulating film on a substrate, and irradiating laser light to the insulating film during wet etching of the insulating film using an etching solution.

摘要翻译： 一种湿式蚀刻方法，其包括在基板上形成绝缘膜，并且在使用蚀刻溶液湿式蚀刻绝缘膜期间，将绝缘膜照射激光。

公开(公告)号：US08390099B2

公开(公告)日：2013-03-05

申请号：US12862140

申请日：2010-08-24

申请人： Shirou Ozaki ,  Yoshihiro Nakata ,  Tadahiro Imada ,  Yasushi Kobayashi

发明人： Shirou Ozaki ,  Yoshihiro Nakata ,  Tadahiro Imada ,  Yasushi Kobayashi

IPC分类号： H01L23/58

CPC分类号： H01L23/5329 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/3121 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76825 ,  H01L21/76829 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10T428/31663 ,  H01L2924/00

摘要： An interconnection substrate including: a first insulating film made of a silicon compound, an adhesion enhancing layer formed on the first insulating film, and a second insulting film made of a silicon compound and formed on the adhesion enhancing layer, wherein the first insulating film and the second insulating film are combined together with a component having a structure represented by General Formula (1) described below: Si—CXHY—Si  General Formula (1) where y is equal to 2x and is an even integer.

摘要翻译： 一种互连基板，包括：由硅化合物制成的第一绝缘膜，形成在第一绝缘膜上的粘合增强层和形成在粘合增强层上的由硅化合物制成的第二绝缘膜，其中第一绝缘膜和 第二绝缘膜与具有下述通式（1）所示结构的成分组合在一起：Si-CXHY-Si通式（1），其中y等于2×并且是偶数整数。

公开(公告)号：US08143649B2

公开(公告)日：2012-03-27

申请号：US12618384

申请日：2009-11-13

申请人： Tadahiro Imada ,  Atsushi Yamada

发明人： Tadahiro Imada ,  Atsushi Yamada

IPC分类号： H01L29/778 ,  H01L21/335

摘要： An i-GaN layer (electron transit layer), an n-GaN layer (compound semiconductor layer) formed over the i-GaN layer (electron transit layer), and a source electrode, a drain electrode and a gate electrode formed over the n-GaN layer (compound semiconductor layer) are provided. A recess portion is formed inside an area between the source electrode and the drain electrode of the n-GaN layer (compound semiconductor layer) and at a portion separating from the gate electrode.