公开(公告)号：US08754508B2

公开(公告)日：2014-06-17

申请号：US13598196

申请日：2012-08-29

申请人： Hsien-Wei Chen ,  Hung-Jui Kuo

发明人： Hsien-Wei Chen ,  Hung-Jui Kuo

IPC分类号： H01L29/06

CPC分类号： H01L23/3192 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13101 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13181 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device includes a recess in a polymer layer between two adjacent metal lines and over passivation layer or anti-electromigration layers on redistribution metal lines to increase the resistance to electromigration.

摘要翻译： 半导体器件包括位于两个相邻金属线之间的聚合物层中的凹槽，以及在再分布金属线上的钝化层或抗电迁移层上，以增加对电迁移的抵抗力。

公开(公告)号：US08749043B2

公开(公告)日：2014-06-10

申请号：US13409756

申请日：2012-03-01

申请人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Kai-Chiang Wu

发明人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Kai-Chiang Wu

IPC分类号： H01L23/02 ,  H01L21/16

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/11011 ,  H01L2224/14 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0206 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/068 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A package on packaging structure comprising a first package and a second package provides for improved thermal conduction and mechanical strength by the introduction of a thermally conductive substrate attached to the second package. The first package has a first substrate and a first integrated circuit. The second package has a second substrate containing through vias that has a first coefficient of thermal expansion. The second package also has a second integrated circuit having a second coefficient of thermal expansion located on the second substrate. The second coefficient of thermal expansion deviates from the first coefficient of thermal expansion by less than about 10 or less than about 5 parts-per-million per degree Celsius. A first set of conductive elements couples the first substrate and the second substrate. A second set of conductive elements couples the second substrate and the second integrated circuit.

摘要翻译： 包装结构包括第一包装和第二包装通过引入连接到第二包装件上的导热基材提供改进的热传导和机械强度。 第一封装具有第一衬底和第一集成电路。 第二包装具有包含通孔的第二基板，其具有第一热膨胀系数。 第二封装还具有第二集成电路，其具有位于第二基板上的第二热膨胀系数。 第二热膨胀系数从第一热膨胀系数偏离每摄氏度小于约10或小于约5百万分之一。 第一组导电元件将第一基板和第二基板连接。 第二组导电元件将第二基板和第二集成电路耦合。

公开(公告)号：US08749027B2

公开(公告)日：2014-06-10

申请号：US12349901

申请日：2009-01-07

申请人： Hsien-Wei Chen ,  Shin-Puu Jeng ,  Hung-Jung Tu ,  Wen-Chih Chiou

发明人： Hsien-Wei Chen ,  Shin-Puu Jeng ,  Hung-Jung Tu ,  Wen-Chih Chiou

IPC分类号： H01L23/544 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L23/585 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/15311

摘要： A die includes a seal-ring structure below a substrate. The seal-ring structure is disposed around at least one substrate region. At least one means for substantially preventing ion diffusion into the substrate region. The at least one means is coupled with the seal-ring structure.

摘要翻译： 模具包括在基底下方的密封环结构。 密封环结构围绕至少一个基底区域设置。 至少一种用于基本上防止离子扩散进入衬底区域的装置。 至少一个装置与密封环结构联接。

公开(公告)号：US08629532B2

公开(公告)日：2014-01-14

申请号：US11745595

申请日：2007-05-08

申请人： Hsien-Wei Chen ,  Shih-Hsun Hsu

发明人： Hsien-Wei Chen ,  Shih-Hsun Hsu

IPC分类号： H01L23/544 ,  H01L29/06

CPC分类号： H01L21/78 ,  B28D5/022 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor wafer with an assisting dicing structure. The wafer comprises a substrate having a front surface and a rear surface. The front surface of the substrate comprises at least two device regions separated by at least one dicing lane. The rear surface of the substrate comprises at least one pre-dicing trench formed therein and substantially aligned with the dicing lane. A method for dicing a semiconductor wafer is also disclosed.

摘要翻译： 具有辅助切割结构的半导体晶片。 晶片包括具有前表面和后表面的基板。 衬底的前表面包括由至少一个切割通道分开的至少两个器件区域。 衬底的后表面包括形成在其中并与切割通道基本对齐的至少一个预切割沟槽。 还公开了一种用于切割半导体晶片的方法。

公开(公告)号：US20130341800A1

公开(公告)日：2013-12-26

申请号：US13529179

申请日：2012-06-21

申请人： Chia-Wei Tu ,  Yian-Liang Kuo ,  Wen-Hsiung Lu ,  Hsien-Wei Chen ,  Tsung-Fu Tsai

发明人： Chia-Wei Tu ,  Yian-Liang Kuo ,  Wen-Hsiung Lu ,  Hsien-Wei Chen ,  Tsung-Fu Tsai

IPC分类号： H01L21/78 ,  H01L23/522

CPC分类号： H01L23/3135 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3157 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/15 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/0502 ,  H01L2224/05022 ,  H01L2224/05099 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05599 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/14 ,  H01L2224/03 ,  H01L2224/05 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05552

摘要： A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.

摘要翻译： 一种方法包括在晶片的衬底上形成电连接器，并模制聚合物层，至少一部分电连接器模制在聚合物层中。 执行第一锯切步骤以在聚合物层中形成沟槽。 在第一锯切步骤之后，执行第二锯切步骤以将晶片看成多个模具。

公开(公告)号：US20130277838A1

公开(公告)日：2013-10-24

申请号：US13452507

申请日：2012-04-20

申请人： Chen-Hua Yu ,  Hao-Yi Tsai ,  Chien-Hsiun Lee ,  Chung-Shi Liu ,  Hsien-Wei Chen

发明人： Chen-Hua Yu ,  Hao-Yi Tsai ,  Chien-Hsiun Lee ,  Chung-Shi Liu ,  Hsien-Wei Chen

IPC分类号： H01L21/60 ,  H01L23/498

CPC分类号： H01L24/11 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02125 ,  H01L2224/02165 ,  H01L2224/02335 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03464 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13026 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/06 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2224/05552 ,  H01L2924/00

摘要： Methods and apparatus for solder connections. An apparatus includes a substrate having a conductive terminal on a surface; a passivation layer overlying the surface of the substrate and the conductive terminal; an opening in the passivation layer exposing a portion of the conductive terminal; at least one stud bump bonded to the conductive terminal in the opening and extending in a direction normal to the surface of the substrate; and a solder connection formed on the conductive terminal in the opening and enclosing the at least one stud bump. Methods for forming the solder connections are disclosed.

摘要翻译： 焊接方法和装置。 一种装置包括：在表面上具有导电端子的基板; 覆盖在衬底表面上的钝化层和导电端子; 所述钝化层中的开口暴露所述导电端子的一部分; 至少一个凸起凸块，其结合到所述开口中的所述导电端子并且沿垂直于所述基板的表面的方向延伸; 以及形成在所述开口中的所述导电端子上并且包围所述至少一个螺柱凸块的焊接连接。 公开了形成焊料连接的方法。

公开(公告)号：US20130270686A1

公开(公告)日：2013-10-17

申请号：US13444558

申请日：2012-04-11

申请人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

发明人： Hsien-Wei Chen ,  Chung-Ying Yang ,  Chao-Wen Shih ,  Kai-Chiang Wu

IPC分类号： H01L23/34 ,  H01L21/60

CPC分类号： H01L23/367 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81424 ,  H01L2924/014 ,  H01L2924/00014

摘要： Apparatus and methods for forming a heat spreader on a substrate to release heat for a semi-conductor package are disclosed. The apparatus comprises a substrate. A dielectric layer is formed next to the substrate and in contact with a surface of the substrate. A heat spreader is formed next to the substrate and in contact with another surface of the substrate. A passivation layer is formed next to the dielectric layer. A connection pad is placed on top of the passivation layer. The substrate may comprise additional through-silicon-vias. The contact surface between the substrate and the heat spreader may be a scraggy surface. The packaging method further proceeds to connect a chip to the connection pad by way of a connection device such as a solder ball or a bump.

摘要翻译： 公开了一种用于在基板上形成散热器以释放用于半导体封装的热量的装置和方法。 该装置包括基板。 在基板的旁边形成介电层，与基板的表面接触。 散热器形成在基板的旁边并与基板的另一个表面接触。 在电介质层的旁边形成钝化层。 连接焊盘放置在钝化层的顶部。 衬底可以包括另外的通硅通孔。 基板和散热器之间的接触表面可能是肮脏的表面。 包装方法还进一步通过诸如焊球或凸块的连接装置将芯片连接到连接焊盘。

公开(公告)号：US20130228932A1

公开(公告)日：2013-09-05

申请号：US13409756

申请日：2012-03-01

申请人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Kai-Chiang Wu

发明人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Kai-Chiang Wu

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/11011 ,  H01L2224/14 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0206 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/068 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A package on packaging structure comprising a first package and a second package provides for improved thermal conduction and mechanical strength by the introduction of a thermally conductive substrate attached to the second package. The first package has a first substrate and a first integrated circuit. The second package has a second substrate containing through vias that has a first coefficient of thermal expansion. The second package also has a second integrated circuit having a second coefficient of thermal expansion located on the second substrate. The second coefficient of thermal expansion deviates from the first coefficient of thermal expansion by less than about 10 or less than about 5 parts-per-million per degree Celsius. A first set of conductive elements couples the first substrate and the second substrate. A second set of conductive elements couples the second substrate and the second integrated circuit.

公开(公告)号：US08368180B2

公开(公告)日：2013-02-05

申请号：US12619464

申请日：2009-11-16

申请人： Chen-Hua Yu ,  Shin-Puu Jeng ,  Hao-Yi Tsai ,  Shang-Yun Hou ,  Hsien-Wei Chen ,  Ming-Yen Chiu

发明人： Chen-Hua Yu ,  Shin-Puu Jeng ,  Hao-Yi Tsai ,  Shang-Yun Hou ,  Hsien-Wei Chen ,  Ming-Yen Chiu

IPC分类号： H01L23/544

CPC分类号： H01L21/78

摘要： A system and method for preventing defaults during singulation is presented. An embodiment comprises a dummy metal structure located in the scribe region. The dummy metal structure comprises a series of alternating dummy lines that are connected through dummy vias. The dummy lines are offset from dummy lines in adjacent metal layers. Additionally, the dummy lines and dummy vias in the upper layers of the scribe line may be formed with larger dimensions than the dummy lines and dummy vias located in the lower layers.

摘要翻译： 提出了一种在分割过程中防止违约的系统和方法。 一个实施例包括位于划线区域中的虚拟金属结构。 虚拟金属结构包括通过虚拟通孔连接的一系列交替虚拟线。 伪线与相邻金属层中的虚拟线偏移。 此外，划线的上层中的虚拟线和虚拟通路可以形成为具有比位于下层中的虚拟线和虚拟通孔更大的尺寸。

公开(公告)号：US08294264B2

公开(公告)日：2012-10-23

申请号：US12750221

申请日：2010-03-30

申请人： Tzu-Yu Wang ,  Chi-Chun Hsieh ,  An-Jhih Su ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Liwei Lin

发明人： Tzu-Yu Wang ,  Chi-Chun Hsieh ,  An-Jhih Su ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Liwei Lin

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/04 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13015 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： An under-bump metallization (UBM) structure for a semiconductor device is provided. The UBM structure has a center portion and extensions extending out from the center portion. The extensions may have any suitable shape, including a quadrangle, a triangle, a circle, a fan, a fan with extensions, or a modified quadrangle having a curved surface. Adjacent UBM structures may have the respective extensions aligned or rotated relative to each other. Flux may be applied to a portion of the extensions to allow an overlying conductive bump to adhere to a part of the extensions.

摘要翻译： 提供了一种用于半导体器件的凸块下金属化（UBM）结构。 UBM结构具有从中心部分延伸出的中心部分和延伸部分。 延伸部可以具有任何合适的形状，包括四边形，三角形，圆形，风扇，具有延伸部的风扇或具有弯曲表面的改进的四边形。 相邻的UBM结构可以具有相对于彼此对准或旋转的相应延伸部。 焊剂可以施加到延伸部分的一部分，以允许覆盖的导电凸块粘附到延伸部分的一部分上。