Patent search ap:("Charles W. C. Lin") AND inv:"Charles W. C. Lin" Page 13

121.

发明授权
Semiconductor chip assembly with post/base heat spreader and adhesive between base and terminal 有权
Title translation: 半导体芯片组件，带有底座和底座散热器以及底座和端子之间的粘合剂

公开(公告)号：US08203167B2

公开(公告)日：2012-06-19

申请号：US12833945

申请日：2010-07-10

Applicant: Charles W. C. Lin , Chia-Chung Wang

Inventor： Charles W. C. Lin , Chia-Chung Wang

IPC: H01L33/62 , H01L23/36 , H01L23/48 , H01L33/64

CPC classification number: H01L21/486 , H01L23/3677 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L33/486 , H01L33/62 , H01L33/642 , H01L2224/32013 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/01087 , H01L2924/181 , H01L2224/05599 , H01L2924/00012

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from the base into a first opening in the adhesive, and the base extends laterally from the thermal post. The conductive trace includes a pad, a terminal and a signal post. The signal post extends upwardly from the terminal into a second opening in the adhesive. The adhesive extends above the base and between the base and the terminal.

Abstract translation: 半导体芯片组件包括半导体器件，散热器，导电迹线和粘合剂。半导体器件电连接到导电迹线并热连接到散热器。散热器包括热柱和基座。热柱从基部向上延伸到粘合剂中的第一开口中，并且基部从热柱横向延伸。导电迹线包括垫，端子和信号柱。信号柱从端子向上延伸到粘合剂中的第二开口中。粘合剂在基底之上以及基部和端子之间延伸。

122.

发明授权
Method of making a semiconductor chip assembly with a post/base heat spreader with a thermal via 有权
Title translation: 用具有热通孔的柱/基散热器制造半导体芯片组件的方法

公开(公告)号：US08178395B2

公开(公告)日：2012-05-15

申请号：US13113051

申请日：2011-05-22

Applicant: Charles W. C. Lin , Chia-Chung Wang , Ming Yu Shih

Inventor： Charles W. C. Lin , Chia-Chung Wang , Ming Yu Shih

IPC: H01L21/60

CPC classification number: H01L21/486 , H01L23/3677 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L33/483 , H01L33/642 , H01L2224/2919 , H01L2224/32188 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83855 , H01L2224/85207 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01046 , H01L2924/0105 , H01L2924/01058 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/12041 , H01L2924/181 , H01L2924/19041 , H05K1/0204 , H05K3/0061 , H05K2201/09054 , H05K2201/10106 , H05K2203/0369 , H01L2924/0665 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207

Abstract: A method of making a semiconductor chip assembly includes providing a post, a base, a support layer and an underlayer, wherein the post extends above the base and the support layer is sandwiched between the base and the underlayer, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a heat spreader that includes the post, the base, the underlayer and a thermal via that extends from the base through the support layer to the underlayer, then mounting a semiconductor device on the post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 一种制造半导体芯片组件的方法包括提供柱，基底，支撑层和底层，其中柱延伸到基底之上，并且支撑层夹在基底和底层之间，将粘合剂安装在基底上，包括将所述柱插入所述粘合剂的开口中，将导电层安装在所述粘合剂上，包括使所述柱与所述导电层中的孔对准，然后使所述粘合剂在所述柱和所述导电层之间向上流动，使所述粘合剂固化，轨迹，其包括衬垫，端子和导电层的选定部分，提供包括柱，基底，底层的散热器和从基底穿过支撑层延伸到底层的热通孔，然后安装在该柱上的半导体器件，将半导体器件电连接到导电迹线并将半导体器件热连接到第二半导体器件 e散热器。

123.

发明授权
Semiconductor chip assembly with post/base heat spreader and plated through-hole 有权
Title translation: 半导体芯片组装后置/底座散热器和电镀通孔

公开(公告)号：US08129742B2

公开(公告)日：2012-03-06

申请号：US13078928

申请日：2011-04-02

Applicant: Charles W. C. Lin , Chia-Chung Wang

Inventor： Charles W. C. Lin , Chia-Chung Wang

IPC: H01L33/00 , H01L23/367

CPC classification number: H01L21/486 , H01L23/3677 , H01L24/16 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L33/483 , H01L33/642 , H01L2224/2919 , H01L2224/29339 , H01L2224/32188 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2224/83855 , H01L2224/85207 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01046 , H01L2924/0105 , H01L2924/01058 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/12041 , H01L2924/16195 , H01L2924/181 , H01L2924/19041 , H05K1/0204 , H05K3/0061 , H05K2201/09054 , H05K2201/10106 , H05K2203/0369 , H01L2924/00014 , H01L2924/0665 , H01L2924/00 , H01L2924/00012

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal and a plated through-hole. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the plated through-hole.

Abstract translation: 半导体芯片组件包括半导体器件，散热器，导电迹线和粘合剂。散热器包括一个柱子和一个底座。导电迹线包括焊盘，端子和电镀通孔。半导体器件电连接到导电迹线并热连接到散热器。柱从基部向上延伸到粘合剂中的开口中，并且基部从柱横向延伸。导电迹线使用电镀通孔在焊盘和端子之间提供信号路由。

124.

发明授权
Method of making a semiconductor chip assembly with a bumped terminal, a filler and an insulative base 失效
Title translation: 制造具有凸起端子，填充物和绝缘基底的半导体芯片组件的方法

公开(公告)号：US07833827B1

公开(公告)日：2010-11-16

申请号：US11708839

申请日：2007-02-21

Applicant: Charles W. C. Lin , Cheng-Chung Chen

Inventor： Charles W. C. Lin , Cheng-Chung Chen

IPC: H01L23/48

CPC classification number: H01L21/4832 , H01L21/4846 , H01L21/486 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/82 , H01L25/0657 , H01L2221/68345 , H01L2221/68359 , H01L2221/68377 , H01L2224/05554 , H01L2224/18 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2224/83385 , H01L2224/92247 , H01L2225/0651 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0134 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/157 , H01L2924/1579 , H01L2924/181 , H01L2924/18165 , H01L2924/19041 , H01L2924/19043 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/3651 , H01L2924/00014 , H01L2924/00 , H01L2924/01026 , H01L2924/00012 , H01L2924/00015

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a filler, wherein the routing line contacts the bumped terminal and the filler, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then forming an insulative base that covers a peripheral portion of the bumped terminal.

Abstract translation: 制造半导体芯片组件的方法包括提供金属基座，布线线，凸起端子和填充物，其中布线线接触凸起端子和填充物，然后机械地将半导体芯片附接到金属基底，布线线，凸起端子和填料，然后形成密封剂，然后蚀刻金属基底以暴露凸起的端子，然后形成覆盖凸起端子的周边部分的绝缘基底。

125.

发明授权
Method of making a semiconductor chip assembly with thermal conductor and encapsulant grinding 失效
Title translation: 制造具有热导体和密封剂研磨的半导体芯片组件的方法

公开(公告)号：US07494843B1

公开(公告)日：2009-02-24

申请号：US11645488

申请日：2006-12-26

Applicant: Charles W. C. Lin , Chia-Chung Wang

Inventor： Charles W. C. Lin , Chia-Chung Wang

IPC: H01L21/44

CPC classification number: H01L23/3128 , H01L21/565 , H01L21/568 , H01L23/3677 , H01L23/42 , H01L24/16 , H01L24/24 , H01L24/30 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/82 , H01L25/105 , H01L2221/68345 , H01L2224/05001 , H01L2224/05024 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05571 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/16225 , H01L2224/27013 , H01L2224/29111 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/83051 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0133 , H01L2924/0134 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/18162 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/3651 , H01L2924/00014 , H01L2924/00 , H01L2924/01026 , H01L2924/01028 , H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes mechanically attaching a semiconductor chip to a routing line, forming a thermal conductor on the chip, forming an encapsulant that covers the chip and the thermal conductor, grinding the encapsulant without grinding the thermal conductor or the chip and then grinding the encapsulant and the thermal conductor without grinding the chip such that the encapsulant and the thermal conductor are laterally aligned.

Abstract translation: 制造半导体芯片组件的方法包括将半导体芯片机械地附接到布线线，在芯片上形成热导体，形成覆盖芯片和热导体的密封剂，研磨密封剂而不研磨热导体或芯片然后研磨密封剂和热导体而不研磨芯片，使得密封剂和热导体横向对准。

126.

发明授权
Semiconductor chip assembly with laterally aligned filler and insulative base 失效
Title translation: 具有横向排列的填料和绝缘基底的半导体芯片组件

公开(公告)号：US07453140B1

公开(公告)日：2008-11-18

申请号：US11604578

申请日：2006-11-27

Applicant: Charles W. C. Lin , Cheng-Chung Chen

Inventor： Charles W. C. Lin , Cheng-Chung Chen

IPC: H01L23/495 , H01L23/48 , H01L23/04

CPC classification number: H01L23/3128 , H01L21/4832 , H01L21/486 , H01L21/6835 , H01L23/49827 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/82 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05548 , H01L2224/05569 , H01L2224/056 , H01L2224/13008 , H01L2224/16 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/32245 , H01L2224/48247

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a filler, a connection joint that electrically connects the routing line and the pad, an encapsulant and an insulative base. The routing line contacts the filler and extends laterally beyond the filler, and the filler contacts the insulative base in an aperture that extends through the insulative base.

Abstract translation: 半导体芯片组件包括：半导体芯片，其包括导电焊盘，包括布线线和填充物的导电迹线，将布线线和焊盘电连接的连接接头，密封剂和绝缘基底。布线线接触填料并横向延伸穿过填料，填料与绝缘基体接触，孔穿过绝缘基体。

127.

发明授权
Method of connecting a conductive trace to a semiconductor chip using conductive adhesive 失效
Title translation: 使用导电粘合剂将导电迹线连接到半导体芯片的方法

公开(公告)号：US07264991B1

公开(公告)日：2007-09-04

申请号：US10292273

申请日：2002-11-12

Applicant: Charles W. C. Lin

Inventor： Charles W. C. Lin

IPC: H01L21/44

CPC classification number: H01L21/6835 , H01L21/56 , H01L21/565 , H01L23/295 , H01L23/3121 , H01L23/3164 , H01L23/3171 , H01L23/3677 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2221/68372 , H01L2221/68377 , H01L2221/68381 , H01L2224/02319 , H01L2224/02331 , H01L2224/0237 , H01L2224/02377 , H01L2224/02379 , H01L2224/0239 , H01L2224/036 , H01L2224/0401 , H01L2224/05548 , H01L2224/11002 , H01L2224/1132 , H01L2224/11334 , H01L2224/1146 , H01L2224/116 , H01L2224/13008 , H01L2224/131 , H01L2224/45124 , H01L2224/45144 , H01L2924/00014 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/19042 , H01L2924/3025 , H01L2924/01028 , H01L2221/68304 , H01L2924/0665 , H01L2924/06 , H01L2924/07025 , H01L2924/00 , H01L2224/48

Abstract: A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip that includes a conductive pad, providing a conductive trace, then disposing a conductive adhesive between the conductive trace and the chip, thereby mechanically attaching the conductive trace to the chip such that the conductive trace overlaps the pad and the conductive adhesive contacts and is sandwiched between and electrically connects the conductive trace and the pad, and then removing a portion of the conductive adhesive such that the conductive adhesive still contacts and is sandwiched between and electrically connects the conductive trace and the pad and the conductive adhesive no longer electrically connects the conductive trace to a conductor external to the chip.

Abstract translation: 将导电迹线连接到半导体芯片的方法包括提供包括导电焊盘的半导体芯片，提供导电迹线，然后在导电迹线和芯片之间布置导电粘合剂，从而将导电迹线机械地附接到芯片导电迹线与焊盘和导电粘合剂接触并且夹在导电迹线和焊盘之间并电连接导电迹线和焊盘，然后去除导电粘合剂的一部分，使得导电粘合剂仍然接触并夹在其中并电连接导电迹线和焊盘和导电粘合剂不再将导电迹线电连接到芯片外部的导体。

128.

发明授权
Method of making a semiconductor chip assembly using multiple etch steps to form a pillar after forming a routing line 失效
Title translation: 在形成路由线之后，使用多个蚀刻步骤制造半导体芯片组件以形成柱的方法

公开(公告)号：US07229853B2

公开(公告)日：2007-06-12

申请号：US11374343

申请日：2006-03-13

Applicant: Charles W. C. Lin

Inventor： Charles W. C. Lin

IPC: H01L21/48

CPC classification number: H01L21/486 , H01L21/4832 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49816 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05554 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49175 , H01L2224/73265 , H01L2224/83385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0134 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/351 , H01L2924/3651 , H01L2924/00014 , H01L2924/00 , H01L2924/01015 , H01L2924/01026 , H01L2924/01028 , H01L2924/3512 , H01L2924/00015 , H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that includes a conductive pad, mechanically attaching the chip to the routing line, electrically connecting the routing line to the pad, and etching the metal base using a first wet chemical that is selective of the metal plate and then a second wet chemical etch that is selective of the metal layer and the etch mask to form a pillar from an unetched portion of the metal base that contacts the routing line.

Abstract translation: 制造半导体芯片组件的方法包括提供包括金属板和金属层的金属基底，提供接触金属层的路由线和与金属板接触的蚀刻掩模，提供包括导电的半导体芯片衬垫，将芯片机械地附接到布线线路，将布线线电连接到衬垫，以及使用对金属板有选择性的第一湿化学品，然后对金属选择性的第二湿化学蚀刻来蚀刻金属基底层和蚀刻掩模，以从接触路线的金属基底的未蚀刻部分形成柱。

129.

发明授权
Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture 有权
Title translation: 在密封剂孔中制造具有金属柱的三维堆叠半导体封装的方法

公开(公告)号：US07129113B1

公开(公告)日：2006-10-31

申请号：US10971856

申请日：2004-10-22

Applicant: Charles W. C. Lin , Cheng-Lien Chiang

Inventor： Charles W. C. Lin , Cheng-Lien Chiang

IPC: H01L21/44

CPC classification number: H01L25/105 , H01L24/73 , H01L24/82 , H01L2224/05001 , H01L2224/05008 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05552 , H01L2224/05569 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05644 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/4824 , H01L2224/48465 , H01L2224/73204 , H01L2224/73215 , H01L2224/73265 , H01L2224/76155 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2924/00012

Abstract: A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar, providing a second semiconductor chip assembly that includes a second chip, a second conductive trace and a second encapsulant, wherein the second encapsulant includes a second aperture, and then positioning the first and second assemblies such that the first assembly overlaps the second assembly and the first metal pillar extends into the second aperture.

Abstract translation: 制造三维堆叠半导体封装的方法包括提供包括第一芯片，第一导电迹线和第一密封剂的第一半导体芯片组件，其中第一导电迹线包括第一金属柱，提供第二半导体芯片组件其包括第二芯片，第二导电迹线和第二密封剂，其中所述第二密封剂包括第二孔，然后定位所述第一和第二组件，使得所述第一组件与所述第二组件重叠，并且所述第一金属柱延伸到所述第二组件中光圈。