公开(公告)号：US20130122652A1

公开(公告)日：2013-05-16

申请号：US13298056

申请日：2011-11-16

申请人： Hsiu-Jen Lin ,  Chih-Wei Lin ,  Cheng-Ting Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Hsiu-Jen Lin ,  Chih-Wei Lin ,  Cheng-Ting Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/50

CPC分类号： H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/75283 ,  H01L2224/7598 ,  H01L2224/81005 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/8123 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/81

摘要： A method includes placing a cover over a lower package component, wherein the cover comprises an opening aligned to the lower package component. An upper package component is placed over the lower package component. The upper package component is aligned to the opening, and a solder region is dispose between the upper package component and the lower package component. The cover and the upper package component are exposed to a radiation to reflow the solder region.

摘要翻译： 一种方法包括将盖子放置在下部封装部件上，其中盖子包括与下部封装部件对准的开口。 上封装组件放置在下封装组件上。 上部封装部件与开口对准，并且焊接区域配置在上部封装部件和下部封装部件之间。 盖和上部封装部件暴露于辐射以回流焊接区域。

公开(公告)号：US20130119539A1

公开(公告)日：2013-05-16

申请号：US13298102

申请日：2011-11-16

申请人： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

发明人： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

IPC分类号： H05K1/11 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L23/49816 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L25/105 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/014 ,  H01L2924/00

摘要： A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A solder region is disposed in the polymer region and electrically coupled to the redistribution line. The solder region includes a second flat top surface not higher than the first flat top surface.

摘要翻译： 一种装置包括再分布线，以及在再分配线上模制的聚合物区域。 聚合物区域包括第一平坦顶表面。 焊料区域设置在聚合物区域中并电耦合到再分配线路。 焊料区域包括不高于第一平坦顶表面的第二平坦顶表面。

公开(公告)号：US20130113116A1

公开(公告)日：2013-05-09

申请号：US13291882

申请日：2011-11-08

申请人： Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chih Chun Chiu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chih Chun Chiu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/48 ,  H01L21/4853 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49816 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15321 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05647

摘要： A system and method for forming contacts is provided. An embodiment comprises forming the contacts on a substrate and then coining the contacts by physically shaping them using, e.g., a molding chamber. The physical shaping of the contacts may be performed using a patterned portion of the molding chamber or else by placing a patterned stencil around the contacts prior before a force is applied to physically reshape the contacts. The contacts may be reshaped into a cylindrical, oval, cuboid, or rectangular shape, for example.

公开(公告)号：US08405199B2

公开(公告)日：2013-03-26

申请号：US12832231

申请日：2010-07-08

申请人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Ming-Che Ho ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Ming-Che Ho ,  Chung-Shi Liu

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/11424 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2224/13655 ,  H01L2224/81 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05552

摘要： An embodiment of the disclosure includes a conductive pillar on a semiconductor die. A substrate is provided. A bond pad is over the substrate. A conductive pillar is over the bond pad. The conductive pillar has a top surface, edge sidewalls and a height. A cap layer is over the top surface of the conductive pillar. The cap layer extends along the edge sidewalls of the conductive pillar for a length. A solder material is over a top surface of the cap layer.

摘要翻译： 本公开的实施例包括半导体管芯上的导电柱。 提供基板。 焊盘在衬底上。 导电支柱位于接合垫上方。 导电柱具有顶表面，边缘侧壁和高度。 覆盖层在导电柱的顶表面之上。 盖层沿着导电柱的边缘侧壁延伸一段长度。 焊料材料在盖层的顶表面之上。

公开(公告)号：US20130062761A1

公开(公告)日：2013-03-14

申请号：US13228768

申请日：2011-09-09

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01L21/52 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06515 ,  H01L2224/09181 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00

摘要： Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.

公开(公告)号：US20120322255A1

公开(公告)日：2012-12-20

申请号：US13161303

申请日：2011-06-15

申请人： Ming-Da Cheng ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Tzong-Hann Yang ,  Wen-Hsiung Lu ,  Zheng-Yi Lim ,  Yi-Wen Wu ,  Chung-Shi Liu

发明人： Ming-Da Cheng ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Tzong-Hann Yang ,  Wen-Hsiung Lu ,  Zheng-Yi Lim ,  Yi-Wen Wu ,  Chung-Shi Liu

IPC分类号： H01L21/768

CPC分类号： H01L24/11 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1133 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2224/11

摘要： A system and method for forming metal bumps is provided. An embodiment comprises attaching conductive material to a carrier medium and then contacting the conductive material to conductive regions of a substrate. Portions of the conductive material are then bonded to the conductive regions using a bonding process to form conductive caps on the conductive regions, and residual conductive material and the carrier medium are removed. A reflow process is used to reflow the conductive caps into conductive bumps.

摘要翻译： 提供一种用于形成金属凸块的系统和方法。 一个实施例包括将导电材料附着到载体介质上，然后将导电材料接触到基底的导电区域。 然后使用接合工艺将导电材料的部分结合到导电区域，以在导电区域上形成导电盖，并且去除残留的导电材料和载体介质。 回流工艺用于将导电盖重新流到导电凸块中。

公开(公告)号：US08242011B2

公开(公告)日：2012-08-14

申请号：US13004376

申请日：2011-01-11

申请人： Zheng-Yi Lim ,  Yi-Wen Wu ,  Wen-Hsiung Lu ,  Chih-Wei Lin ,  Tzong-Huann Yang ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Zheng-Yi Lim ,  Yi-Wen Wu ,  Wen-Hsiung Lu ,  Chih-Wei Lin ,  Tzong-Huann Yang ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11824 ,  H01L2224/11827 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13583 ,  H01L2224/13693 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01078 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01082 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： The disclosure relates to fabrication of to a metal pillar. An exemplary method of fabricating a semiconductor device comprises the steps of providing a substrate having a contact pad; forming a passivation layer extending over the substrate having an opening over the contact pad; forming a metal pillar over the contact pad and a portion of the passivation layer; forming a solder layer over the metal pillar; and causing sidewalls of the metal pillar to react with an organic compound to form a self-assembled monolayer or self-assembled multi-layers of the organic compound on the sidewalls of the metal pillar.

摘要翻译： 本公开涉及制造金属柱。 制造半导体器件的示例性方法包括以下步骤：提供具有接触焊盘的衬底; 形成在所述衬底上延伸的钝化层，所述钝化层在所述接触焊盘上具有开口; 在所述接触焊盘和所述钝化层的一部分上形成金属柱; 在金属柱上形成焊料层; 并且使金属柱的侧壁与有机化合物反应，以在金属柱的侧壁上形成自组装单层或有机化合物的自组装多层。

公开(公告)号：US20110128481A1

公开(公告)日：2011-06-02

申请号：US12779915

申请日：2010-05-13

申请人： Chih-Wei Lin ,  Min-Cheng Wang ,  Yung-Cheng Chen ,  Hung-Min Liu

发明人： Chih-Wei Lin ,  Min-Cheng Wang ,  Yung-Cheng Chen ,  Hung-Min Liu

IPC分类号： G02F1/1335 ,  G02F1/167 ,  G01B11/00

CPC分类号： G01B11/24 ,  G01B5/061 ,  G01B11/00 ,  G01B11/02 ,  G01B11/0608 ,  G01B11/08 ,  G01B17/02 ,  G02F1/133512 ,  G02F1/13394 ,  G03F7/70625

摘要： A display device and a method of measuring a surface structure of the same are provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate in the first patterned light-shielding layer includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed in the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.

摘要翻译： 提供显示装置和测量其表面结构的方法。 显示装置包括第一和第二基板，第一和第二图案化遮光层以及第一和第二像素单元。 设置在第一基板的表面上的第一图案化遮光层包括第一开口。 设置在第一图案化遮光层中的第一基板的表面上的第二图案遮光层包括第二开口。 第一像素单元包括第一和第二突起。 第一突起相应地覆盖第一开口和第一图案化遮光层的一部分。 第二突起设置在第一和第二图案化的遮光层中。 第二像素单元包括对应地覆盖第二开口的第三突起和第二图案化遮光层的一部分，其中第二开口的尺寸小于第一开口的尺寸。

公开(公告)号：US20090327770A1

公开(公告)日：2009-12-31

申请号：US12473331

申请日：2009-05-28

申请人： Chih-Wei Lin ,  Chih-Wan Hsu ,  Nung-Te Huang

发明人： Chih-Wei Lin ,  Chih-Wan Hsu ,  Nung-Te Huang

IPC分类号： G06F1/26

CPC分类号： G06F1/263

摘要： A power supply system adopting two power supplies connected in parallel includes a first power supply comprising a first voltage-output terminal; a second power supply comprising a second voltage-output terminal; a first switch circuit comprising an input terminal connected to the first voltage-output terminal; a second switch circuit comprising an input terminal connected to the second voltage-output terminal; and a plug comprising a first pin connected to both an output terminal of the first switch circuit and an output terminal of the second switch circuit; wherein the voltage outputted from the first voltage-output terminal is equal to the voltage outputted from the second voltage-output terminal.

摘要翻译： 并联的采用两个电源的电源系统包括：第一电源，包括第一电压输出端子; 第二电源，包括第二电压输出端; 第一开关电路，包括连接到第一电压 - 输出端的输入端; 第二开关电路，包括连接到第二电压输出端子的输入端子; 以及插头，包括连接到所述第一开关电路的输出端子和所述第二开关电路的输出端子的第一引脚; 其中从所述第一电压输出端子输出的电压等于从所述第二电压输出端子输出的电压。

公开(公告)号：US20090295357A1

公开(公告)日：2009-12-03

申请号：US12470424

申请日：2009-05-21

申请人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

发明人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

IPC分类号： G05F1/618

CPC分类号： H02M3/1584 ,  H02M3/157 ,  H02M2001/0032 ,  H02M2003/1586 ,  Y02B70/16

摘要： A control method of a variable-frequency and multi-phase voltage regulator module is provided. The variable-frequency and multi-phase voltage regulator module is connected to a central processing unit and embedded on a motherboard for providing a central-processing-unit current. The control method includes steps of: detecting an intensity of a central-processing-unit current of the central processing unit; providing a power to the central processing unit via M number of phases based on a first switching frequency if the intensity of the central-processing-unit current is greater than a reference-current value; and providing a power to the central processing unit via N number of phases based on a second switching frequency if the intensity of the central-processing-unit current is less than the reference-current value.

摘要翻译： 提供了一种变频和多相电压调节器模块的控制方法。 可变频率和多相电压调节器模块连接到中央处理单元并嵌入在主板上以提供中央处理单元电流。 该控制方法包括以下步骤：检测中央处理单元的中央处理单元电流的强度; 如果中央处理单元电流的强度大于参考电流值，则基于第一开关频率经由M个相位来向中央处理单元提供电力; 以及如果所述中央处理单元电流的强度小于所述基准电流值，则基于第二开关频率经由N个相位来向所述中央处理单元提供电力。