公开(公告)号：US08300425B2

公开(公告)日：2012-10-30

申请号：US12184086

申请日：2008-07-31

Applicant: Nader Gamini ,  Joseph C. Fjelstad

Inventor： Nader Gamini ,  Joseph C. Fjelstad

IPC: H05K7/02

CPC classification number: H05K1/185 ,  H01L25/105 ,  H01L25/16 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/3025 ,  H05K1/023 ,  H05K3/284 ,  H05K3/4664 ,  H05K2201/10515 ,  H05K2201/10628 ,  H05K2201/10636 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/1469 ,  Y02P70/611 ,  H01L2924/00

Abstract: An apparatus is disclosed that improves density of electrical components in a circuit assembly. Electrical components 202, 204 are stacked so that they overlap each other and are encapsulated in an electronic insulating material 104. The resulting subassembly may be integrated onto a printed circuit board or into a reverse-interconnection process assembly.

Abstract translation: 公开了一种提高电路组件中的电气部件的密度的装置。 电子部件202,204被堆叠成使得它们彼此重叠并且被封装在电子绝缘材料104中。所得到的子组件可以集成到印刷电路板或反向互连工艺组件中。

公开(公告)号：US20120012365A1

公开(公告)日：2012-01-19

申请号：US13107911

申请日：2011-05-14

Applicant: GABE CHERIAN ,  Don Ellison Saunders

Inventor： GABE CHERIAN ,  Don Ellison Saunders

IPC: H05K1/00

CPC classification number: H05K3/3426 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/49555 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L24/742 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1012 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73251 ,  H01L2224/73257 ,  H01L2224/81903 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K3/308 ,  H05K2201/09418 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10825 ,  H05K2201/10871 ,  H05K2201/10946 ,  H05K2201/10977 ,  H05K2203/0769 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/72

Abstract: The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices. The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling and thermal fluctuations. The invention more specifically shows certain improvements related to its mother patent application, called Thermal Flex Contact Carrier (TFCC), where the improvements allow the height of the contact elements to be now not restricted anymore by the size of the spaces or distances between the contact pads of the devices to be attached together. Certain improvements to the carrier wafer are also shown.

Abstract translation: 本发明一般涉及电子设备之间的永久互连，例如集成电路封装，芯片，晶片和印刷电路板或基板或类似的电子设备。 更具体地说，涉及高密度电子设备。 本发明描述了可用于抵消热循环和热波动的不期望的影响的手段和方法。 本发明更具体地示出了与其母版专利申请（称为热弹性接触载体（TFCC））相关的某些改进，其中改进使得接触元件的高度现在不再受限于接触的空间或距离之间的距离 要连接在一起的设备的垫。 还示出了对载体晶片的某些改进。

公开(公告)号：US07989946B2

公开(公告)日：2011-08-02

申请号：US12882322

申请日：2010-09-15

Applicant: Henning Braunisch ,  Kemal Aygun

Inventor： Henning Braunisch ,  Kemal Aygun

IPC: H01L23/48

CPC classification number: H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

Abstract translation: 具有至少两个端点的多模系统可以包括在一些实施例中是多模电缆或多模板并且可插​​拔地连接到每个端点处的封装的多模信令路径。 每个端点可以包括耦合到插座的处理器管芯封装。 插座还可以接收将电缆耦合到封装的连接器。 电源信号和输入/输出信号可以在每个端点解耦。

公开(公告)号：US20110096521A1

公开(公告)日：2011-04-28

申请号：US12526426

申请日：2008-02-12

Applicant: Michael Randall ,  Renner Garry ,  John D. Prymak ,  Tajuddin Azizuddin

Inventor： Michael Randall ,  Renner Garry ,  John D. Prymak ,  Tajuddin Azizuddin

IPC: H01R12/70

CPC classification number: H05K1/0231 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/3011 ,  H05K1/141 ,  H05K2201/10378 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: A capacitive interposer, electronic package having the capacitive interposer and electronic device with the electronic package is described. The interposer has a first planar face and a second planar face. An array of upper connections is on the first planar face and opposing lower connections are on the second planar face with conduction paths between each upper connection of the upper connections and a lower connection of the lower connections. At least one power feed-through capacitor is provided. The capacitor has a plurality of parallel plates with a dielectric there between. At least one first external termination is in electrical contact with a first set of alternate parallel plates and at least one second external termination is in electrical contact with a second set of alternate parallel plates. The capacitor is mounted on the first planar face with the first external termination in direct electrical contact with a first upper connection and the second external termination is in direct electrical contact with a second upper connection. At least one upper connection, first external termination and second external termination are arranged for direct electrical contact with element contact pads of a common element.

Abstract translation: 描述了一种电容式插入器，具有电容插入器的电子封装和具有电子封装的电子器件。 插入器具有第一平面和第二平面。 上连接的阵列位于第一平面上，相对的下连接在第二平面上，上连接的每个上连接与下连接的下连接之间具有传导路径。 提供至少一个馈电电容器。 电容器具有多个平行板，其间具有电介质。 至少一个第一外部端接件与第一组交替的平行板电接触，并且至少一个第二外部端接件与第二组交替的平行板电接触。 电容器安装在第一平面上，第一外部端子与第一上连接件直接电接触，第二外部端子与第二上连接件直接电接触。 至少一个上部连接，第一外部端接和第二外部端接布置成与公共元件的元件接触垫直接电接触。

公开(公告)号：US07759781B2

公开(公告)日：2010-07-20

申请号：US11552256

申请日：2006-10-24

Applicant: Hideto Furuyama ,  Hiroshi Hamasaki

Inventor： Hideto Furuyama ,  Hiroshi Hamasaki

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0268 ,  H05K1/141 ,  H05K7/023 ,  H05K2201/049 ,  H05K2201/10704 ,  H05K2201/10719 ,  H01L2924/00

Abstract: A LSI package encompasses: an interposer having board-connecting joints, which facilitate connection with a printed wiring board, and module-connecting terminals, part of the module-connecting terminals are assigned as interposer-site monitoring terminals; a signal processing LSI mounted on the interposer; and an I/F module having a plurality of interposer-connecting terminals, which are arranged to correspond to arrangement of the module-connecting terminals, and a transmission line to establish an external interconnection of signal, which is transmitted from the signal processing LSI, part of the interposer-connecting terminals are assigned as module-site monitoring terminals. The interposer-site and module-site monitoring terminals are configured to flow a monitoring current to confirm electric contact between the signal processing LSI and the I/F module.

Abstract translation: LSI封装包括：具有板连接接头的插入件，其便于与印刷线路板的连接，以及模块连接端子，部分模块连接端子被分配为插入器位置监视端子; 安装在所述插入器上的信号处理LSI; 以及具有多个插入器连接端子的I / F模块，其被配置为对应于模块连接端子的配置，以及传输线，用于建立从信号处理LSI发送的信号的外部互连， 插入器连接端子的一部分被分配为模块站点监视终端。 中介站点和模块现场监视终端被配置为流动监视电流以确认信号处理LSI和I / F模块之间的电接触。

公开(公告)号：US07652381B2

公开(公告)日：2010-01-26

申请号：US11055578

申请日：2005-02-09

Applicant: Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

Inventor： Kevin P. Grundy ,  Joseph C. Fjelstad ,  Gary Yasumura ,  William F. Wiedemann ,  Para K. Segaram

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/13 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16235 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/182 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1053 ,  H05K2201/10545 ,  H05K2201/1059 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.

Abstract translation: 由多个封装，印刷电路板，连接器和插入件采用的结构，以产生减少与使用通孔相关联的有害信号质量问题的信号路径。 公开的结构可以与通孔实现共存。

公开(公告)号：US07558072B2

公开(公告)日：2009-07-07

申请号：US11339582

申请日：2006-01-26

Applicant: Yueh-Chih Chen ,  Kai-Shun Chang

Inventor： Yueh-Chih Chen ,  Kai-Shun Chang

IPC: H01R12/16

CPC classification number: H05K7/1092 ,  H05K1/141 ,  H05K2201/049 ,  H05K2201/10325 ,  H05K2201/10704

Abstract: An adapter module is described. The adapter module includes a circuit board, a first socket and an adapter device. One face of the first socket is electrically connected to the circuit board on the first face of the circuit. The other face of the first socket connects to a first central processing unit (CPU). One face of the adapter base is electrically connected to the circuit board on the second face of the circuit board. The other face of the adapter base connects to a second socket. The circuit board sends signals from the second socket, through the adapter base and the first socket, to the first CPU. When the adapter base is not connected to the second socket, the second socket is capable of connecting to a second kind of CPU.

Abstract translation: 描述适配器模块。 适配器模块包括电路板，第一插座和适配器装置。 第一插座的一个面电连接到电路的第一面上的电路板。 第一插座的另一面连接到第一中央处理单元（CPU）。 适配器基座的一个面电连接到电路板的第二面上的电路板。 适配器底座的另一面连接到第二个插座。 电路板通过适配器底座和第一个插座将信号从第二个插座发送到第一个CPU。 当适配器底座未连接到第二个插座时，第二个插座能够连接到第二种CPU。

公开(公告)号：US20090145633A1

公开(公告)日：2009-06-11

申请号：US12262662

申请日：2008-10-31

Applicant: Ashur S. Bet-Shliemoun

Inventor： Ashur S. Bet-Shliemoun

IPC: H05K1/00

CPC classification number: H05K3/3426 ,  H05K2201/10333 ,  H05K2201/10424 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10757 ,  Y02P70/613

Abstract: A direct attach interconnect includes a housing and spring contacts. The housing has top and bottom sides lying in parallel planes defined by x and y axes. The spring contacts are individually disposed within a passage in the housing such that a top end of the spring contacts extends out through the top housing side and a bottom end of the spring contacts extend out through the bottom housing side. The middle portion of each spring contact includes a connector which movably connects the middle portion of the spring contact to the passage for the spring contact such that the spring contact is movable along the x, y, and z axes. The bottom end of each spring contact includes a solder sphere and a solder pad. The top end of each spring contact is a land grid array or a pin rid array socket connector.

Abstract translation: 直接连接互连包括外壳和弹簧触点。 壳体具有顶部和底部位于由x和y轴限定的平行平面中。 弹簧触头单独地设置在壳体内的通道内，使得弹簧触头的顶端通过顶部壳体侧延伸出，并且弹簧触头的底端通过底部壳体侧延伸出来。 每个弹簧触点的中间部分包括连接器，该连接器将弹簧触头的中间部分可移动地连接到用于弹簧触头的通道，使得弹簧触头可沿x，y和z轴移动。 每个弹簧触点的底端包括焊球和焊垫。 每个弹簧触点的顶端是一个焊盘阵列或针阵列插座连接器。

公开(公告)号：US07535090B2

公开(公告)日：2009-05-19

申请号：US11015013

申请日：2004-12-20

Applicant: Hideto Furuyama ,  Hiroshi Hamasaki

Inventor： Hideto Furuyama ,  Hiroshi Hamasaki

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0268 ,  H05K1/141 ,  H05K7/023 ,  H05K2201/049 ,  H05K2201/10704 ,  H05K2201/10719 ,  H01L2924/00

Abstract: A LSI package encompasses: an interposer having board-connecting joints, which facilitate connection with a printed wiring board, and module-connecting terminals, part of the module-connecting terminals are assigned as interposer-site monitoring terminals; a signal processing LSI mounted on the interposer; and an I/F module having a plurality of interposer-connecting terminals, which are arranged to correspond to arrangement of the module-connecting terminals, and a transmission line to establish an external interconnection of signal, which is transmitted from the signal processing LSI, part of the interposer-connecting terminals are assigned as module-site monitoring terminals. The interposer-site and module-site monitoring terminals are configured to flow a monitoring current to confirm electric contact between the signal processing LSI and the I/F module.

Abstract translation: LSI封装包括：具有板连接接头的插入件，其便于与印刷线路板的连接，以及模块连接端子，部分模块连接端子被分配为插入器位置监视端子; 安装在所述插入器上的信号处理LSI; 以及具有多个插入器连接端子的I / F模块，其被配置为对应于模块连接端子的配置，以及传输线，用于建立从信号处理LSI发送的信号的外部互连， 插入器连接端子的一部分被分配为模块站点监视终端。 中介站点和模块现场监视终端被配置为流动监视电流以确认信号处理LSI与I / F模块之间的电接触。

公开(公告)号：US20080054437A1

公开(公告)日：2008-03-06

申请号：US11851284

申请日：2007-09-06

Applicant: Sung-Wook HWANG

Inventor： Sung-Wook HWANG

IPC: H01L23/52 ,  H01L21/00

CPC classification number: H05K1/181 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/10946 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package-on-package (POP) package in which semiconductor packages are stacked using lead lines rather than conventional solder balls, and a fabricating method thereof are provided. According to the POP package and the fabricating method thereof of the present invention, the POP package is prevented from being short-circuited even when an underlying semiconductor package gets thicker and the POP package can sufficiently withstand deformation caused by post-fabrication warpage.

Abstract translation: 一种封装封装（POP）封装，其中使用引线而不是常规焊球堆叠半导体封装，并提供其制造方法。 根据本发明的POP封装及其制造方法，即使下面的半导体封装变厚并且POP封装能够充分地承受由后制造翘曲引起的变形，也可以防止POP封装短路。