公开(公告)号：US20080098597A1

公开(公告)日：2008-05-01

申请号：US11976072

申请日：2007-10-19

Applicant: Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

IPC: H05K3/02

CPC classification number: H05K3/20 ,  H05K3/0058 ,  H05K3/108 ,  H05K3/4611 ,  H05K3/4682 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method of manufacturing a circuit board is disclosed. A method of manufacturing a circuit board that includes forming a first circuit pattern on the insulation layer of a carrier, in which an insulation layer and a first seed layer are stacked in order; stacking and pressing the carrier and an insulation board with the side of the carrier having the first circuit pattern facing the insulation board; removing the carrier to transfer the first circuit pattern and the insulation layer onto the insulation board; and forming a second circuit pattern on the insulation layer transferred to the insulation board, allows fine pitch circuit patterns to enable the manufacture of fine circuit patterns of high density on the board, and allows the manufacture of a multi-layer circuit board with a simple process.

Abstract translation: 公开了一种制造电路板的方法。 一种制造电路板的方法，包括在载体的绝缘层上形成第一电路图案，其中绝缘层和第一种子层依次层叠; 堆叠并按压载体和绝缘板，其中载体侧具有面向绝缘板的第一电路图案; 移除载体以将第一电路图案和绝缘层转移到绝缘板上; 并且在转移到绝缘板的绝缘层上形成第二电路图案，允许精细的间距电路图案能够在板上制造高密度的精细电路图案，并且允许制造具有简单的多层电路板 处理。

公开(公告)号：US20080098596A1

公开(公告)日：2008-05-01

申请号：US11976071

申请日：2007-10-19

Applicant: Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

Inventor： Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

IPC: H05K3/20

CPC classification number: H05K3/20 ,  H05K3/205 ,  H05K3/207 ,  H05K3/386 ,  H05K2203/0113 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49163

Abstract: A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.

Abstract translation: 公开了一种形成转录电路的方法及其制造方法。 一种形成转录电路的方法，其包括通过在模板上选择性地形成抗蚀剂来形成对应于电路图案的凹版图案，将导电材料填充到凹版图案中，以及通过将载体压载到载体上而将载体转移到 使得载体面向具有填充有导电材料的模板的表面的模板，使得可以形成可以使用现有设备转录成绝缘板的转录电路，由此可以降低成本。

公开(公告)号：US07206487B2

公开(公告)日：2007-04-17

申请号：US11150981

申请日：2005-06-13

Applicant: Jeong Woo Park ,  Hyun Sung Ko ,  Eun Deok Sim ,  Yong Soon Baek

Inventor： Jeong Woo Park ,  Hyun Sung Ko ,  Eun Deok Sim ,  Yong Soon Baek

IPC: G02B6/10

CPC classification number: G02B6/1228 ,  G02B6/305 ,  G02B2006/12123 ,  G02B2006/12126

Abstract: Provided is a waveguide photodetector including: a first clad layer disposed on a substrate; a core layer disposed on the first clad layer and for absorbing predetermined light; a second clad layer disposed on the core layer; and at least one subsidiary layer inserted in the first clad layer and the second clad layer. In this structure, the photodetector has about the same spot size as that of an optical fiber or planar lightwave circuit (PLC), so that incident light can be absorbed without loss, and the photodetector can more efficiently combine with the optical fiber or PLC and operate even at high power.

Abstract translation: 提供一种波导光电检测器，包括：设置在基板上的第一包层; 芯层，设置在第一包层上并用于吸收预定的光; 设置在所述芯层上的第二覆层; 以及插入在第一包层和第二包层中的至少一个辅助层。 在这种结构中，光电检测器具有与光纤或平面光波电路（PLC）大致相同的光点尺寸，从而可以无损耗地吸收入射光，并且光电检测器可以更有效地与光纤或PLC组合， 即使在高功率下也能运行。

公开(公告)号：US08761553B2

公开(公告)日：2014-06-24

申请号：US13302371

申请日：2011-11-22

Applicant: Sahnggi Park ,  Gyungock Kim ,  In Gyoo Kim ,  Jeong Woo Park ,  Sang Hoon Kim ,  Do Won Kim

Inventor： Sahnggi Park ,  Gyungock Kim ,  In Gyoo Kim ,  Jeong Woo Park ,  Sang Hoon Kim ,  Do Won Kim

IPC: G02B6/26 ,  G02B6/12

CPC classification number: H04J14/028 ,  G02B6/12007 ,  H01S5/026 ,  H01S5/1032 ,  H01S5/4087 ,  H04J14/02 ,  H04J14/0201

Abstract: Provided is an optical network structure. To configure an optical network structure between hundreds or more of cores in a CPU, intersection between waveguides does not occur, and thus, the optical network structure enables two-way communication between all the cores without an optical switch disposed in an intersection point. The present invention enables a single chip optical network using a silicon photonics optical element, and a CPU chip configured with hundreds or thousands of cores can be developed.

Abstract translation: 提供了一种光网络结构。 为了在CPU中配置数百个或更多个核心之间的光网络结构，不会发生波导之间的交叉，因此，光网络结构在所有核心之间实现双向通信，而光交换机不设置在交叉点。 本发明使得能够使用硅光子学光学元件的单芯片光网络，并且可以开发配置有数百或数千个核的CPU芯片。

公开(公告)号：US08710657B2

公开(公告)日：2014-04-29

申请号：US13242864

申请日：2011-09-23

Applicant: Jeong-woo Park ,  Moon-gi Cho ,  Ui-hyoung Lee ,  Sun-hee Park

Inventor： Jeong-woo Park ,  Moon-gi Cho ,  Ui-hyoung Lee ,  Sun-hee Park

IPC: H01L21/44

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13171 ,  H01L2224/13193 ,  H01L2224/14051 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Semiconductor packages connecting a semiconductor chip to an external device by bumps are provided. The semiconductor packages may include a connection pad on a semiconductor chip, a connecting bump on and configured to be electrically connected to the connection pad and a supporting bump on the semiconductor chip and configured to be electrically isolated from the connection pad. The connection bump may include a first pillar and a first solder ball and the supporting bump may include a second pillar and a second solder ball. The semiconductor packages may further include a solder channel in the second pillar configured to allow a portion of the second solder ball to extend into the solder channel along a predetermined direction.

Abstract translation: 提供了通过凸块将半导体芯片连接到外部设备的半导体封装。 半导体封装可以包括半导体芯片上的连接焊盘，连接焊盘，并且构造成电连接到连接焊盘，并且在半导体芯片上具有支撑突起，并且被配置为与连接焊盘电隔离。 连接凸起可以包括第一柱和第一焊球，并且支撑凸起可以包括第二柱和第二焊球。 半导体封装还可以包括在第二柱中的焊料通道，其被配置为允许第二焊球的一部分沿着预定方向延伸到焊料通道中。

公开(公告)号：US08633392B2

公开(公告)日：2014-01-21

申请号：US13354438

申请日：2012-01-20

Applicant: Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

Inventor： Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

IPC: H05K1/02

CPC classification number: H05K1/0265 ,  H05K1/116 ,  H05K3/107 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361

Abstract: A circuit board including: an insulator having a trench; a first circuit pattern formed to bury a portion of the trench; and a second circuit pattern formed on a surface of the insulator having the trench formed therein.

Abstract translation: 一种电路板，包括：具有沟槽的绝缘体; 形成为埋入沟槽的一部分的第一电路图案; 以及形成在其中形成有沟槽的绝缘体的表面上的第二电路图案。

公开(公告)号：US08610094B2

公开(公告)日：2013-12-17

申请号：US13615144

申请日：2012-09-13

Applicant: Namje Kim ,  Kyung Hyun Park ,  Sang-Pil Han ,  Hyunsung Ko ,  Jeong Woo Park ,  Han-Cheol Ryu

Inventor： Namje Kim ,  Kyung Hyun Park ,  Sang-Pil Han ,  Hyunsung Ko ,  Jeong Woo Park ,  Han-Cheol Ryu

IPC: B01J19/12

CPC classification number: G02F2/002 ,  G02F1/3534 ,  G02F2203/13

Abstract: Disclosed is a terahertz wave generator which includes a first light source outputting a first light having a first frequency; a second light source outputting a second light having a second frequency different from the first frequency; a second harmonic generation unit performing second harmonic conversion on the first and second lights to generate a third light and a fourth light; and a photomixer converting a mixing light of the third and fourth lights into a terahertz wave alternating signal and outputting a terahertz wave.

Abstract translation: 公开了一种太赫兹波发生器，其包括输出具有第一频率的第一光的第一光源; 输出具有与第一频率不同的第二频率的第二光的第二光源; 二次谐波发生单元，对所述第一和第二光进行二次谐波变换，以产生第三光和第四光; 以及将第三和第四光的混合光转换成太赫兹波交变信号并输出​​太赫兹波的光混合器。

公开(公告)号：US08548281B2

公开(公告)日：2013-10-01

申请号：US12872881

申请日：2010-08-31

Applicant: Gyungock Kim ,  Jeong Woo Park ,  Jongbum You ,  Sang Gi Kim ,  Sanghoon Kim ,  In Gyoo Kim ,  Jiho Joo ,  Duk Jun Kim ,  Dongwoo Suh ,  Sahnggi Park ,  Ki Seok Jang ,  Junghyung Pyo ,  Kap-Joong Kim ,  Do Won Kim ,  Dae Seo Park

Inventor： Gyungock Kim ,  Jeong Woo Park ,  Jongbum You ,  Sang Gi Kim ,  Sanghoon Kim ,  In Gyoo Kim ,  Jiho Joo ,  Duk Jun Kim ,  Dongwoo Suh ,  Sahnggi Park ,  Ki Seok Jang ,  Junghyung Pyo ,  Kap-Joong Kim ,  Do Won Kim ,  Dae Seo Park

IPC: G02F1/025

CPC classification number: G02F1/025 ,  G02F2201/063

Abstract: Provided is an electro-optic modulating device. The electro-optic modulating device includes an optical waveguide with a vertical structure and sidewalls of the vertical structure are used to configure a junction.

Abstract translation: 提供了一种电光调制装置。 电光调制装置包括具有垂直结构的光波导，垂直结构的侧壁用于构造接合部。

公开(公告)号：US08520985B2

公开(公告)日：2013-08-27

申请号：US12975161

申请日：2010-12-21

Applicant: Jeong Woo Park ,  Gyungock Kim

Inventor： Jeong Woo Park ,  Gyungock Kim

IPC: G02F1/025 ,  G02F1/035

CPC classification number: G02F1/025 ,  G02F1/2257 ,  G02F2001/212 ,  G02F2201/12 ,  G02F2202/105

Abstract: Provided is a Mach-Zehnder modulator. The Mach-Zehnder modulator comprises an input wave guide and an output wave guide arranged on a substrate, a first branch wave guide and a second branch wave guide connected in parallel between the input and output wave guides, and a connecting region configured to connect the first branch wave guide and the second branch wave guide. Each of the first and second branch wave guides comprises first doped regions doped with a first dopant and second doped regions doped with a second dopant having different conductivity from the first dopant, and the connecting region is doped with the first dopant and arranged between the first regions of the first and second branch wave guides.

Abstract translation: 提供了马赫 - 曾德尔调制器。 马赫 - 策德尔调制器包括布置在基板上的输入波导和输出波导，在输入和输出波导之间并联连接的第一分支波导和第二分支波导，以及连接区域， 第一分支波导和第二分支波导。 第一和第二分支波导中的每一个包括掺杂有第一掺杂物的第一掺杂区域和掺杂有与第一掺杂剂不同导电性的第二掺杂剂的第二掺杂区域，并且连接区域掺杂有第一掺杂剂并且布置在第一掺杂区域之间 第一和第二分支波导的区域。

公开(公告)号：US08464423B2

公开(公告)日：2013-06-18

申请号：US13373387

申请日：2011-11-14

Applicant: Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

Inventor： Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

IPC: H01R9/00 ,  H01R43/16 ,  H01R43/00 ,  H05K3/00 ,  H05K3/02 ,  H05K3/10

CPC classification number: H05K1/111 ,  H05K1/09 ,  H05K1/115 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0323 ,  H05K2203/0376 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: A method of manufacturing a printed circuit board having a metal bump, including: forming a recess for creation of the metal bump on a first carrier, forming a first barrier layer on the first carrier, and forming an upper circuit layer on the first barrier layer, the upper circuit layer including a metal bump charged in the recess and a circuit pattern; forming a second barrier layer on a second carrier, and forming a lower circuit layer on the second barrier layer; preparing an insulating layer, and transferring the upper and lower circuit layers to the insulating layer; removing the first and second carriers; and removing the first and second barrier layers.

Abstract translation: 一种制造具有金属凸块的印刷电路板的方法，包括：在第一载体上形成用于形成金属凸块的凹部，在第一载体上形成第一阻挡层，并在第一阻挡层上形成上电路层 所述上电路层包括充电在所述凹部中的金属凸块和电路图案; 在第二载体上形成第二阻挡层，并在第二阻挡层上形成下电路层; 制备绝缘层，并将上下电路层转移到绝缘层; 移除第一和第二载体; 以及去除所述第一和第二阻挡层。