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    Method and apparatus for testing bumped die
    42.
    发明申请
    Method and apparatus for testing bumped die 审中-公开

    公开(公告)号：US20070090855A1

    公开(公告)日：2007-04-26

    申请号：US11600994

    申请日：2006-11-17

    Applicant: James Wark

    Inventor： James Wark

    IPC: G01R31/26

    CPC classification number: G01R1/07307 ,  G01R1/0483 ,  G01R31/2831 ,  G01R31/2886 ,  H05K3/325 ,  H05K3/4007

    Abstract: An apparatus for testing unpackaged semiconductor dice having raised ball contact locations is disclosed. The apparatus uses a temporary interconnect wafer that is adapted to establish an electrical connection with the raised ball contact locations on the die without damage to the ball contact locations. The interconnect is fabricated on a substrate, such as silicon, where contact members are formed in a pattern that matches the size and spacing of the ball contact locations on the die to be tested. The contact members on the interconnect wafer are formed as either pits, troughs, or spike contacts. The spike contacts penetrate through the oxide layer formed on the raised ball contact locations. Conductive traces are provided in both rows and columns and are terminated on the inner edges of the walls of the pits formed in the substrate.

    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making
    44.
    发明申请
    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making 有权
    衬底中的斜槽，弹簧状偏转触点，以及制作方法

    公开(公告)号：US20070045857A1

    公开(公告)日：2007-03-01

    申请号：US11588977

    申请日：2006-10-27

    Applicant: James Wark ,  Syed Ahmad

    Inventor： James Wark ,  Syed Ahmad

    IPC: H01L23/48 ,  H01L23/52

    CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/0029 ,  H05K3/0041 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09836 ,  H01L2924/00

    Abstract: Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed within the substrate to have a longitudinal axis sloped at an angle with respect to a reference line extending perpendicular to the first surface and the second surface of the substrate. The vias may be formed from the first surface to the opposing second surface, or the via may be formed as a first blind opening from the first surface, then a second opening may be formed from the second surface to be aligned with the first opening. Vias may be formed completely through a first substrate and a second substrate, and the substrates may be bonded together. Semiconductor devices including the vias of the present invention are also disclosed. A method of forming spring-like contacts is also disclosed.

    Abstract translation: 公开了形成通孔的方法。 所述方法包括提供具有第一表面和相对的第二表面的基底。 通孔形成在衬底内，以具有相对于垂直于衬底的第一表面和第二表面延伸的参考线成一定角度倾斜的纵向轴线。 通孔可以由第一表面形成到相对的第二表面，或者通孔可以从第一表面形成为第一盲孔，然后可以从第二表面形成第二开口以与第一开口对准。 可以通过第一基板和第二基板完全形成通孔，并且基板可以结合在一起。 还公开了包括本发明的通孔的半导体器件。 还公开了一种形成弹簧状触点的方法。

    Spacers for packaged microelectronic imagers and methods of making and using spacers for wafer-level packaging of imagers
    47.
    发明申请
    Spacers for packaged microelectronic imagers and methods of making and using spacers for wafer-level packaging of imagers 有权
    用于封装的微电子成像器的间隔器以及制造和使用间隔件用于成像器的晶片级封装的方法

    公开(公告)号：US20060234422A1

    公开(公告)日：2006-10-19

    申请号：US11451398

    申请日：2006-06-13

    Applicant: Warren Farnworth ,  Alan Wood ,  James Wark ,  David Hembree ,  Rickie Lake

    Inventor： Warren Farnworth ,  Alan Wood ,  James Wark ,  David Hembree ,  Rickie Lake

    IPC: H01L21/00

    CPC classification number: H01L31/0203 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14683 ,  H01L2224/48227 ,  H01L2224/48091 ,  H01L2924/00014

    Abstract: Methods of packaging microelectronic imagers and packaged microelectronic imagers. An embodiment of such a method can include providing an imager workpiece having a plurality of imager dies arranged in a die pattern and providing a cover substrate through which a desired radiation can propagate. The imager dies include image sensors and integrated circuitry coupled to the image sensors. The method further includes providing a spacer having a web that includes an adhesive and has openings arranged to be aligned with the image sensors. For example, the web can be a film having an adhesive coating, or the web itself can be a layer of adhesive. The method continues by assembling the imager workpiece with the cover substrate such that (a) the spacer is between the imager workpiece and the cover substrate, and (b) the openings are aligned with the image sensors. The attached web is not cured after the imager workpiece and the cover substrate have both been adhered to the web. As such, the web does not outgas contaminants into the compartments in which the image sensors are housed.

    Abstract translation: 包装微电子成像仪和封装的微电子成像仪的方法。 这种方法的实施例可以包括提供具有以模片图案布置的多个成像模具的成像工件，并提供覆盖基板，期望的辐射可以通过该基板传播。 成像器裸片包括耦合到图像传感器的图像传感器和集成电路。 该方法还包括提供具有包括粘合剂并具有布置成与图像传感器对准的开口的腹板的间隔件。 例如，网可以是具有粘合剂涂层的膜，或者网本身可以是一层粘合剂。 该方法通过将成像器工件与盖基板组装成使得（a）间隔件位于成像器工件和盖基板之间，并且（b）开口与图像传感器对准，该方法继续。 在成像器工件和盖基板都已经粘附在卷材上之后，连接的卷材不固化。 因此，纸幅不会将污染物排出到其中容纳图像传感器的隔室中。

    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making
    48.
    发明申请
    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making 有权
    衬底中的斜槽，弹簧状偏转触点，以及制作方法

    公开(公告)号：US20060046475A1

    公开(公告)日：2006-03-02

    申请号：US10933847

    申请日：2004-09-02

    Applicant: James Wark ,  Syed Ahmad

    Inventor： James Wark ,  Syed Ahmad

    IPC: H01L21/44

    CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/0029 ,  H05K3/0041 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09836 ,  H01L2924/00

    Abstract: Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed within the substrate to have a longitudinal axis sloped at an angle with respect to a reference line extending perpendicular to the first surface and the second surface of the substrate. The vias may be formed from the first surface to the opposing second surface, or the via may be formed as a first blind opening from the first surface, then a second opening may be formed from the second surface to be aligned with the first opening. Vias may be formed completely through a first substrate and a second substrate, and the substrates may be bonded together. Semiconductor devices including the vias of the present invention are also disclosed. A method of forming spring-like contacts is also disclosed.

    Abstract translation: 公开了形成通孔的方法。 所述方法包括提供具有第一表面和相对的第二表面的基底。 通孔形成在衬底内，以具有相对于垂直于衬底的第一表面和第二表面延伸的参考线成一定角度倾斜的纵向轴线。 通孔可以由第一表面形成到相对的第二表面，或者通孔可以从第一表面形成为第一盲孔，然后可以从第二表面形成第二开口以与第一开口对准。 可以通过第一基板和第二基板完全形成通孔，并且基板可以结合在一起。 还公开了包括本发明的通孔的半导体器件。 还公开了一种形成弹簧状触点的方法。

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