中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

52 records (took 0.02 seconds)

    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making
    2.
    发明申请
    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making 有权
    衬底中的斜槽，弹簧状偏转触点，以及制作方法

    公开(公告)号：US20070045857A1

    公开(公告)日：2007-03-01

    申请号：US11588977

    申请日：2006-10-27

    Applicant: James Wark ,  Syed Ahmad

    Inventor： James Wark ,  Syed Ahmad

    IPC: H01L23/48 ,  H01L23/52

    CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/0029 ,  H05K3/0041 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09836 ,  H01L2924/00

    Abstract: Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed within the substrate to have a longitudinal axis sloped at an angle with respect to a reference line extending perpendicular to the first surface and the second surface of the substrate. The vias may be formed from the first surface to the opposing second surface, or the via may be formed as a first blind opening from the first surface, then a second opening may be formed from the second surface to be aligned with the first opening. Vias may be formed completely through a first substrate and a second substrate, and the substrates may be bonded together. Semiconductor devices including the vias of the present invention are also disclosed. A method of forming spring-like contacts is also disclosed.

    Abstract translation: 公开了形成通孔的方法。 所述方法包括提供具有第一表面和相对的第二表面的基底。 通孔形成在衬底内，以具有相对于垂直于衬底的第一表面和第二表面延伸的参考线成一定角度倾斜的纵向轴线。 通孔可以由第一表面形成到相对的第二表面，或者通孔可以从第一表面形成为第一盲孔，然后可以从第二表面形成第二开口以与第一开口对准。 可以通过第一基板和第二基板完全形成通孔，并且基板可以结合在一起。 还公开了包括本发明的通孔的半导体器件。 还公开了一种形成弹簧状触点的方法。

    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making
    3.
    发明申请
    Sloped vias in a substrate, spring-like deflecting contacts, and methods of making 有权
    衬底中的斜槽，弹簧状偏转触点，以及制作方法

    公开(公告)号：US20060046475A1

    公开(公告)日：2006-03-02

    申请号：US10933847

    申请日：2004-09-02

    Applicant: James Wark ,  Syed Ahmad

    Inventor： James Wark ,  Syed Ahmad

    IPC: H01L21/44

    CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/0029 ,  H05K3/0041 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09836 ,  H01L2924/00

    Abstract: Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed within the substrate to have a longitudinal axis sloped at an angle with respect to a reference line extending perpendicular to the first surface and the second surface of the substrate. The vias may be formed from the first surface to the opposing second surface, or the via may be formed as a first blind opening from the first surface, then a second opening may be formed from the second surface to be aligned with the first opening. Vias may be formed completely through a first substrate and a second substrate, and the substrates may be bonded together. Semiconductor devices including the vias of the present invention are also disclosed. A method of forming spring-like contacts is also disclosed.

    Abstract translation: 公开了形成通孔的方法。 所述方法包括提供具有第一表面和相对的第二表面的基底。 通孔形成在衬底内，以具有相对于垂直于衬底的第一表面和第二表面延伸的参考线成一定角度倾斜的纵向轴线。 通孔可以由第一表面形成到相对的第二表面，或者通孔可以从第一表面形成为第一盲孔，然后可以从第二表面形成第二开口以与第一开口对准。 可以通过第一基板和第二基板完全形成通孔，并且基板可以结合在一起。 还公开了包括本发明的通孔的半导体器件。 还公开了一种形成弹簧状触点的方法。

    Method of making an interposer with contact structures
    5.
    发明申请
    Method of making an interposer with contact structures 审中-公开
    制造具有接触结构的插入件的方法

    公开(公告)号：US20070017093A1

    公开(公告)日：2007-01-25

    申请号：US11528137

    申请日：2006-09-27

    Applicant: James Wark ,  Salman Akram

    Inventor： James Wark ,  Salman Akram

    IPC: H01R43/00

    CPC classification number: H01R12/57 ,  G01R1/0408 ,  G01R1/0466 ,  H01L2924/0002 ,  H01R43/205 ,  H05K1/119 ,  H05K3/325 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09045 ,  H05K2201/09472 ,  H05K2201/10689 ,  Y10T29/49117 ,  Y10T29/49123 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49174 ,  Y10T29/49179 ,  Y10T29/49222 ,  Y10T29/49453 ,  H01L2924/00

    Abstract: A method of making an interposer having an array of contact structures for making temporary electrical contact with the leads of a chip package. The contact structures may make contact with the leads as close as desired to the body of the chip package. Moreover, the contact structures can be adapted for making contact with leads having a very fine pitch. In one embodiment, the contact structures include raised members formed over a body of the interposer. A conductive layer is formed over each of the raised members to provide a contact surface for engaging the leads of the chip package. In another embodiment, the raised members are replaced with depressions formed into the interposer. A conductive layer is formed on an inside surface of each depression to provide a contact surface for engaging the leads of the chip package. Any combination of raised members and depressions may be used.

    Abstract translation: 一种制造具有用于与芯片封装的引线暂时电接触的接触结构阵列的插入件的方法。 接触结构可以使引线接近芯片封装体的所需位置。 此外，接触结构可以适于与具有非常细的间距的引线接触。 在一个实施例中，接触结构包括形成在插入件的主体上的凸起部件。 在每个凸起构件上形成导电层，以提供用于接合芯片封装引线的接触表面。 在另一个实施例中，凸起构件被形成在插入件中的凹陷所代替。 在每个凹陷的内表面上形成导电层，以提供用于接合芯片封装的引线的接触表面。 可以使用凸起构件和凹陷的任何组合。

    Microelectronic imagers with optical devices having integral reference features and methods for manufacturing such microelectronic imagers
    6.
    发明申请
    Microelectronic imagers with optical devices having integral reference features and methods for manufacturing such microelectronic imagers 有权
    具有整体参考特征的光学器件的微电子成像器和用于制造这种微电子成像器的方法

    公开(公告)号：US20060043512A1

    公开(公告)日：2006-03-02

    申请号：US10925406

    申请日：2004-08-24

    Applicant: Steven Oliver ,  James Wark ,  Kyle Kirby

    Inventor： Steven Oliver ,  James Wark ,  Kyle Kirby

    IPC: H01L31/0232

    CPC classification number: H04N5/2254 ,  B33Y80/00 ,  G02B7/006 ,  G02B7/022 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14685 ,  H01L31/02325 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H04N5/2253 ,  H01L2924/00014

    Abstract: Microelectronic imager assemblies with optical devices having integral reference features and methods for assembling such microelectronic imagers is disclosed herein. In one embodiment, the imager assembly can include a workpiece with a substrate having a front side, a back side, and a plurality of imaging dies on and/or in the substrate. The imaging dies include image sensors, integrated circuitry operatively coupled to the image sensors, and external contacts electrically coupled to the integrated circuitry. The assembly also includes optics supports on the workpiece. The optics supports have openings aligned with corresponding image sensors and first interface features at reference locations relative to corresponding image sensors. The assembly further includes optical devices having optics elements and second interface features seated with corresponding first interface features to position the optics elements at a desired location relative to corresponding image sensors.

    Abstract translation: 本文公开了具有整体参考特征的光学装置的微电子成像器组件和用于组装这种微电子成像器的方法。 在一个实施例中，成像器组件可以包括具有衬底的工件，其具有在衬底上和/或衬底中的前侧，后侧和多个成像管芯。 成像管芯包括图像传感器，可操作地耦合到图像传感器的集成电路以及电耦合到集成电路的外部触点。 组件还包括工件上的光学支架。 光学支架具有与对应的图像传感器对准的开口和相对于相应图像传感器的参考位置处的第一界面特征。 组件还包括具有光学元件的光学装置和与对应的第一界面特征相对的第二界面特征，以将光学元件相对于相应的图像传感器定位在期望的位置。

    Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICs will undergo, such as additional repairs
    9.
    发明申请
    Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICs will undergo, such as additional repairs 失效
    使用有关制造程序集成电路（ICS）的数据的方法已经进行了修复，以选择IC将经历的程序，例如额外修理

    公开(公告)号：US20070088451A1

    公开(公告)日：2007-04-19

    申请号：US11545067

    申请日：2006-10-06

    Applicant: Salman Akram ,  Warren Farnworth ,  Derek Gouchnour ,  David Hembree ,  Michael Hess ,  John Jacobson ,  James Wark ,  Alan Wood

    Inventor： Salman Akram ,  Warren Farnworth ,  Derek Gouchnour ,  David Hembree ,  Michael Hess ,  John Jacobson ,  James Wark ,  Alan Wood

    IPC: G06F19/00

    CPC classification number: G03F7/7065 ,  G06F11/006 ,  H01L2223/5444

    Abstract: An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on ICs at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the ICs. The ID codes of the ICs are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the ICs is then accessed, and additional repair procedures the ICs may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

    Abstract translation: 在集成电路（IC）制造过程中的创造性方法，用于使用关于在探针上的IC进行的修复程序的数据，以确定是否在制造过程中稍后进行进一步的修理，包括将数据与每个的熔丝ID相关联地存储 IC。 IC的ID代码在制造过程中例如在打开/短路测试中自动读取。 然后访问与IC的ID代码相关联存储的数据，并且根据所访问的数据选择IC可能经历的附加修复过程。 因此，例如，访问的数据可以指示IC不可修复，因此IC可以直接进入废料仓，而不必被查询以确定其是否可修复，如在传统IC制造过程中所必需的。

Patent Agency Ranking