公开(公告)号：US09842796B2

公开(公告)日：2017-12-12

申请号：US15317140

申请日：2015-06-08

Applicant: Robert Bosch GmbH

Inventor： Thomas Schneider

IPC: H01L23/495 ,  H01L23/433

CPC classification number: H01L23/49568 ,  H01L23/4334 ,  H01L23/49537 ,  H01L23/49548 ,  H01L23/49575 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic module including a semiconductor unit situated in a plastic housing, an electrically conductive plate system, via which the semiconductor unit may be supplied with electrical power, the electrically conductive plate system being connected in a planar fashion to a heat-generating integrated circuit of the semiconductor unit via a heat coupler; and the electrically conductive plate system being designed in such a way that it dissipates the heat generated by the heat-generating integrated circuit of the semiconductor unit to the plastic housing. A method for manufacturing a corresponding electronic module is also described.

公开(公告)号：US09837380B2

公开(公告)日：2017-12-05

申请号：US14165720

申请日：2014-01-28

Applicant: Infineon Technologies Austria AG

Inventor： Tian San Tan ,  Theng Chao Long

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01R4/00 ,  H01L25/07 ,  H01L23/433 ,  H01L23/495

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/48 ,  H01L24/70 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/89 ,  H01L24/97 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/05554 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37026 ,  H01L2224/3719 ,  H01L2224/40227 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83143 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/84143 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/84825 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/84855 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/14252 ,  H01L2924/14253 ,  H01L2924/181 ,  H01R4/00 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/83 ,  H01L2224/84

Abstract: A semiconductor device includes a device carrier, a first semiconductor chip mounted on the device carrier and a second semiconductor chip mounted on the device carrier. Further, the semiconductor device includes a first contact clip bonded to a first electrode of the first semiconductor chip, a second contact clip bonded to a first electrode of the second semiconductor chip and an insulating connector configured to hold the first contact clip and the second contact clip together.

公开(公告)号：US20170338168A1

公开(公告)日：2017-11-23

申请号：US15287136

申请日：2016-10-06

Applicant: Hyundai Motor Company

Inventor： Sung Won Park ,  Woo Yong Jeon ,  Jeong Min Son

IPC: H01L23/495 ,  H01L23/40 ,  H02M7/00

CPC classification number: H01L23/49524 ,  H01L23/051 ,  H01L23/3107 ,  H01L23/4093 ,  H01L23/4334 ,  H01L23/49558 ,  H01L23/49562 ,  H01L23/49568 ,  H01L2224/33 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48998 ,  H01L2224/73265 ,  H02M7/003 ,  H05K7/209 ,  H01L2924/00014

Abstract: A signal block and a double-faced cooling power module that uses the signal block is provided. The signal block includes a plurality of signal clips that are formed in a ribbon shape to connect a first signal pad formed on a semiconductor chip and a second signal pad formed on a signal lead frame. An insulator fixes the position of the plurality of signal clips while spacing the signal clips apart from each other.

公开(公告)号：US09824961B2

公开(公告)日：2017-11-21

申请号：US15590572

申请日：2017-05-09

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Takuya Kadoguchi ,  Takanori Kawashima

IPC: H01L21/00 ,  H01L23/495 ,  H01L23/498 ,  H01L23/49 ,  H01L23/528 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/49582 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/48 ,  H01L23/49 ,  H01L23/49531 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/498 ,  H01L23/528 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/83102 ,  H01L2224/83815 ,  H01L2924/13055 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, a semiconductor element, a terminal and a solder outflow prevention part. The semiconductor element is fixed on one side of the substrate via a first solder layer. The terminal that is fixed on the one side of the substrate via a second solder layer. The solder outflow prevention part is formed between the semiconductor element and the terminal in the one side of the substrate and is configured to prevent the first solder layer and the second solder layer from outflowing. A distance between the solder outflow prevention part and the semiconductor element is longer than a thickness of the first solder layer.

公开(公告)号：US09824901B2

公开(公告)日：2017-11-21

申请号：US15085538

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Sasha Oster ,  Adel A. Elsherbini ,  Joshua D. Heppner ,  Shawna M. Liff

IPC: H01L21/56 ,  H01L23/31

CPC classification number: H01L23/315 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/467 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2224/81

Abstract: Molded electronics package cavities are formed by placing a sacrificial material in the mold and then decomposing, washing, or etching away this sacrificial material. The electronics package that includes this sacrificial material is then overmolded, with little or no change needed in the overmolding process. Following overmolding, the sacrificial material is removed such as using a thermal, chemical, optical, or other decomposing process. This proposed use of sacrificial material allows for formation of complex 3-D cavities, and reduces or eliminates the need for precise material removal tolerances. Multiple instances of the sacrificial material may be removed simultaneously, replacing a serial drilling process with a parallel material removal manufacturing process.

公开(公告)号：US09806029B2

公开(公告)日：2017-10-31

申请号：US14044232

申请日：2013-10-02

Applicant: Infineon Technologies Austria AG

Inventor： Ralf Otremba ,  Josef Hoeglauer ,  Chooi Mei Chong

IPC: H05K1/00 ,  H05K1/18 ,  H05K7/00 ,  H01L23/538 ,  H01L21/02 ,  H01L23/00 ,  H01L23/433 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L23/5384 ,  H01L21/02104 ,  H01L23/051 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/33 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/84 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/181 ,  Y10T29/49105 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device comprising a first substrate, a second substrate, a first semiconductor chip comprising a transistor, comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, and a second semiconductor chip comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, wherein the first semiconductor chip comprises a via electrically coupling a first transistor terminal at its first mounting surface with a second transistor terminal at its second mounting surface.

公开(公告)号：US09806008B1

公开(公告)日：2017-10-31

申请号：US15182092

申请日：2016-06-14

Applicant: Infineon Technologies Americas Corp.

Inventor： Gerald Adriano ,  Sam Lalgudi Sundaram

IPC: H01L23/495 ,  H01L23/31 ,  H01L25/16 ,  H01L23/00

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2924/01047 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1426 ,  H01L2924/17747

Abstract: A semiconductor package includes a leadframe having a clip foot portion, the clip foot portion having a first tie bar, a conductive clip situated over the leadframe, the conductive clip including a first lock fork having at least two prongs around the first tie bar so as to secure the conductive clip to the clip foot portion of the leadframe. The conductive clip includes a second lock fork having at least two prongs around a second tie bar of the clip foot portion. The conductive clip is electrically coupled to the clip foot portion of the leadframe. The clip foot portion of the leadframe includes exposed leads. The semiconductor package also includes at least one semiconductor device situated on the leadframe. The at least one semiconductor device is coupled to a driver integrated circuit situated on the leadframe.

公开(公告)号：US09780042B2

公开(公告)日：2017-10-03

申请号：US15171604

申请日：2016-06-02

Applicant: Invensas Corporation

Inventor： Charles G. Woychik ,  Cyprian Emeka Uzoh ,  Hiroaki Sato

IPC: H01L23/58 ,  H01L23/00 ,  H01L23/48 ,  H01L21/768 ,  H01L23/498 ,  H01L25/065 ,  H01L21/48 ,  H01L23/433 ,  H01L25/16 ,  H01L25/18

CPC classification number: H01L23/562 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/4334 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/167 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A composite interposer can include a substrate element and a support element. The substrate element can have first and second opposite surfaces defining a thickness of 200 microns or less, and can have a plurality of contacts exposed at the first surface and electrically conductive structure extending through the thickness. The support element can have a body of at least one of dielectric or semiconductor material exposed at a second surface of the support element, openings extending through a thickness of the body, conductive vias extending within at least some of the openings in a direction of the thickness of the body, and terminals exposed at a first surface of the support element. The second surface of the support element can be united with the second surface of the substrate element. The terminals can be electrically connected with the contacts through the conductive vias and the electrically conductive structure.

公开(公告)号：US20170278774A1

公开(公告)日：2017-09-28

申请号：US15508506

申请日：2015-12-04

Applicant: DENSO CORPORATION

Inventor： Eiji HAYASHI ,  Wataru KOBAYASHI ,  Eiji NOMURA ,  Kazuki KOUDA

IPC: H01L23/495 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L23/29 ,  H01L21/48

CPC classification number: H01L23/4952 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/4334 ,  H01L23/488 ,  H01L23/49527 ,  H01L23/49562 ,  H01L23/49575 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/33 ,  H01L2924/181 ,  H01L2924/00012

Abstract: A semiconductor device includes: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member and a membrane and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member; and a second solder disposed between the metal member and the first conductive member. The membrane has a metal thin film arranged on the surface of the base member and an uneven oxide film. The uneven oxide film is arranged on the metal thin film in at least a part of a connection region of a surface of the metal member, the connection region connecting a first connection region to which the first solder is connected and a second connection region to which the second solder is connected.

公开(公告)号：US20170271274A1

公开(公告)日：2017-09-21

申请号：US15445998

申请日：2017-03-01

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Yuichiro HINATA

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/373 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L21/4882 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/498 ,  H01L25/072

Abstract: Provided is a semiconductor device including an insulating plate; a first conducting portion formed on a first surface of the insulating plate; a semiconductor element mounted on the first conducting portion; and a mold material that seals the first conducting portion and the semiconductor element on the first surface side of the insulating plate. A material of the insulating plate has higher adhesion with respect to the mold material than a material of the first conducting portion, and the first conducting portion includes a gap that is filled with the mold material between the first conducting portion and the insulating plate in a portion thereof.