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61.发明授权公开(公告)号：US08810008B2
公开(公告)日：2014-08-19
申请号：US13635621
申请日：2011-01-25
申请人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Katsumi Kikuchi , Yoshiki Nakashima , Daisuke Ohshima
发明人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Katsumi Kikuchi , Yoshiki Nakashima , Daisuke Ohshima
IPC分类号： H01L29/40 , H01L21/4763
CPC分类号： H05K1/185 , H01L23/49827 , H01L23/49838 , H01L23/5389 , H01L24/19 , H01L24/25 , H01L24/82 , H01L2224/0401 , H01L2224/04105 , H01L2224/16225 , H01L2224/18 , H01L2224/2518 , H01L2224/32225 , H01L2224/73259 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/15192 , H01L2924/3511 , H05K1/187 , H05K3/4602 , H05K2201/10674 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor element-embedded substrate includes a semiconductor element; a chip component; a peripheral insulating layer covering at least the outer circumferential side surfaces thereof; an upper surface-side wiring line provided on the upper surface side of the substrate; and a lower surface-side wiring line provided on the lower surface side of the substrate. The built-in semiconductor element includes a terminal on the upper surface side thereof, and this terminal is electrically connected to the upper surface-side wiring line. The built-in chip component includes an upper surface-side terminal electrically connected to the upper surface-side wiring line; a lower surface-side terminal electrically connected to the lower surface-side wiring line; and a through-chip via penetrating through the chip component to connect the upper surface-side terminal and the lower surface-side terminal.
摘要翻译： 半导体元件嵌入式基板包括半导体元件; 芯片组件; 外周绝缘层，至少覆盖其外周侧面; 设置在基板的上表面侧的上表面侧配线; 以及设置在基板的下表面侧的下表面侧配线。 内置半导体元件包括在其上表面侧的端子，该端子与上表面侧布线电连接。 内置的芯片部件包括电连接到上表面侧布线的上表面侧端子; 电连接到下表面侧布线的下表面侧端子; 以及穿过芯片部件的贯通芯片，以连接上表面侧端子和下表面侧端子。
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62.发明授权Wiring board capable of containing functional element and method for manufacturing same 失效能够包含功能元件的接线板及其制造方法公开(公告)号：US08692135B2
公开(公告)日：2014-04-08
申请号：US13060990
申请日：2009-08-25
CPC分类号： H05K1/115 , H01L23/145 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L2224/12105 , H01L2224/16225 , H01L2224/24051 , H01L2224/24226 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/09701 , H01L2924/10329 , H01L2924/3511 , H05K1/0366 , H05K1/185 , H05K3/4069 , H05K3/421 , H05K3/424 , H05K2201/0195 , H05K2201/0209 , H05K2201/09563 , H05K2201/09854 , H05K2201/2072 , Y10T29/49165 , H01L2924/00
摘要： A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.
摘要翻译： 布线板通过层叠一个或多个导体布线层和一个或多个绝缘树脂层而构成，并且包括被配置为穿透绝缘树脂层的一个或多个金属通孔，其中金属孔和绝缘树脂层之间的边界面具有 金属通孔和绝缘树脂层彼此接合的凹凸边界横截面结构。
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公开(公告)号：US20130088841A1
公开(公告)日：2013-04-11
申请号：US13639486
申请日：2011-01-19
IPC分类号： H05K1/18
CPC分类号： H05K1/183 , H01L23/13 , H01L23/367 , H01L23/49894 , H01L23/50 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/221 , H01L2224/24226 , H01L2224/24227 , H01L2224/32245 , H01L2224/73267 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/3511 , H05K1/0218 , H05K1/025 , H05K1/185 , H05K3/0061 , H05K3/4644 , H05K2201/09745 , H05K2203/1469 , H01L2924/00
摘要： The present invention has an object to provide a substrate with a built-in functional element, including the functional element above a metal plate, in which crosstalk noise between signal wirings can be reduced and higher characteristic impedance matching can be achieved. An aspect of the present invention provides a substrate with a built-in functional element, including: a metal plate that includes a concave portion and serves as a ground; the functional element that is placed in the concave portion and includes an electrode terminal; a first insulating layer that covers the functional element and is placed in contact with the metal plate; a first wiring layer including first signal wiring that is opposite the metal plate with the first insulating layer being interposed therebetween; a second insulating layer that covers the first wiring layer; and a ground layer formed of a ground plane that is opposite the first wiring layer with the second insulating layer being interposed therebetween.
摘要翻译： 本发明的目的是提供一种具有内置功能元件的基板，其包括金属板上方的功能元件，其中可以实现信号布线之间的串扰噪声并且可以实现更高的特性阻抗匹配。 本发明的一个方面提供一种具有内置功能元件的基板，包括：金属板，其包括凹部并用作地面; 所述功能元件放置在所述凹部中并且包括电极端子; 覆盖所述功能元件并与所述金属板接触的第一绝缘层; 第一布线层，包括与金属板相对的第一信号布线，其间插入有第一绝缘层; 覆盖所述第一布线层的第二绝缘层; 以及由与第一布线层相对的接地面形成的接地层，其间插入有第二绝缘层。
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公开(公告)号：US08389414B2
公开(公告)日：2013-03-05
申请号：US13026651
申请日：2011-02-14
申请人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Hirokazu Honda , Kenta Ogawa , Jun Tsukano
发明人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Hirokazu Honda , Kenta Ogawa , Jun Tsukano
IPC分类号： H01L21/311
CPC分类号： H05K3/205 , H01L21/4857 , H01L21/486 , H01L21/563 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48472 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/12044 , H01L2924/181 , H01L2924/19041 , H05K3/244 , H05K3/423 , H05K2201/0338 , H05K2201/098 , H05K2201/09845 , H05K2203/0376 , H05K2203/0384 , H05K2203/0733 , H05K2203/1476 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45015 , H01L2924/207
摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.
摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。
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公开(公告)号：US20130050967A1
公开(公告)日：2013-02-28
申请号：US13634088
申请日：2011-01-19
IPC分类号： H05K1/18
CPC分类号： H01L23/5389 , H01L23/49827 , H01L23/49838 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2224/24227 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/15153 , H01L2924/1517 , H01L2924/18162 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10416 , H01L2924/00
摘要： An object of the present invention is to provide a functional device-embedded substrate that can be thinned and suppress occurrence of warpage. The present invention provides a functional device-embedded substrate including at least a functional device including an electrode terminal, and a covering insulating layer covering at least an electrode terminal surface and a side surface of the functional device, the functional device-embedded substrate including a first pillar structure around the functional device inside the covering insulating layer, the first pillar structure including a material having a thermal expansion coefficient between thermal expansion coefficients of the functional device and the covering insulating layer, wherein the first pillar structure is arranged at a position where a shortest distance from a side surface of the functional device to a side surface of the first pillar structure is smaller than a thickness of the functional device.
摘要翻译： 本发明的目的是提供一种能够变薄并抑制翘曲发生的功能性器件嵌入式基板。 本发明提供一种功能性器件嵌入式基板，其至少包括具有电极端子的功能元件和覆盖所述功能元件的至少电极端子面和侧面的覆盖绝缘层，所述功能元件嵌入型基板包括 第一柱结构包括在功能元件的热膨胀系数与覆盖绝缘层之间具有热膨胀系数的材料的第一柱结构，其中第一柱结构布置在第一柱结构的位置， 从功能元件的侧面到第一柱状结构的侧面的最短距离小于功能元件的厚度。
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公开(公告)号：US20130026632A1
公开(公告)日：2013-01-31
申请号：US13639735
申请日：2011-02-22
IPC分类号： H01L23/48
CPC分类号： H05K1/185 , H01L21/6835 , H01L23/481 , H01L23/50 , H01L23/5384 , H01L23/5385 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/24 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/82 , H01L24/83 , H01L2221/68345 , H01L2223/6677 , H01L2224/04105 , H01L2224/24225 , H01L2224/24226 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/73267 , H01L2224/83 , H01L2224/92 , H01L2224/92244 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01037 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/07802 , H01L2924/0781 , H01L2924/09701 , H01L2924/10329 , H01L2924/12042 , H01L2924/13091 , H01L2924/1461 , H01L2924/19041 , H05K1/0271 , H05K1/186 , H05K3/4602 , H05K2201/10674 , H05K2203/1469 , H01L2224/81 , H01L2924/00015 , H01L2224/85 , H01L2224/82 , H01L2224/45 , H01L2924/3512 , H01L2924/00 , H01L2224/48
摘要： A wiring substrate in which a semiconductor element is built includes a semiconductor element; a peripheral insulating layer covering at least an outer circumferential side surface of this semiconductor element; and an upper surface-side wiring line provided on the upper surface side of the wiring substrate. The semiconductor element includes an internal terminal electrically connected to the upper surface-side wiring line on the upper surface side of the semiconductor element. This internal terminal includes a first conductive part exposed out of an insulating surface layer of the semiconductor element; an adhesion layer on this first conductive part; and a second conductive part on this adhesion layer. The adhesion layer covers an exposed surface of the first conductive part, and is formed on a portion of the insulating surface layer around the exposed surface of the first conductive part, and the adhesion layer extends around the outer side of an outer edge of this second conductive part so as to surround the second conductive part.
摘要翻译： 构成半导体元件的布线基板包括半导体元件; 覆盖该半导体元件的至少外周侧表面的外围绝缘层; 以及设置在布线基板的上表面侧的上表面侧布线。 半导体元件包括电连接到半导体元件的上表面侧的上表面侧布线的内部端子。 该内部端子包括从半导体元件的绝缘表面层露出的第一导电部件; 在该第一导电部分上的粘附层; 和该粘合层上的第二导电部分。 粘合层覆盖第一导电部分的暴露表面，并且形成在第一导电部分的暴露表面周围的绝缘表面层的一部分上，并且粘合层围绕该第二导电部分的外边缘的外侧延伸 导电部件以包围第二导电部件。
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67.发明申请公开(公告)号：US20130009325A1
公开(公告)日：2013-01-10
申请号：US13635621
申请日：2011-01-25
申请人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Katsumi Kikuchi , Yoshiki Nakashima , Daisuke Ohshima
发明人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Katsumi Kikuchi , Yoshiki Nakashima , Daisuke Ohshima
IPC分类号： H01L23/48 , H01L21/56 , H01L21/768
CPC分类号： H05K1/185 , H01L23/49827 , H01L23/49838 , H01L23/5389 , H01L24/19 , H01L24/25 , H01L24/82 , H01L2224/0401 , H01L2224/04105 , H01L2224/16225 , H01L2224/18 , H01L2224/2518 , H01L2224/32225 , H01L2224/73259 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/15192 , H01L2924/3511 , H05K1/187 , H05K3/4602 , H05K2201/10674 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor element-embedded substrate includes a semiconductor element; a chip component; a peripheral insulating layer covering at least the outer circumferential side surfaces thereof; an upper surface-side wiring line provided on the upper surface side of the substrate; and a lower surface-side wiring line provided on the lower surface side of the substrate. The built-in semiconductor element includes a terminal on the upper surface side thereof, and this terminal is electrically connected to the upper surface-side wiring line. The built-in chip component includes an upper surface-side terminal electrically connected to the upper surface-side wiring line; a lower surface-side terminal electrically connected to the lower surface-side wiring line;and a through-chip via penetrating through the chip component to connect the upper surface-side terminal and the lower surface-side terminal.
摘要翻译： 半导体元件嵌入式基板包括半导体元件; 芯片组件; 外周绝缘层，至少覆盖其外周侧面; 设置在基板的上表面侧的上表面侧配线; 以及设置在基板的下表面侧的下表面侧配线。 内置半导体元件包括在其上表面侧的端子，该端子与上表面侧布线电连接。 内置的芯片部件包括电连接到上表面侧布线的上表面侧端子; 电连接到下表面侧布线的下表面侧端子; 以及穿过芯片部件的贯通芯片，以连接上表面侧端子和下表面侧端子。
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公开(公告)号：US08304915B2
公开(公告)日：2012-11-06
申请号：US13055372
申请日：2009-07-23
申请人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
发明人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/3511 , H05K1/115 , H05K3/4644 , H05K2201/0352 , H05K2201/10674 , H05K2203/0152 , H05K2203/0156 , H05K2203/063 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.
摘要翻译： 半导体器件包括多个互连件，并且堆叠多个通孔。 半导体元件封装在绝缘层中。 提供在绝缘层中的至少一个通孔和/或设置在互连层中的至少一个互连件的横截面形状与在另一个绝缘层中提供的另一个绝缘层和/或互连中形成的通孔的截面形状不同 互连层之一。
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69.发明授权Semiconductor device including an LSI chip and a method for manufacturing the same 失效包括LSI芯片的半导体器件及其制造方法公开(公告)号：US08043953B2
公开(公告)日：2011-10-25
申请号：US12521936
申请日：2008-01-15
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L24/19 , B23K26/389 , H01L21/76802 , H01L23/5389 , H01L24/24 , H01L2224/0401 , H01L2224/04105 , H01L2224/1134 , H01L2224/13099 , H01L2224/20 , H01L2224/211 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/0106 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/3011 , H01L2924/00014
摘要： A semiconductor device that can be readily manufactured, can include a large number of pads, and can be thin, and a method for manufacturing the same are provided. The semiconductor device is characterized in that the semiconductor device includes an LSI chip, an insulating layer provided on the LSI chip and made of a nonphotosensitive resin, the insulating layer including a via hole in the position corresponding to an externally connected pad, and a wiring layer extending along the insulating layer through the via hole to the externally connected pad, and at least part of the via hole is formed by irradiating the insulating layer with laser light.
摘要翻译： 可以容易地制造的半导体器件可以包括大量的焊盘，并且可以是薄的，并且提供其制造方法。 半导体器件的特征在于，半导体器件包括LSI芯片，设置在LSI芯片上并由非感光树脂制成的绝缘层，所述绝缘层包括在与外部连接的焊盘相对应的位置中的通孔，以及布线 所述层通过所述通孔延伸到所述外部连接的焊盘，并且所述通孔的至少一部分通过用激光照射所述绝缘层而形成。
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70.发明授权公开(公告)号：US07889514B2
公开(公告)日：2011-02-15
申请号：US11544732
申请日：2006-10-10
IPC分类号： H05K1/11
CPC分类号： H01L23/49816 , H01L21/6835 , H01L23/5383 , H01L23/5386 , H01L24/81 , H01L24/97 , H01L25/0657 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2224/81801 , H01L2224/97 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01056 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01082 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board. Connections for very small wiring are thereby made possible, and a plurality of semiconductor elements can be very densely connected.
摘要翻译： 一种半导体器件，包括平面布线板，布置在所述布线板的一个表面上的第一LSI，用于覆盖所述一个表面的密封树脂和所述第一半导体元件的侧面，以及设置在所述布线的另一个表面上的第二LSI 板。 布线基板具有作为布线层的导电布线，作为布线层的支撑层的绝缘树脂，以及穿过布线层和支撑层的导电性通孔。 半导体元件的外周边缘从上方垂直观察到的焊盘的内部的位置之间的连接点，其中所述焊盘从形成有外部连接端子的焊盘部分选择，并且形成了布线板 在与地面相同的平面中，不均匀地分布在布线板的一侧。 由此，可以实现非常小的布线的连接，并且可以非常密集地连接多个半导体元件。
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