Three-dimensional quantum well transistor
    70.
    发明授权
    Three-dimensional quantum well transistor 有权
    三维量子阱晶体管

    公开(公告)号:US09093354B1

    公开(公告)日:2015-07-28

    申请号:US14683670

    申请日:2015-04-10

    发明人: De Yuan Xiao

    摘要: Three dimensional quantum well transistors and fabrication methods are provided. A quantum well layer, a barrier layer, and a gate structure can be sequentially formed on an insulating surface of a fin part. The gate structure can be formed over the barrier layer and across the fin part. The QW layer and the barrier layer can form a hetero-junction of the transistor. A recess can be formed in the fin part on both sides of the gate structure to suspend a sidewall spacer. A source and a drain can be formed by growing an epitaxial material in the recess and the sidewall spacer formed on both sidewalls of the gate electrode can be positioned on surface of the source and the drain.

    摘要翻译: 提供了三维量子阱晶体管和制造方法。 可以在翅片部分的绝缘表面上依次形成量子阱层,阻挡层和栅极结构。 栅极结构可以形成在阻挡层上并且横跨翅片部分。 QW层和阻挡层可以形成晶体管的异质结。 可以在栅极结构的两侧的翅片部分中形成凹部以悬挂侧壁间隔件。 可以通过在凹槽中生长外延材料来形成源极和漏极,并且形成在栅电极的两个侧壁上的侧壁间隔物可以位于源极和漏极的表面上。